28 lines
745 B
C
28 lines
745 B
C
#ifndef _ASM_X86_INTEL_RDT_COMMON_H
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#define _ASM_X86_INTEL_RDT_COMMON_H
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#define MSR_IA32_PQR_ASSOC 0x0c8f
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/**
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* struct intel_pqr_state - State cache for the PQR MSR
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* @rmid: The cached Resource Monitoring ID
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* @closid: The cached Class Of Service ID
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* @rmid_usecnt: The usage counter for rmid
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*
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* The upper 32 bits of MSR_IA32_PQR_ASSOC contain closid and the
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* lower 10 bits rmid. The update to MSR_IA32_PQR_ASSOC always
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* contains both parts, so we need to cache them.
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*
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* The cache also helps to avoid pointless updates if the value does
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* not change.
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*/
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struct intel_pqr_state {
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u32 rmid;
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u32 closid;
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int rmid_usecnt;
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};
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DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
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#endif /* _ASM_X86_INTEL_RDT_COMMON_H */
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