340 lines
8.4 KiB
C
340 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* TI ADC108S102 SPI ADC driver
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*
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* Copyright (c) 2013-2015 Intel Corporation.
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* Copyright (c) 2017 Siemens AG
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*
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* This IIO device driver is designed to work with the following
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* analog to digital converters from Texas Instruments:
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* ADC108S102
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* ADC128S102
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* The communication with ADC chip is via the SPI bus (mode 3).
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*/
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#include <linux/acpi.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/types.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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/*
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* In case of ACPI, we use the hard-wired 5000 mV of the Galileo and IOT2000
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* boards as default for the reference pin VA. Device tree users encode that
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* via the vref-supply regulator.
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*/
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#define ADC108S102_VA_MV_ACPI_DEFAULT 5000
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/*
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* Defining the ADC resolution being 12 bits, we can use the same driver for
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* both ADC108S102 (10 bits resolution) and ADC128S102 (12 bits resolution)
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* chips. The ADC108S102 effectively returns a 12-bit result with the 2
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* least-significant bits unset.
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*/
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#define ADC108S102_BITS 12
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#define ADC108S102_MAX_CHANNELS 8
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/*
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* 16-bit SPI command format:
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* [15:14] Ignored
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* [13:11] 3-bit channel address
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* [10:0] Ignored
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*/
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#define ADC108S102_CMD(ch) ((u16)(ch) << 11)
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/*
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* 16-bit SPI response format:
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* [15:12] Zeros
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* [11:0] 12-bit ADC sample (for ADC108S102, [1:0] will always be 0).
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*/
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#define ADC108S102_RES_DATA(res) ((u16)res & GENMASK(11, 0))
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struct adc108s102_state {
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struct spi_device *spi;
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struct regulator *reg;
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u32 va_millivolt;
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/* SPI transfer used by triggered buffer handler*/
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struct spi_transfer ring_xfer;
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/* SPI transfer used by direct scan */
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struct spi_transfer scan_single_xfer;
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/* SPI message used by ring_xfer SPI transfer */
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struct spi_message ring_msg;
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/* SPI message used by scan_single_xfer SPI transfer */
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struct spi_message scan_single_msg;
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/*
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* SPI message buffers:
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* tx_buf: |C0|C1|C2|C3|C4|C5|C6|C7|XX|
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* rx_buf: |XX|R0|R1|R2|R3|R4|R5|R6|R7|tt|tt|tt|tt|
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*
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* tx_buf: 8 channel read commands, plus 1 dummy command
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* rx_buf: 1 dummy response, 8 channel responses, plus 64-bit timestamp
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*/
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__be16 rx_buf[13] ____cacheline_aligned;
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__be16 tx_buf[9] ____cacheline_aligned;
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};
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#define ADC108S102_V_CHAN(index) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.address = index, \
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.scan_index = index, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = ADC108S102_BITS, \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec adc108s102_channels[] = {
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ADC108S102_V_CHAN(0),
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ADC108S102_V_CHAN(1),
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ADC108S102_V_CHAN(2),
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ADC108S102_V_CHAN(3),
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ADC108S102_V_CHAN(4),
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ADC108S102_V_CHAN(5),
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ADC108S102_V_CHAN(6),
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ADC108S102_V_CHAN(7),
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IIO_CHAN_SOFT_TIMESTAMP(8),
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};
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static int adc108s102_update_scan_mode(struct iio_dev *indio_dev,
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unsigned long const *active_scan_mask)
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{
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struct adc108s102_state *st = iio_priv(indio_dev);
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unsigned int bit, cmds;
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/*
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* Fill in the first x shorts of tx_buf with the number of channels
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* enabled for sampling by the triggered buffer.
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*/
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cmds = 0;
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for_each_set_bit(bit, active_scan_mask, ADC108S102_MAX_CHANNELS)
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st->tx_buf[cmds++] = cpu_to_be16(ADC108S102_CMD(bit));
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/* One dummy command added, to clock in the last response */
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st->tx_buf[cmds++] = 0x00;
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/* build SPI ring message */
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st->ring_xfer.tx_buf = &st->tx_buf[0];
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st->ring_xfer.rx_buf = &st->rx_buf[0];
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st->ring_xfer.len = cmds * sizeof(st->tx_buf[0]);
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spi_message_init_with_transfers(&st->ring_msg, &st->ring_xfer, 1);
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return 0;
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}
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static irqreturn_t adc108s102_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct adc108s102_state *st = iio_priv(indio_dev);
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int ret;
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ret = spi_sync(st->spi, &st->ring_msg);
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if (ret < 0)
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goto out_notify;
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/* Skip the dummy response in the first slot */
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iio_push_to_buffers_with_timestamp(indio_dev,
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(u8 *)&st->rx_buf[1],
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iio_get_time_ns(indio_dev));
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out_notify:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int adc108s102_scan_direct(struct adc108s102_state *st, unsigned int ch)
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{
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int ret;
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st->tx_buf[0] = cpu_to_be16(ADC108S102_CMD(ch));
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ret = spi_sync(st->spi, &st->scan_single_msg);
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if (ret)
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return ret;
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/* Skip the dummy response in the first slot */
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return be16_to_cpu(st->rx_buf[1]);
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}
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static int adc108s102_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long m)
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{
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struct adc108s102_state *st = iio_priv(indio_dev);
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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ret = adc108s102_scan_direct(st, chan->address);
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iio_device_release_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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*val = ADC108S102_RES_DATA(ret);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (chan->type != IIO_VOLTAGE)
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break;
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*val = st->va_millivolt;
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct iio_info adc108s102_info = {
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.read_raw = &adc108s102_read_raw,
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.update_scan_mode = &adc108s102_update_scan_mode,
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};
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static int adc108s102_probe(struct spi_device *spi)
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{
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struct adc108s102_state *st;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (!indio_dev)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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if (ACPI_COMPANION(&spi->dev)) {
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st->va_millivolt = ADC108S102_VA_MV_ACPI_DEFAULT;
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} else {
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st->reg = devm_regulator_get(&spi->dev, "vref");
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if (IS_ERR(st->reg))
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return PTR_ERR(st->reg);
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ret = regulator_enable(st->reg);
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if (ret < 0) {
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dev_err(&spi->dev, "Cannot enable vref regulator\n");
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return ret;
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}
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ret = regulator_get_voltage(st->reg);
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if (ret < 0) {
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dev_err(&spi->dev, "vref get voltage failed\n");
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return ret;
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}
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st->va_millivolt = ret / 1000;
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}
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spi_set_drvdata(spi, indio_dev);
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st->spi = spi;
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indio_dev->name = spi->modalias;
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indio_dev->dev.parent = &spi->dev;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = adc108s102_channels;
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indio_dev->num_channels = ARRAY_SIZE(adc108s102_channels);
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indio_dev->info = &adc108s102_info;
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/* Setup default message */
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st->scan_single_xfer.tx_buf = st->tx_buf;
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st->scan_single_xfer.rx_buf = st->rx_buf;
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st->scan_single_xfer.len = 2 * sizeof(st->tx_buf[0]);
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spi_message_init_with_transfers(&st->scan_single_msg,
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&st->scan_single_xfer, 1);
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ret = iio_triggered_buffer_setup(indio_dev, NULL,
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&adc108s102_trigger_handler, NULL);
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if (ret)
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goto error_disable_reg;
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ret = iio_device_register(indio_dev);
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if (ret) {
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dev_err(&spi->dev, "Failed to register IIO device\n");
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goto error_cleanup_triggered_buffer;
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}
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return 0;
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error_cleanup_triggered_buffer:
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iio_triggered_buffer_cleanup(indio_dev);
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error_disable_reg:
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regulator_disable(st->reg);
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return ret;
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}
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static int adc108s102_remove(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct adc108s102_state *st = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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regulator_disable(st->reg);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id adc108s102_of_match[] = {
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{ .compatible = "ti,adc108s102" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, adc108s102_of_match);
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#endif
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id adc108s102_acpi_ids[] = {
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{ "INT3495", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, adc108s102_acpi_ids);
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#endif
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static const struct spi_device_id adc108s102_id[] = {
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{ "adc108s102", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, adc108s102_id);
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static struct spi_driver adc108s102_driver = {
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.driver = {
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.name = "adc108s102",
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.of_match_table = of_match_ptr(adc108s102_of_match),
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.acpi_match_table = ACPI_PTR(adc108s102_acpi_ids),
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},
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.probe = adc108s102_probe,
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.remove = adc108s102_remove,
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.id_table = adc108s102_id,
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};
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module_spi_driver(adc108s102_driver);
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MODULE_AUTHOR("Bogdan Pricop <bogdan.pricop@emutex.com>");
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MODULE_DESCRIPTION("Texas Instruments ADC108S102 and ADC128S102 driver");
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MODULE_LICENSE("GPL v2");
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