207 lines
5.5 KiB
C
207 lines
5.5 KiB
C
/*
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* pata_sch.c - Intel SCH PATA controllers
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*
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* Copyright (c) 2008 Alek Du <alek.du@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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/*
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* Supports:
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* Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at:
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* http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/dmi.h>
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#define DRV_NAME "pata_sch"
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#define DRV_VERSION "0.2"
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/* see SCH datasheet page 351 */
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enum {
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D0TIM = 0x80, /* Device 0 Timing Register */
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D1TIM = 0x84, /* Device 1 Timing Register */
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PM = 0x07, /* PIO Mode Bit Mask */
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MDM = (0x03 << 8), /* Multi-word DMA Mode Bit Mask */
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UDM = (0x07 << 16), /* Ultra DMA Mode Bit Mask */
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PPE = (1 << 30), /* Prefetch/Post Enable */
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USD = (1 << 31), /* Use Synchronous DMA */
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};
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static int sch_init_one(struct pci_dev *pdev,
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const struct pci_device_id *ent);
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static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev);
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static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev);
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static const struct pci_device_id sch_pci_tbl[] = {
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/* Intel SCH PATA Controller */
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_IDE), 0 },
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{ } /* terminate list */
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};
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static struct pci_driver sch_pci_driver = {
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.name = DRV_NAME,
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.id_table = sch_pci_tbl,
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.probe = sch_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static struct scsi_host_template sch_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations sch_pata_ops = {
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.inherits = &ata_bmdma_port_ops,
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.cable_detect = ata_cable_unknown,
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.set_piomode = sch_set_piomode,
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.set_dmamode = sch_set_dmamode,
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};
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static struct ata_port_info sch_port_info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA5,
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.port_ops = &sch_pata_ops,
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};
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MODULE_AUTHOR("Alek Du <alek.du@intel.com>");
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MODULE_DESCRIPTION("SCSI low-level driver for Intel SCH PATA controllers");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, sch_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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/**
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* sch_set_piomode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: ATA device
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*
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* Set PIO mode for device, in host controller PCI config space.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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unsigned int pio = adev->pio_mode - XFER_PIO_0;
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struct pci_dev *dev = to_pci_dev(ap->host->dev);
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unsigned int port = adev->devno ? D1TIM : D0TIM;
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unsigned int data;
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pci_read_config_dword(dev, port, &data);
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/* see SCH datasheet page 351 */
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/* set PIO mode */
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data &= ~(PM | PPE);
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data |= pio;
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/* enable PPE for block device */
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if (adev->class == ATA_DEV_ATA)
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data |= PPE;
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pci_write_config_dword(dev, port, data);
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}
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/**
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* sch_set_dmamode - Initialize host controller PATA DMA timings
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* @ap: Port whose timings we are configuring
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* @adev: ATA device
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*
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* Set MW/UDMA mode for device, in host controller PCI config space.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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unsigned int dma_mode = adev->dma_mode;
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struct pci_dev *dev = to_pci_dev(ap->host->dev);
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unsigned int port = adev->devno ? D1TIM : D0TIM;
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unsigned int data;
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pci_read_config_dword(dev, port, &data);
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/* see SCH datasheet page 351 */
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if (dma_mode >= XFER_UDMA_0) {
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/* enable Synchronous DMA mode */
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data |= USD;
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data &= ~UDM;
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data |= (dma_mode - XFER_UDMA_0) << 16;
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} else { /* must be MWDMA mode, since we masked SWDMA already */
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data &= ~(USD | MDM);
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data |= (dma_mode - XFER_MW_DMA_0) << 8;
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}
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pci_write_config_dword(dev, port, data);
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}
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/**
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* sch_init_one - Register SCH ATA PCI device with kernel services
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* @pdev: PCI device to register
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* @ent: Entry in sch_pci_tbl matching with @pdev
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*
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* LOCKING:
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* Inherited from PCI layer (may sleep).
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*
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* RETURNS:
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* Zero on success, or -ERRNO value.
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*/
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static int __devinit sch_init_one(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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static int printed_version;
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const struct ata_port_info *ppi[] = { &sch_port_info, NULL };
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struct ata_host *host;
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int rc;
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if (!printed_version++)
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dev_printk(KERN_DEBUG, &pdev->dev,
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"version " DRV_VERSION "\n");
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/* enable device and prepare host */
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rc = pcim_enable_device(pdev);
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if (rc)
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return rc;
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rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
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if (rc)
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return rc;
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pci_set_master(pdev);
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return ata_pci_sff_activate_host(host, ata_sff_interrupt, &sch_sht);
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}
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static int __init sch_init(void)
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{
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return pci_register_driver(&sch_pci_driver);
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}
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static void __exit sch_exit(void)
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{
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pci_unregister_driver(&sch_pci_driver);
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}
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module_init(sch_init);
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module_exit(sch_exit);
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