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Clément Léger a38c1e766f riscv: fix misaligned access handling of C.SWSP and C.SDSP 
[ Upstream commit 22e0eb0483 ]

This is a backport of a fix that was done in OpenSBI: ec0559eb315b
("lib: sbi_misaligned_ldst: Fix handling of C.SWSP and C.SDSP").

Unlike C.LWSP/C.LDSP, these encodings can be used with the zero
register, so checking that the rs2 field is non-zero is unnecessary.

Additionally, the previous check was incorrect since it was checking
the immediate field of the instruction instead of the rs2 field.

Fixes: 956d705dd2 ("riscv: Unaligned load/store handling for M_MODE")
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Link: https://lore.kernel.org/r/20231103090223.702340-1-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
 		2023-12-13 18:39:16 +01:00
..
boot riscv: dts: sifive: fu740: fix size of pcie 32bit memory 2023-01-24 07:24:37 +01:00
configs riscv: enable CD-ROM file systems in defconfig 2022-08-25 17:01:09 -07:00
errata RISC-V: fix taking the text_mutex twice during sifive errata patching 2023-05-17 11:53:41 +02:00
include riscv: mm: Update the comment of CONFIG_PAGE_OFFSET 2023-11-28 17:07:19 +00:00
kernel riscv: fix misaligned access handling of C.SWSP and C.SDSP 2023-12-13 18:39:16 +01:00
kvm RISC-V: Align SBI probe implementation with spec 2023-05-11 23:03:04 +09:00
lib riscv: uaccess: Return the number of bytes effectively not copied 2023-08-23 17:52:38 +02:00
mm riscv: correct pt_level name via pgtable_l5/4_enabled 2023-11-28 17:07:20 +00:00
net riscv, bpf: Sign-extend return values 2023-10-19 23:08:53 +02:00
purgatory riscv/purgatory: remove PGO flags 2023-06-21 16:00:55 +02:00
Kbuild riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild 2022-06-01 22:26:32 -07:00
Kconfig riscv: Fix build errors using binutils2.37 toolchains 2023-08-30 16:11:08 +02:00
Kconfig.debug
…
Kconfig.erratas riscv: make t-head erratas depend on MMU 2022-09-17 01:48:22 -07:00
Kconfig.socs riscv: Kconfig: Style cleanups 2022-06-30 19:26:16 -07:00
Makefile riscv: Handle zicsr/zifencei issues between clang and binutils 2023-03-30 12:49:28 +02:00