Commit Graph

263961 Commits

Author SHA1 Message Date
Ben Widawsky f372b85463 drm/i915: Remove early exit on i915_gpu_idle
[Description from: Daniel Vetter]
I've just discussed this quickly with Chris on irc and it's probably
best to just kill the list_empty early bailout. gpu_idle isn't a
fastpath, so who cares. One candidate where we emit commands to the ring
without adding anything onto these lists is e.g. pageflip. There are
probably more.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 15:26:38 -07:00
David Woodhouse bab31a224e intel-iommu: Export a flag indicating that the IOMMU is used for iGFX.
We really don't want this to work in the general case; device drivers
*shouldn't* care whether they are behind an IOMMU or not. But the
integrated graphics is a special case, because the IOMMU and the GTT are
all kind of smashed into one and generally horrifically buggy, so it's
reasonable for the graphics driver to want to know when the IOMMU is
active for the graphics hardware.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 15:26:38 -07:00
David Woodhouse d15bf23bc0 intel-iommu: Workaround IOTLB hang on Ironlake GPU
To work around a hardware issue, we have to submit IOTLB flushes while
the graphics engine is idle. The graphics driver will (we hope) go to
great lengths to ensure that it gets that right on the affected
chipset(s)... so let's not screw it over by deferring the unmap and
doing it later. That wouldn't be very helpful.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 15:26:38 -07:00
Daniel Vetter 130c2561de drm/i915: drop KM_USER0 argument to k(un)map_atomic
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 15:26:37 -07:00
Daniel Vetter 24dd85ff72 io-mapping: ensure io_mapping_map_atomic _is_ atomic
For the !HAVE_ATOMIC_IOMAP case the stub functions did not call
pagefault_disable/_enable. The i915 driver relies on the map
actually being atomic, otherwise it can deadlock with it's own
pagefault handler in the gtt pwrite fastpath.

This is exercised by gem_mmap_gtt from the intel-gpu-toosl gem
testsuite.

v2: Chris Wilson noted the lack of an include.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38115
Cc: stable@kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 15:26:17 -07:00
Chris Wilson 8ffc024681 drm/i915: Defend against userspace creating a gem object with size==0
We currently only round up the userspace size to the next page. We
assume that userspace hasn't made a mistake and requested a zero-length
gem object and all through our internal code we then presume that every
object is backed by at least a single page. Fix that oversight and
report EINVAL back to userspace if they try to create a zero length
object.

[danvet: This fixes tests/gem_bad_length]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:19 -07:00
Daniel Vetter 6dacfd2faa drm/i915: simplify swapin/out swizzle checking a bit
Use the helper function already employed by the pwrite/pread
functions.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:18 -07:00
Daniel Vetter acc83eb5a1 drm/i915: fix swizzling on gen6+
Fixes tests/gem_tiled_pread on my snb. I know, mesa doesn't use this
on gen6+, but I also hate failing testcases.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:18 -07:00
Daniel Vetter 6fdd4d98e5 drm/i915: properly cancel rps_work on module unload v2
The rps disabling code wasn't properly cancelling outstanding work
items. Also add a comment that explains why we're not racing with
the work item that could unmask interrupts - that piece of code
confused me quite a bit.

v2: Ben Widawsky pointed out that the first patch would deadlock
(and a few lesser problems). All corrected.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:17 -07:00
Daniel Vetter a9e2641dee drm/i915: close PM interrupt masking races in the rps work func
This patch closes the following race:

We get a PM interrupt A, mask it, set dev_priv->iir = PM_A and kick of the
work item. Scheduler isn't grumpy, so the work queue takes rps_lock,
grabs pm_iir = dev_priv->pm_iir and pm_imr = READ(PMIMR). Note that
pm_imr == pm_iir because we've just masked the interrupt we've got.

Now hw sends out PM interrupt B (not masked), we process it and mask
it.  Later on the irq handler also clears PMIIR.

Then the work item proceeds and at the end clears PMIMR. Because
(local) pm_imr == pm_iir we have
        pm_imr & ~pm_iir == 0
so all interrupts are enabled.

Hardware is still interrupt-happy, and sends out a new PM interrupt B.
PMIMR doesn't mask B (it does not mask anything), PMIIR is cleared, so
we get it and hit the WARN in the interrupt handler (because
dev_priv->pm_iir == PM_B).

That's why I've moved the
        WRITE(PMIMR, 0)
up under the protection of the rps_lock. And write an uncoditional 0
to PMIMR, because that's what we'll do anyway.

This races looks much more likely because we can arbitrarily extend
the window by grabing dev->struct mutex right after the irq handler
has processed the first PM_B interrupt.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:17 -07:00
Daniel Vetter 4fb066ab9e drm/i915: close PM interrupt masking races in the irq handler
Quoting Chris Wilson's more concise description:

"Ah I think I see the problem. As you point out we only mask the current
interrupt received, so that if we have a task pending (and so IMR != 0) we
actually unmask the pending interrupt and so could receive it again before the
tasklet is finally kicked off by the grumpy scheduler."

We need the hw to issue PM interrupts A, B, A while the scheduler is hating us
and refuses to run the rps work item. On receiving PM interrupt A we hit the
WARN because

dev_priv->pm_iir == PM_A | PM_B

Also add a posting read as suggested by Chris to ensure proper ordering of the
writes to PMIMR and PMIIR. Just in case somebody weakens write ordering.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:16 -07:00
Adam Jackson d5090b9625 drm/i915: Remove redundant bit shifting from intel_gmbus_set_speed
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:16 -07:00
Adam Jackson 8bf38485de drm/i915: Rename intel_sdvo_hdmi_sink_detect
This is general TMDS detect, not HDMI specifically.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:16 -07:00
Adam Jackson 2294488da3 drm/i915: Fix multifunction SDVO detection
I can't think of any sensible reason to limit this to a mask of 0x0f,
ie, SDVO_OUTPUT_{TMDS,RGB,CVBS,SVID}0.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:15 -07:00
Adam Jackson 46eb303682 drm/i915: Remove "i2c_speed" nonsense from child device table
I have no evidence for this byte being used this way, and lots of
counterexamples.  Restore the struct to its empirical definition and
patch up gmbus setup to match.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-20 14:11:15 -07:00
Keith Packard 9a1f57808a Merge branch 'fix-pch-refclk' into foo 2011-10-20 14:10:43 -07:00
Keith Packard 86a3073e48 Merge branch 'edp-training-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/intel_dp.c

Just whitespace change conflicts
2011-10-20 14:10:07 -07:00
Keith Packard 32ce697c53 drm/i915: No need to wait for eDP power off delay if panel is on
If the panel is powered up, there's no need to delay for the 'off'
interval when turning the panel on.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-12 10:37:46 -06:00
Keith Packard 05ce1a4961 drm/i915: Restrict ILK-specific eDP power hack to ILK
This eliminates a fairly long delay when power sequencing newer
hardware

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-12 10:37:38 -06:00
Keith Packard bd94315971 drm/i915: Disable eDP VDD in a delayed work proc instead of synchronously
There's no good reason to turn off the eDP force VDD bit synchronously
while probing devices; that just sticks a huge delay into all mode
setting paths. Instead, queue a delayed work proc to disable the VDD
force bit and then remember when that fires to ensure that the
appropriate delay is respected before trying to turn it back on.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-06 08:57:02 -07:00
Keith Packard ebf33b1881 drm/i915: Create helper functions to determine eDP power state
We need to check eDP VDD force and panel on in several places, so
create some simple helper functions to avoid duplicating code.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-06 08:57:01 -07:00
Keith Packard 7d639f35b7 drm/i915: edp_panel_on does not need to return a bool
The return value was unused, so just stop doing that.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-06 08:57:01 -07:00
Keith Packard d15456de79 drm/i915: Move eDP panel fixed mode from dev_priv to intel_dp
This value doesn't come directly from the VBT, and so is rather
specific to the particular DP output.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-06 08:57:00 -07:00
Keith Packard f01eca2e52 drm/i915: Correct eDP panel power sequencing delay computations
Store the panel power sequencing delays in the dp private structure,
rather than the global device structure. Who knows, maybe we'll get
more than one eDP device in the future.

From the eDP spec, we need the following numbers:

 T1 + T3	Power on to Aux Channel operation (panel_power_up_delay)

		This marks how long it takes the panel to boot up and
		get ready to receive aux channel communications.

 T8		Video signal to backlight on (backlight_on_delay)

		Once a valid video signal is being sent to the device,
		it can take a while before the panel is actuall
		showing useful data. This delay allows the panel
		to get something reasonable up before the backlight
		is turned on.

 T9		Backlight off to video off (backlight_off_delay)

		Turning the backlight off can take a moment, so
		this delay makes sure there is still valid video
		data on the screen.

 T10		Video off to power off (panel_power_down_delay)

		Presumably this delay allows the panel to perform
		an orderly shutdown of the display.

 T11 + T12	Power off to power on (panel_power_cycle_delay)

		So, once you turn the panel off, you have to wait a
		while before you can turn it back on. This delay is
		usually the longest in the entire sequence.

Neither the VBIOS source code nor the hardware documentation has a
clear mapping between the delay values they provide and those required
by the eDP spec. The VBIOS code actually uses two different labels for
the delay values in the five words of the relevant VBT table.

**** MORE LATER ***

Look at both the current hardware register settings and the VBT
specified panel power sequencing timings. Use the maximum of the two
delays, to make sure things work reliably. If there is no VBT data,
then those values will be initialized to zero, so we'll just use the
values as programmed in the hardware. Note that the BIOS just fetches
delays from the VBT table to place in the hardware registers, so we
should get the same values from both places, except for rounding.

VBT doesn't provide any values for T1 or T2, so we'll always just use
the hardware value for that.

The panel power up delay is thus T1 + T2 + T3, which should be
sufficient in all cases.

The panel power down delay is T1 + T2 + T12, using T1+T2 as a proxy
for T11, which isn't available anywhere.

For the backlight delays, the eDP spec says T6 + T8 is the delay from the
end of link training to backlight on and T9 is the delay from
backlight off until video off. The hardware provides a 'backlight on'
delay, which I'm taking to be T6 + T8 while the VBT provides something
called 'T7', which I'm assuming is s

On the macbook air I'm testing with, this yields a power-up delay of
over 200ms and a power-down delay of over 600ms. It all works now, but
we're frobbing these power controls several times during mode setting,
making the whole process take an awfully long time.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-06 08:37:15 -07:00
Keith Packard f58ff8549e drm/i915: Ensure eDP powered up during DP_SET_POWER operation in dp_prepare
Any call to intel_dp_sink_dpms must ensure that the panel has power so
that the DP_SET_POWER operation will be correctly received. The only
one missing this was in intel_dp_prepare.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-05 19:56:52 -07:00
Keith Packard 0b5c541b93 drm/i915: Enable eDP panel power during I2C initialization sequence
The DP i2c initialization code does a couple of i2c transactions,
which means that an eDP panel must be powered up.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-05 19:56:51 -07:00
Keith Packard 8c241fef3e drm/i915: Wrap DP EDID fetch functions to enable eDP panel power
Talking to the eDP DDC channel requires that the panel be powered
up. Wrap both the EDID and modes fetch code with calls to turn the vdd
power on and back off.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-05 19:56:51 -07:00
Keith Packard 552fb0b7a6 drm/i915: Delay DP i2c initialization until panel power timings are computed
On eDP, DDC requires panel power, but turning that on uses the panel
power sequencing timing values fetch from the DPCD data.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-05 19:56:50 -07:00
Keith Packard 245e270877 drm/i915: Ensure panel is on during DPMS off
If the panel is already off, we'll need to turn VDD on to execute the
(useless) DPMS off code. Yes, it would be better to just not do any of
this, but correctness, and *then* performance.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-10-05 19:54:29 -07:00
Keith Packard bee7eb2da2 drm/i915: Turn force VDD back off when panel running in intel_dp_dpms
The VDD force bit is turned on before touching the panel, but if it
was enabled, there was no call to turn it back off. Add a call.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-09-30 16:23:46 -07:00
Keith Packard 97af61f57e drm/i915: Check for eDP inside edp panel on/off funcs
Cleans up code dealing with eDP a bit. Remove redundant checks in
callers

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-30 16:23:46 -07:00
Keith Packard 1c0ae80a5e drm/i915: Unlock PCH_PP_CONTROL always
Avoid any question about locked registers by just writing the unlock
pattern with every write to the register.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-30 16:23:45 -07:00
Keith Packard 9b984daec4 drm/i915: Check eDP power when doing aux channel communications
Verify that the eDP VDD is on, either with the panel being on or with
the VDD force-on bit being set.

This demonstrates that in many instances, VDD is not on when needed,
which leads to failed EDID communications.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-30 16:23:45 -07:00
Keith Packard 47f0eb2234 drm/i915: Only use VBT panel mode on eDP if no EDID is found
We're going to assume that EDID is more reliable than the VBT tables
for eDP panels, which is notably true on MacBook machines where the
VBT contains completely bogus data.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-09-30 16:23:44 -07:00
Keith Packard 192aac1f19 drm/i915: Shut down PCH interrupts during irq_uninstall
This masks out all interrupts and ack's any pending ones at IRQ
uninstall time to make sure we don't receive any unexpected interrupts
later on.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-09-30 15:30:41 -07:00
Keith Packard 7fe0b973fa drm/i915: Enable digital port hotplug on PCH systems
We were relying on the BIOS to set these bits, which doesn't always
happen.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-09-30 15:30:01 -07:00
Keith Packard 0ac225e569 Merge branch 'drm-intel-fixes' into drm-intel-next 2011-09-28 14:44:38 -07:00
Keith Packard 9fb526db97 drm/i915: Initialize PCH refclks at modeset init time
The reference clock configuration must be done before any mode setting
can occur as all outputs must be disabled to change
anything. Initialize the clocks after turning everything off during
the initialization process.

Also, re-initialize the refclk at resume time.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-28 14:08:38 -07:00
Keith Packard afffb9dfb6 drm/i915: All PCH refclks are 120MHz
I can't find any reference clocks which run at 96MHz as seems to be
indicated from the comments in this code.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-28 14:08:37 -07:00
Keith Packard 99eb6a01e5 drm/i915: Use CK505 as non-SSC source where available
When trying to use SSC on Ibex Peak without CK505, any non-SSC outputs
(like VGA or TV) get broken. So, do not use SSC on Ibex Peak unless
there is a CK505 available (as specified by the VBT).

On Cougar Point, all clocking is internal, so SSC can always be used,
and there will never be a CK505 available.

This eliminates VGA shimmer on some Ironlake machines which have a
CK505 clock source.

References: https://bugzilla.kernel.org/show_bug.cgi?id=21742
References: https://bugs.freedesktop.org/show_bug.cgi?id=38750
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-28 14:08:06 -07:00
Keith Packard 199e5d79f1 drm/i915: Fix PCH SSC reference clock settings
The PCH refclk settings are global, so we need to look at all of the
encoders, not just the current encoder when deciding how to configure
it. Also, handle systems with more than one panel (any combination of
PCH/non-PCH eDP and LVDS).

Disable SSC clocks when no panels are connected.

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-27 11:12:56 -07:00
Keith Packard 72bbe58cd9 drm/i915: Allow SSC parameter to override VBT value
Allow SSC to be enabled even when the BIOS disables it for testing SSC paths.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-27 11:12:40 -07:00
Keith Packard d2830bdb84 drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS
This includes whether an eDP panel is present, and whether that should
use SSC (and at what frequency)

Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-27 11:12:39 -07:00
Keith Packard abd0686018 drv/i915: Pull display_clock_mode out of VBT table
This tells the driver whether a CK505 clock source is available on
pre-PCH hardware. If so, it should be used as the non-SSC source,
leaving the internal clock for use as the SSC source.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Chris Wison <chris@chris-wilson.co.uk>
2011-09-27 11:12:26 -07:00
Keith Packard 562396b9e4 drm/i915: Use DRM_DEBUG_KMS for all messages in intel_bios.c
These are all KMS related anyways, so don't hide them under other
debug levels.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-27 11:12:10 -07:00
Keith Packard 395072592e drm/i915: broken copyright encoding in intel_bios.c
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-26 22:29:38 -07:00
Keith Packard cd0de039bf drm/i915: FBC off for ironlake and older, otherwise on by default
Make the default FBC behaviour chipset specific, allowing us to turn
it on by default for Ironlake and older where it has been seen to
cause trouble with screen updates.

Signed-off-by: Keith Packard <keithp@keithp.com>
Tested-by: Francis Moreau <francis.moro@gmail.com>
2011-09-21 15:03:11 -07:00
Simon Farnsworth cc68c81aed drm/i915: Enable SDVO hotplug interrupts for HDMI and DVI
I was seeing a nasty 5 frame glitch every 10 seconds, caused by the
poll for connection on DVI attached by SDVO.

As my SDVO DVI supports hotplug detect interrupts, the fix is to
enable them, and hook them in to the various bits of driver
infrastructure so that they work reliably.

Note that this is only tested on single-function DVI-D SDVOs, on two
platforms (965GME and 945GSE), and has not been checked against a
specification document.

With lots of help from Adam Jackson <ajax@redhat.com> on IRC.

Signed-off-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-21 14:55:51 -07:00
Keith Packard 64a742fac3 Merge branch 'drm-intel-fixes' into drm-intel-next 2011-09-21 14:52:46 -07:00
Ben Widawsky c8c99b0f0d drm/i915: Dumb down the semaphore logic
While I think the previous code is correct, it was hard to follow and
hard to debug. Since we already have a ring abstraction, might as well
use it to handle the semaphore updates and compares.

I don't expect this code to make semaphores better or worse, but you
never know...

v2:
Remove magic per Keith's suggestions.
Ran Daniel's gem_ring_sync_loop test on this.

v3:
Ignored one of Keith's suggestions.

v4:
Removed some bloat per Daniel's recommendation.

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-09-21 14:52:41 -07:00