Commit Graph

528 Commits

Author SHA1 Message Date
Viresh Kumar 9cc236827f Shiraz has moved
shiraz.hashim@st.com email-id doesn't exist anymore as he has left the
company.  Replace ST's id with shiraz.linux.kernel@gmail.com.

It also updates .mailmap file to fix address for 'git shortlog'.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-04-18 16:40:08 -07:00
Pekon Gupta c7ea95a377 mtd: devices: elm: update DRIVER_NAME as "omap-elm"
use "omap-elm" as DRIVER_NAME

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-25 23:09:06 -07:00
Pekon Gupta 79f013518d mtd: devices: elm: configure parallel channels based on ecc_steps
ELM hardware can process up to maximum of 8 hannels in parallel for
ECC error detection. Currently the number of channels getting configured for
processing is static determined by macro ERROR_VECTOR_MAX. However, the actual
number of channels that need to be processed is the ECC step number.
This patch just avoids configuring extra unused channels.

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-25 23:09:02 -07:00
Pekon Gupta ea0760244d mtd: devices: elm: clean elm_load_syndrome
This patch refactors elm_load_syndrome() to make it scalable for newer
ECC schemes by removing scheme specific macros (like ECC_BYTES*xx),
and instead using ECC control information passed during elm_config.

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-25 23:08:57 -07:00
Pekon Gupta 3f4eb14bdb mtd: devices: elm: check for hardware engine's design constraints
ELM hardware engine is used by BCH ecc-schemes for detecting and locating ECC
errors. This patch adds the following checks for ELM hardware engine:

 - ELM internal buffers are of 1K,
   so it cannot process data with ecc-step-size > 1K.

 - ELM engine can execute upto maximum of 8 threads in parallel,
   so in *page-mode* (when complete page is processed in single iteration),
   ELM cannot support ecc-steps > 8.

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-25 23:08:52 -07:00
Lee Jones d9ba46d32c mtd: st_spi_fsm: Succinctly reorganise .remove()
Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:56:53 -07:00
Lee Jones ea7864bf44 mtd: st_spi_fsm: Allow loop to run at least once before giving up CPU
Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:56:52 -07:00
Lee Jones f1919cb852 mtd: st_spi_fsm: Correct vendor name spelling issue - missing "M"
Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:56:52 -07:00
Lee Jones 0419a203f8 mtd: st_spi_fsm: Avoid duplicating MTD core code
Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:56:51 -07:00
Lee Jones 3f9d720a4d mtd: st_spi_fsm: Remove useless consts from function arguments
Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Brian: tweaked a bit]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:56:51 -07:00
Lee Jones 221cff13ca mtd: st_spi_fsm: Convert ST SPI FSM (NOR) Flash driver to new DT partitions
The old API expected a "partitions" property provided a phandle to a
separate partitions node, which itself contained yet more nodes each
representing one partition. The new API rids the requirement for the
superfluous intermediary partitions node. This patch provides the
added information required for automatic parsing by the core.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:22 -07:00
Lee Jones e6b1bb4e18 mtd: st_spi_fsm: Move runtime configurable msg sequences into device's struct
Until now the dynamically configurable message sequences for read, write
and enable 32bit addressing have been global. Brian makes a good point
why this should not be the case. If there are ever two FSM's located on
the same platform, we could be potentially introducing a race condition
on "needlessly shared data".

Suggested-by: Brian Norris <computersforpeace@gmail.com>
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:21 -07:00
Lee Jones cd7cac9ec3 mtd: st_spi_fsm: Supply the W25Qxxx chip specific configuration call-back
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:21 -07:00
Lee Jones 5343a12345 mtd: st_spi_fsm: Supply the S25FLxxx chip specific configuration call-back
This patch allows us to prepare some of the message sequences which will
be required to talk to the  S25FLxxx family of Serial Flash devices. It
also allows us to do some required extra operations after any busy wait
failures.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:21 -07:00
Lee Jones 898180665f mtd: st_spi_fsm: Supply the MX25xxx chip specific configuration call-back
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:21 -07:00
Lee Jones 150571b74a mtd: st_spi_fsm: Add the ability to write to FSM's status register
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:20 -07:00
Lee Jones ac94dbcb67 mtd: st_spi_fsm: Add the ability to read the FSM's status
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:20 -07:00
Lee Jones 4a341fe758 mtd: st_spi_fsm: Erase partly or as a whole a Serial Flash device
When an erase is requested by userspace the MTD framework calls back
into the driver to conduct the actual command issue. Here we provide the
routines which do exactly that. We can choose to either do an entire chip
erase or by sector.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:20 -07:00
Lee Jones 176b437762 mtd: st_spi_fsm: Supply a busy wait for post-write status
When we write data to the Serial Flash chip we'll wait a predetermined
period of time before giving up. During that period of time we poll the
status register until completion.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:19 -07:00
Lee Jones 30ca64f9f9 mtd: st_spi_fsm: Write to Flash via the FSM FIFO
When we write data to the FIFO the FSM Controller subsequently writes
that data out to the Serial Flash chip.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:19 -07:00
Lee Jones e514f10578 mtd: st_spi_fsm: Add the ability to read from a Serial Flash device
When a read is issued by userspace the MTD framework calls back into
the driver to conduct the actual command issue and data extraction.
Here we provide the routines which do exactly that.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:19 -07:00
Lee Jones 4eb3f0d8f7 mtd: st_spi_fsm: Prepare default sequences for read/write/erase
Most chips require a predefined set of FSM message sequences for read,
write and erase operations. This patch provides a way to set them up,
which it will do so if a chip specific initialisation routine isn't
been provided.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:18 -07:00
Lee Jones 218b870f90 mtd: st_spi_fsm: Supply the N25Qxxx chip specific configuration call-back
In the FSM driver we handle chip differences by providing the possibility
of calling back into a chip specific initialisation routine. In this patch
we provide one for the N25Qxxx series, which endeavours to setup things
like the read, write and erase sequences, as they differ from the
default. We also configure 32bit support and the amount of dummy cycles to
use.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:18 -07:00
Lee Jones e85a619676 mtd: st_spi_fsm: Supply the N25Qxxx specific read configurations
The N25Qxxx Serial Flash devices required different sequence
configurations depending on whether they're running in 24bit (3Byte)
or 32bit (4Byte) mode. We provide those here.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:18 -07:00
Lee Jones a37b2f5aee mtd: st_spi_fsm: Provide the default read/write configurations
Message sequences can vary depending on how many pads (lines) are
required to address the chip (mode & dummy), how many data pads (lines)
are required to write out to the chip which will determine speed
amongst other things which are detailed by the SFDP specification. We
are able to use multiple configurations for each chip, but they need
to me matched to a device's capabilities. These configurations are
listed in preference order - most preferred first.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:18 -07:00
Lee Jones 249516c9c3 mtd: st_spi_fsm: Update the flash Volatile Configuration Register
The FSM Serial Flash Controller is driven by issuing a standard set of
register writes we call a message sequence. This patch supplies a method
to prepare the message sequence responsible for updating a chip's VCR.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:18 -07:00
Lee Jones 0de08e43cd mtd: st_spi_fsm: Provide a method to put the chip into 32bit addressing mode
Most Serial Flash chips support 24bit addressing as a default but more
recent incarnations can support 32bit. Based on information provided
though platform specific data and capabilities we can determine whether
or not our current chip can. This patch provides a means to setup the
FSM message sequence to put the chip into 32bit mode.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:18 -07:00
Lee Jones 0ea7d70693 mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset
Based on information we can obtain though platform specific data and/or
chip capabilities we are able to determine whether or not we can handle
a SoC reset or not. To find out why this is important please read the
comment provided in the patch.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:17 -07:00
Lee Jones 88cccb8911 mtd: st_spi_fsm: Prepare read/write sequences according to configuration
Firstly we search for our preference read/write configuration based on a
given chip's capabilities. Then we actually set up the message sequence
accordingly.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:17 -07:00
Lee Jones 6bd2960080 mtd: st_spi_fsm: Provide the sequence for enabling 32bit addressing mode
The FSM Serial Flash Controller is driven by issuing a standard set of
register writes we call a message sequence. This patch supplies a method
to prepare the message sequence responsible for setting 32bit addressing
mode on the Flash chip.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:17 -07:00
Lee Jones fa5ba3af20 mtd: st_spi_fsm: Provide the erase one sector sequence
The FSM Serial Flash Controller is driven by issuing a standard set of
register writes we call a message sequence. This patch supplies a method
to prepare the message sequence responsible for erasing a single sector.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:17 -07:00
Lee Jones a63984c18a mtd: st_spi_fsm: Fetch boot-device from mode pins
It's important for us to determine which device was used to boot from in
order to make some correct decisions surrounding Power Management. On
each of the platforms which support the FSM this is communicated via
a set of mode pins held in the system configuration area. This patch
determine the boot device and stores the result.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:17 -07:00
Lee Jones 97ccf2d253 mtd: st_spi_fsm: Prepare the read/write FSM message sequence(s)
The FSM Serial Flash Controller is driven by issuing a standard set of
register writes we call a message sequence. This patch supplies a method
to prepare read/write FSM message sequence(s) based on chip capability
and configuration.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:16 -07:00
Lee Jones 3b5d198193 mtd: st_spi_fsm: Use device size to determine address width
Take some known parameters, namely size and number of sectors and use
them to determine weather a device can support 32bit addressing or not.
If it can, set the associated flash capability flag for latter use.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:16 -07:00
Lee Jones 089812740d mtd: st_spi_fsm: Search for preferred FSM message sequence configurations
Here we provide a means to traverse though all supplied FSM message
sequence configurations and pick one based on our chip's capabilities.
The first one we match will be the preferred one, as they are
presented in order of preference.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:16 -07:00
Lee Jones 24fec651d1 mtd: st_spi_fsm: Dynamically setup flash device based on JEDEC ID
Using previously added infrastructure we can now extract a device's JEDEC
ID, compare it to a list of known and supported devices and make assumptions
based on known characteristics of a given chip.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:15 -07:00
Lee Jones 11d7f82663 mtd: st_spi_fsm: Provide device look-up table
Supply a lookup table of all the devices we intend to support. This table
is used to store device information such as; a human readable device name,
their JEDEC ID (plus the extended version), sector size and amount, a bit
store of a device's capabilities, its maximum running frequency and
possible use of a per-device configuration call-back.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:15 -07:00
Lee Jones 5549fbd514 mtd: devices: Provide header for shared OPCODEs and SFDP commands
JEDEC have helped to standardise a great deal of the commands which
can be issued to a Serial Flash devices. Many of the Serial Flash
Discoverable Parameters (SFDP) commands are generic across devices.
This patch provides a shared point where these commands can be
defined.

Suggested-by: Mark Brown <broonie@kernel.org>
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:15 -07:00
Lee Jones 1bd512b562 mtd: st_spi_fsm: Add support for JEDEC ID extraction
Once we start supporting devices it will be handy go detect them
dynamically. This will be done using the chip's unique JEDEC ID. This
patch allows us to extract a device's JEDEC ID using the a predefined
FSM register write sequence.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:15 -07:00
Lee Jones 030e82dc63 mtd: st_spi_fsm: Supply a method to read from the FSM's FIFO
When invoked the driver will attempt to read any available data from
the FSM's data register. Any data collected from this FIFO would have
originated from the flash chip.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:14 -07:00
Lee Jones 3c8b85b340 mtd: st_spi_fsm: Supply framework for device requests
The FSM hardware works by setting a predetermined sequence of register
writes. Rather than open coding them inside each functional block we're
going to define them in a series of formatted 'sequence structures'.
This patch provides the framework which shall be used for every action.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:14 -07:00
Lee Jones 86f309fd8f mtd: st_spi_fsm: Initialise and configure the FSM for normal working conditions
This patch uses default values to initialise a connected flash chip. This
includes; a device soft reset, setting of a safe working frequency, a
switch into Fast Sequencing Mode, configuring of timing data and a purge
of the FIFO.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:14 -07:00
Lee Jones bc09fb5756 mtd: st_spi_fsm: Supply all register address and bit logic defines
Here we provide the FSM's register addresses, register bit names/offsets
and some commands which will prove useful as we start bulk the FMS's
driver out with functionality.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:14 -07:00
Lee Jones d90db4a074 mtd: st_spi_fsm: Allocate resources and register with MTD framework
This is a new driver. It's used to communicate with a special type of
optimised Serial Flash Controller called the FSM. The FSM uses a subset
of the SPI protocol to communicate with supported NOR-Flash devices.

Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-20 04:17:14 -07:00
Christian Riesch 9a78bc83b4 mtd: Fix the behavior of OTP write if there is not enough room for data
If a write to one time programmable memory (OTP) hits the end of this
memory area, no more data can be written. The count variable in
mtdchar_write() in drivers/mtd/mtdchar.c is not decreased anymore.
We are trapped in the loop forever, mtdchar_write() will never return
in this case.

The desired behavior of a write in such a case is described in [1]:
- Try to write as much data as possible, truncate the write to fit into
  the available memory and return the number of bytes that actually
  have been written.
- If no data could be written at all, return -ENOSPC.

This patch fixes the behavior of OTP write if there is not enough space
for all data:

1) mtd_write_user_prot_reg() in drivers/mtd/mtdcore.c is modified to
   return -ENOSPC if no data could be written at all.
2) mtdchar_write() is modified to handle -ENOSPC correctly. Exit if a
   write returned -ENOSPC and yield the correct return value, either
   then number of bytes that could be written, or -ENOSPC, if no data
   could be written at all.

Furthermore the patch harmonizes the behavior of the OTP memory write
in drivers/mtd/devices/mtd_dataflash.c with the other implementations
and the requirements from [1]. Instead of returning -EINVAL if the data
does not fit into the OTP memory, we try to write as much data as
possible/truncate the write.

[1] http://pubs.opengroup.org/onlinepubs/9699919799/functions/write.html

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10 22:42:31 -07:00
Fabian Frederick ea6d833a3f mtd: block2mtd: check device size
fixme applied : check device size is a multiple of erasesize.

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10 22:42:31 -07:00
Brian Norris 6f7db7f320 mtd: m25p80: add Macronix mx66l1g55g 1Gbit SPI flash
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-03-10 22:42:29 -07:00
Christian Riesch 4b78fc42f3 mtd: Add a retlen parameter to _get_{fact,user}_prot_info
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10 22:42:28 -07:00
Kuninori Morimoto bec44c45c2 mtd: m25p80: add support for the Spansion s25fl008k chip
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10 22:42:25 -07:00
Jingoo Han c00cb1b774 mtd: pmc551: Remove unnecessary OOM messages
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10 22:42:24 -07:00