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6 Commits

Author SHA1 Message Date
Ralf Baechle 781b0f8d4f [MIPS] VSMP: Fix initialization ordering bug. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-10-31 20:13:21 +00:00
Ralf Baechle 937a801576 [MIPS] Complete fixes after removal of pt_regs argument to int handlers. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-10-08 02:38:28 +01:00
Chris Dearman 847b9dfcca [MIPS] MT: Initialise all writable bits in Cause register to zero. 
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an
immediate exception when starting the second VPE.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-09-27 13:37:33 +01:00
Thomas Gleixner f40298fddc [PATCH] irq-flags: MIPS: Use the new IRQF_ constants 
Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
 2006-07-02 13:58:47 -07:00
Ralf Baechle f088fc84f9 [MIPS] FPU affinity for MT ASE. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-04-19 04:14:28 +02:00
Ralf Baechle 41c594ab65 [MIPS] MT: Improved multithreading support. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-04-19 04:14:28 +02:00