Change INTCS_VECT_BASE from 0x3400 to 0x2200.
The old value 0x3400 gave the INTCA and INTCS interrupt
conrollers separated spaces, but required ARM support
for more than 512 NR_IRQS which is not in place at this
point.
The value 0x2200 will make some of the INTCA interrupts
make use of empty INTCS areas. This is a bit more error
prone but works fine as a workaround for G3, G3 and AP4.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add SH-Mobile ARM INTCS macros for the INTCS controller.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds preliminary support for the SH-Mobile G-series.
The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside
from the ARM MPU are primarily composed of existing SH IP blocks.
This includes initial support for the SH7367 (SH-Mobile G3) CPU and
the G3EVM reference board.
Only timer, serial console, and NOR flash are supported at this point.
Patches for the interrupt controller, pinmux support, clock framework
and runtime pm will be submitted as feature patches on top of this.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm