Now we have the bus and controller code added to find and initialize
the extended capabilities. Now we need to use them in stream code to
decouple stream, manage links etc
So this patch adds the stream handling code for extended capabilities
introduced in preceding patches
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The controller needs to support the new capabilities and allow
reading, parsing and initializing of these capabilities, so this patch
does it
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The new HDA controllers from Intel support new capabilities like
multilink, pipe processing, SPIB, GTS etc In order to use them we
create an extended HDA bus which embed the hdac bus and contains the
fields for extended configurations
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Jeeja KP