Commit Graph

3024 Commits

Author SHA1 Message Date
Jean Delvare 33f5ccc343 i2c: piix4: Pre-shift the port number
Shift the port number at initialization time, so that it is ready to
use at run time. That way we don't have to do it again for every SMBus
transaction.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-24 15:59:06 +01:00
Jean Delvare 62194e869a i2c: piix4: Always use the same type for port
Sometimes u8 is used to store the port number, sometimes unsigned
short is used. Consistently stick to a single type, for consistency
and to avoid implicit casts.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-24 15:59:05 +01:00
Jean Delvare 6befa3fde6 i2c: piix4: Support alternative port selection register
The SB800 register reference guide says that the SMBus port selection
bits may not always be in register Smbus0En (0x2c) but could
alternatively be found in register Smbus0Sel (0x2e) depending on the
settings in register Smbus0SelEn (0x2f.) Add support for this
configuration.

The "alternative" register is the only one working for the Bolton
(aka Hudson-2) chipset anyway. I do not have any documentation for
the "kerncz" chipset so we treat it the same as the Bolton for now.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-24 15:59:04 +01:00
Wolfram Sang da4753e91c i2c: tegra: don't open code of_device_get_match_data()
This change will also make Coverity happy by avoiding a theoretical NULL
pointer dereference; yet another reason is to use the above helper function
to tighten the code and make it more readable.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2016-02-24 11:24:29 +01:00
Simon Horman 0731614970 i2c: riic, sh_mobile, rcar: Use ARCH_RENESAS
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-24 11:20:30 +01:00
Sricharan R 9cedf3b2f0 i2c: qup: Add bam dma capabilities
QUP cores can be attached to a BAM module, which acts as
a dma engine for the QUP core. When DMA with BAM is enabled,
the BAM consumer pipe transmitted data is written to the
output FIFO and the BAM producer pipe received data is read
from the input FIFO.

With BAM capabilities, qup-i2c core can transfer more than
256 bytes, without a 'stop' which is not possible otherwise.

Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Tested-by: Telkar Nagender <ntelkar@codeaurora.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-24 11:07:59 +01:00
Wolfram Sang 9f8f53a617 i2c: i2c-stub: sort includes
I request this for drivers, so the core should adhere to sorted includes as
well.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-20 23:33:39 +01:00
Wolfram Sang 62c874ab4d i2c: i2c-smbus: sort includes
I request this for drivers, so the core should adhere to sorted includes as
well.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-20 23:33:39 +01:00
Wolfram Sang 5171493221 i2c: i2c-mux: sort includes
I request this for drivers, so the core should adhere to sorted includes as
well.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-20 23:33:39 +01:00
Wolfram Sang a87660737f i2c: i2c-dev: sort includes
I request this for drivers, so the core should adhere to sorted includes as
well.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-20 23:33:38 +01:00
Wolfram Sang 53feedf891 i2c: i2c-core: sort includes
I request this for drivers, so the core should adhere to sorted includes as
well.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-20 23:33:38 +01:00
Wolfram Sang 258d312998 i2c: i2c-boardinfo: sort includes
I request this for drivers, so the core should adhere to sorted includes as
well.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-20 23:33:38 +01:00
Alexandra Yates 1a1503c539 i2c: i801: Adding Intel Lewisburg support for iTCO
Starting from Intel Sunrisepoint (Skylake PCH) the iTCO watchdog
resources have been moved to reside under the i801 SMBus host
controller whereas previously they were under the LPC device.

This patch adds Intel lewisburg SMBus support for iTCO device.
It allows to load watchdog dynamically when the hardware is
present.

Fixes: cdc5a3110e ("i2c: i801: add Intel Lewisburg device IDs")
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2016-02-18 13:18:48 +01:00
Ray Jui 4916eb6909 i2c: iproc: Support larger TX transfer
The current iProc I2C driver only allows each TX transfer up to 63
bytes (the TX FIFO has a size of 64 bytes, and one byte is reserved
for slave address). This patch enhances the driver to support TX
transfer in each I2C message for up to 65535 bytes (a practical
maximum, since member 'max_write_len' of 'struct i2c_adapter_quirks is
of type 'u16')

This works by loading up the I2C TX FIFO and enabling the TX underrun
interrupt for each burst. After each burst of TX data is finished,
i.e., when the TX FIFO becomes empty, the TX underrun interrupt will be
triggered and another burst of TX data can be loaded into the TX FIFO.
This repeats until all TX data are finished

Signed-off-by: Ray Jui <rjui@broadcom.com>
Tested-by: Icarus Chau <ichau@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 22:43:08 +01:00
Ray Jui ed36bfc3b0 i2c: iproc: Fix typo in the driver
Fix typo in the driver from 'I2C_TIMEOUT_MESC' to 'I2C_TIMEOUT_MSEC'

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 22:42:06 +01:00
Ray Jui 6ee608c1c9 i2c: iproc: Add recovery mechanism in error case
Add proper recovery mechanism to the iProc I2C driver in error cases.

Signed-off-by: Icarus Chau <ichau@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Tested-by: Icarus Chau <ichau@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
[wsa: whitespace fixes]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 22:40:02 +01:00
Masahiro Yamada 61c18aeb05 i2c: uniphier: add COMPILE_TEST option
Add COMPILE_TEST for the compilation test coverage.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:40:16 +01:00
Liguo Zhang f4f4fed626 i2c: mt65xx: add 4GB DMA mode support in i2c driver
If 4GB mode is enabled, we should add 4GB DMA mode support in i2c
driver. Set 4GB mode register to support 4GB mode.

Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
[wsa: updated commit message]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:40:15 +01:00
Jarkko Nikula cd998ded5c i2c: designware: Prevent runtime suspend during adapter registration
There can be unnecessary runtime suspend-resume cycle during
i2c-designware-platdrv probe when it registers the I2C adapter device. This
happens because i2c-designware-platdrv is set to initially active platform
device in its probe function and is a parent of I2C adapter.

In that case power.usage_count of i2c-designware device is zero and
pm_runtime_get()/pm_runtime_put() cycle during probe could put it into
runtime suspend. This happens when the i2c_register_adapter() calls the
device_register():

i2c_register_adapter
  device_register
    device_add
      bus_probe_device
        device_initial_probe
          __device_attach
            if (dev->parent) pm_runtime_get_sync(dev->parent)
            ...
            if (dev->parent) pm_runtime_put(dev->parent)

After that the i2c_register_adapter() continues registering I2C slave
devices. In case slave device probe does I2C transfers the parent will
resume again and thus get a needless runtime suspend/resume cycle during
adapter registration.

Prevent this while retaining the runtime PM status of i2c-designware by
only incrementing/decrementing device power usage count during I2C
adapter registration. That makes sure there won't be spurious runtime PM
status changes and lets the driver core to idle the device after probe
finishes.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:40:14 +01:00
Jean Delvare 942ab128ea i2c: designware-platform: Drop duplicate module information
The i2c-designware-platform module has duplicate module information
when CONFIG_I2C_DESIGNWARE_BAYTRAIL is set. It gets the information
from both i2c-designware-platdrv and i2c-designware-baytrail. The
latter is optional extra code which ends up in the same module so it
should not export module information.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:40:13 +01:00
Baruch Siach e3c9765008 i2c: designware: remove redundant lock
The per adapter bus_lock already projects from concurrent calls to the
master_xfer callback. No need to add a driver internal lock.

Also, rephrase a comment to drop mention of this lock.

Reported-by: Rongrong Zou <zourongrong@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:40:12 +01:00
Masahiro Yamada bca71ba034 i2c: uniphier: fix typos in error messages
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:23:37 +01:00
Tony Lindgren e6244deed8 i2c: omap: Fix PM regression with deferred probe for pm_runtime_reinit
Commit 5de85b9d57 ("PM / runtime: Re-init runtime PM states at probe
error and driver unbind") introduced pm_runtime_reinit() that is used
to reinitialize PM runtime after -EPROBE_DEFER. This allows shutting
down the device after a failed probe.

However, for drivers using pm_runtime_use_autosuspend() this can cause
a state where suspend callback is never called after -EPROBE_DEFER.
On the following device driver probe, hardware state is different from
the PM runtime state causing omap_device to produce the following
error:

omap_device_enable() called from invalid state 1

And with omap_device and omap hardware being picky for PM, this will
block any deeper idle states in hardware.

The solution is to fix the drivers to follow the PM runtime documentation:

1. For sections of code that needs the device disabled, use
   pm_runtime_put_sync_suspend() if pm_runtime_set_autosuspend() has
   been set.

2. For driver exit code, use pm_runtime_dont_use_autosuspend() before
   pm_runtime_put_sync() if pm_runtime_use_autosuspend() has been
   set.

Fixes: 5de85b9d57 ("PM / runtime: Re-init runtime PM states at probe
error and driver unbind")
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 19:42:31 +01:00
Sricharan R f74187932d i2c: qup: Transfer each i2c_msg in i2c_msgs without a stop bit
The definition of i2c_msg says that

"If this is the last message in a group, it is followed by a STOP.
Otherwise it is followed by the next @i2c_msg transaction segment,
beginning with a (repeated) START"

So the expectation is that there is no 'STOP' bit inbetween individual
i2c_msg segments with repeated 'START'. Adding the support for the same.

This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.

This patch adds the support in non-dma mode.

Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Tested-by: Telkar Nagender <ntelkar@codeaurora.org>
[wsa: updated commit message]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 19:33:44 +01:00
Sricharan R 191424bb61 i2c: qup: Add V2 tags support
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write. This new tagging version
supports bam dma and transfers of more than 256 bytes without 'stop'
in between. Adding the support for the same.

For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Tested-by: Telkar Nagender <ntelkar@codeaurora.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 19:32:08 +01:00
Sricharan R c4f0c5fb38 i2c: qup: Change qup_wait_writeready function to use for all timeouts
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in other places as well.

Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Tested-by: Telkar Nagender <ntelkar@codeaurora.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 19:29:39 +01:00
Wolfram Sang 50a5ba8769 i2c: mux: demux-pinctrl: add driver
This driver allows an I2C bus to switch between multiple masters. This
is not hot-switching because connected I2C slaves will be
re-instantiated. It is meant to select the best I2C core at runtime once
the task is known. Example: Prefer i2c-gpio over another I2C core
because of HW errata affecting your use case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 19:16:04 +01:00
Jean Delvare 52795f6fde i2c: piix4: don't regress on bus names
The I2C bus names are supposed to be stable as they can be used by
userspace to uniquely identify a specific I2C bus. So restore the
original names for all legacy (pre-SB800) devices.

For SB800 devices and later, improve the names. "SDA" refers to the
serial data pin of each SMBus port, it's an implementation detail the
user doesn't need to know. Use "port" instead, which is easier to
understand.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-29 11:13:52 +01:00
Andy Shevchenko 08c6e8cc66 i2c: designware-pci: use IRQF_COND_SUSPEND flag
This is effectively reapplies the commit b0898fdaff ("i2c: designware-pci: use
IRQF_COND_SUSPEND flag") after the commit d80d134182 ("i2c: designware: Move
common probe code into i2c_dw_probe()"). Original message as follows.

The mentioned flag fixes a warning on Intel Edison board since one of the I2C
controller shares IRQ line with watchdog timer.

Fixes: d80d134182 (i2c: designware: Move common probe code into i2c_dw_probe())
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-26 07:00:27 +01:00
Jean Delvare 83c60158eb i2c: piix4: Fully initialize SB800 before it is registered
This closes a race window where I2C device drivers attempt to access
I2C buses which aren't fully initialized yet.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-26 06:46:33 +01:00
Jean Delvare a28e35171c i2c: piix4: Fix SB800 locking
We need a single mutex for all 4 shared SMBus ports on the SB800. A
per-port mutex doesn't protect us from concurrent access.

In theory the mutex should be per PCI device, however in practice we
know that there's only ever a single instance of the device in a given
system so we can use a global.

Also take the mutex during initialization, as first port may be already
in use when second port is initialized.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
[wsa: made mutex static]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-26 06:46:26 +01:00
Linus Torvalds 32250e4a5f Merge branch 'i2c/for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
 "Quite some driver updates:
   - piix4 can now handle multiplexed adapters
   - brcmstb, xlr, eg20t, designware drivers support more SoCs
   - emev2 gained i2c slave support
   - img-scb and rcar got bigger refactoring to remove issues
   - lots of common driver updates

  i2c core changes:
   - new quirk flag when an adapter does not support clock stretching,
     so clients can be configured to avoid that if possible
   - added a helper function to retrieve timing parameters from firmware
     (with rcar being the first user)
   - "multi-master" DT binding added so drivers can adapt to this
     setting (like disabling PM to keep arbitration working)
   - RuntimePM for the logical adapter device is now always enabled by
     the core to ensure propagation from childs to the parent (the HW
     device)
   - new macro builtin_i2c_driver to reduce boilerplate"

* 'i2c/for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (70 commits)
  i2c: create builtin_i2c_driver to avoid registration boilerplate
  i2c: imx: fix i2c resource leak with dma transfer
  dt-bindings: i2c: eeprom: add another EEPROM device
  dt-bindings: move I2C eeprom descriptions to the proper file
  i2c: designware: Do not require clock when SSCN and FFCN are provided
  DT: i2c: trivial-devices: Add Epson RX8010 and MPL3115
  i2c: s3c2410: remove superfluous runtime PM calls
  i2c: always enable RuntimePM for the adapter device
  i2c: designware: retry transfer on transient failure
  i2c: ibm_iic: rename i2c_timings struct due to clash with generic version
  i2c: designware: Add support for AMD Seattle I2C
  i2c: imx: Remove unneeded comments
  i2c: st: use to_platform_device()
  i2c: designware: use to_pci_dev()
  i2c: brcmstb: Adding support for CM and DSL SoCs
  i2c: mediatek: fix i2c multi transfer issue in high speed mode
  i2c: imx: improve code readability
  i2c: imx: Improve message log when DMA is not used
  i2c: imx: add runtime pm support to improve the performance
  i2c: imx: init bus recovery info before adding i2c adapter
  ...
2016-01-14 11:25:37 -08:00
Rafael J. Wysocki 1e3f28a552 Merge branch 'acpi-soc'
* acpi-soc:
  PM / clk: don't leave clocks enabled when driver not bound
  i2c: dw: Add APM X-Gene ACPI I2C device support
  ACPI / APD: Add APM X-Gene ACPI I2C device support
  ACPI / LPSS: change 'does not have' to 'has' in comment
  Revert "dmaengine: dw: platform: provide platform data for Intel"
  dmaengine: dw: return immediately from IRQ when DMA isn't in use
  dmaengine: dw: platform: power on device on shutdown
  ACPI / LPSS: override power state for LPSS DMA device
  ACPI / LPSS: power on when probe() and otherwise when remove()
  ACPI / LPSS: do delay for all LPSS devices when D3->D0
  ACPI / LPSS: allow to use specific PM domain during ->probe()
  Revert "ACPI / LPSS: allow to use specific PM domain during ->probe()"
  device core: add BUS_NOTIFY_DRIVER_NOT_BOUND notification
  x86/platform/iosf_mbi: Remove duplicate definitions

Conflicts:
	drivers/i2c/busses/i2c-designware-platdrv.c
2016-01-12 01:08:47 +01:00
Rafael J. Wysocki 989652871b Merge branch 'device-properties'
* device-properties:
  device property: avoid allocations of 0 length
  device property: the secondary fwnode needs to depend on the primary
  device property: add spaces to PROPERTY_ENTRY_STRING macro
  include/linux/property.h: fix build issues with gcc-4.4.4
  i2c: designware: Convert to use unified device property API
  mfd: intel-lpss: Pass HSUART configuration via properties
  mfd: intel-lpss: Pass SDA hold time to I2C host controller driver
  mfd: intel-lpss: Add support for passing device properties
  mfd: core: propagate device properties to sub devices drivers
  driver core: Do not overwrite secondary fwnode with NULL if it is set
  driver core: platform: Add support for built-in device properties
  device property: Take a copy of the property set
  device property: Fallback to secondary fwnode if primary misses the property
  device property: return -EINVAL when property isn't found in ACPI
  device property: improve readability of macros
  device property: helper macros for property entry creation
  device property: keep single value inplace
  device property: refactor built-in properties support
  device property: rename helper functions
  device property: always check for fwnode type
2016-01-12 01:07:46 +01:00
Gao Pan c552815312 i2c: imx: fix i2c resource leak with dma transfer
In i2c_imx_dma_xfer(), when dmaengine_submit() returns error,
the context goto label err_submit and then return. However, the
memory allocated for txdesc has not been freed yet, which
leads to resource leak.

Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-10 10:10:28 +01:00
Suravee Suthikulpanit b33af11de2 i2c: designware: Do not require clock when SSCN and FFCN are provided
The current driver uses input clock source frequency to calculate
values for [SS|FS]_[HC|LC] registers. However, when booting ACPI, we do not
currently have a good way to provide the frequency information.
Instead, we can leverage the SSCN and FFCN ACPI methods, which can be used
to directly provide these values. So, the clock information should
no longer be required during probing.

However, since clk can be invalid, additional checks must be done where
we are making use of it.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Tested-by: Loc Ho <lho@apm.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-10 09:36:52 +01:00
Wolfram Sang 2fe3e51892 i2c: s3c2410: remove superfluous runtime PM calls
RuntimePM of the adapter device is now taken care of by the core. So, we
can remove these calls.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-10 09:27:53 +01:00
Wolfram Sang 9f924169c0 i2c: always enable RuntimePM for the adapter device
The adapter device is a logical device. Because of that, it already uses
pm_runtime_no_callbacks() in the core. To ensure proper propagation from
the children (i2c devices) to the parent of the adapter (the HW device),
make sure RuntimePM is enabled in any case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-10 09:27:06 +01:00
Baruch Siach 8d22f30938 i2c: designware: retry transfer on transient failure
Set the i2c_adapter retries field to a sensible value. This allows the i2c core
to retry master_xfer() when it returns -EAGAIN. Currently the i2c-designware
driver returns -EAGAIN only on Tx arbitration failure (DW_IC_TX_ARB_LOST).

Reported-by: Rolland Chau <zourongrong@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-10 09:24:56 +01:00
Loc Ho 04a407f6b1 i2c: dw: Add APM X-Gene ACPI I2C device support
Enable APM X-Gene ACPI I2C device support by adding the
corresponding ACPI ID. The platform ACPI APD corresponding
change is required to provide the proper clock frequency input.

Signed-off-by: Loc Ho <lho@apm.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-01-07 14:11:55 +01:00
Stephen Rothwell f199b2605c i2c: ibm_iic: rename i2c_timings struct due to clash with generic version
Fixes: e1dba01ca6 ("i2c: add generic routine to parse DT for timing information")
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-05 02:06:10 +01:00
Suravee Suthikulpanit 90708ce22b i2c: designware: Add support for AMD Seattle I2C
Add device HID AMDI0510 to match the I2C controlers on AMD Seattle platform

Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-04 20:25:01 +01:00
Fabio Estevam 995e68a5ee i2c: imx: Remove unneeded comments
These multi-lines comments do not follow the standard kernel coding
style. In fact, they are not useful comments, so get rid of them.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-04 20:23:33 +01:00
Geliang Tang 66e784130a i2c: st: use to_platform_device()
Use to_platform_device() instead of open-coding it.

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:54:31 +01:00
Geliang Tang 238c44a70c i2c: designware: use to_pci_dev()
Use to_pci_dev() instead of open-coding it.

Signed-off-by: Geliang Tang <geliangtang@163.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:54:00 +01:00
Kamal Dasu e2e5a2c618 i2c: brcmstb: Adding support for CM and DSL SoCs
Broadcoms DSL, CM (cable modem)and STB I2C core implementation have
8 data in/out registers that can transfer 8 bytes or 32 bytes max.
Cable and DSL "Peripheral" i2c cores use single byte per data
register and the STB can use 4 byte per data register transfer.
Adding support to take care of this difference. Accordingly added
the compatible string for SoCs using the "Peripheral" I2C block.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:50:09 +01:00
Liguo Zhang 8378d01f60 i2c: mediatek: fix i2c multi transfer issue in high speed mode
For mt8173 platform with auto restart support, when doing i2c multi
transfer in high speed, we should ignore the first restart irq after
the master code, otherwise the first transfer will be discarded.

Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
Reviewed-by: Eddie Huang <eddie.huang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:38:22 +01:00
Gao Pan e8e712916c i2c: imx: improve code readability
Replace of_get_named_gpio_flags with of_get_named_gpio because
the latter has less parameters, which improves code readability.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:17:29 +01:00
Fabio Estevam 5b66153989 i2c: imx: Improve message log when DMA is not used
When DMA cannot be used, it is better to state that the I2C controller
will operate in PIO mode.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:11:09 +01:00
Gao Pan 588eb93ea4 i2c: imx: add runtime pm support to improve the performance
In our former i2c driver, i2c clk is enabled and disabled in
xfer function, which contributes to power saving. However,
the clk enable process brings a busy wait delay until the core
is stable. As a result, the performance is sacrificed.

To weigh the power consumption and i2c bus performance, runtime
pm is the good solution for it. The clk is enabled when a i2c
transfer starts, and disabled after a specifically defined delay.

If CONFIG_PM is disabled the net result of this patch is that the
clock is never disabled.

Without the patch the test case (many eeprom reads) executes with approx:
real 1m7.735s
user 0m0.488s
sys 0m20.040s

With the patch the same test case (many eeprom reads) executes with approx:
real 0m54.241s
user 0m0.440s
sys 0m5.920s

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Gao Pan <b54642@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[wsa: sorted includes]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-03 19:08:09 +01:00
Gao Pan a5f650182b i2c: imx: init bus recovery info before adding i2c adapter
During driver probe, i2c_imx_init_recovery_info() must come before
i2c_add_numbered_adapter(), because the get/set_scl() functions
are assigned in i2c_register_adapter() under the conditon that bus
recover_info are initialized. Otherwise, get/set_scl() function
pointers never get assigned.

In such case, when i2c_generic_gpio_recovery() is used for bus recovery,
there will be kernel crash because bri->set_scl is NULL.

The solution to this bug is moving i2c_imx_init_recovery_info() before
i2c_register_adapter().

Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2016-01-03 19:06:50 +01:00
Wolfram Sang 7ee24eb508 i2c: rcar: disable PM in multi-master mode
In multi master mode, the IP core needs to be always active for
arbitration reasons. Get the config from DT and set up PM depending on
the config.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:11:48 +01:00
Wolfram Sang 42c0783b89 i2c: rcar: remove macros dealing with flags
These macros don't really hide complexity, but C idioms. Removing them
makes the code easier to read IMO and make a planned extension easier.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:11:21 +01:00
Sifan Naeem c20821a7f0 i2c: img-scb: support repeated starts on IP v3.3
In version 3.3 of the IP when transaction halt is set, an interrupt
will be generated after each byte of a transfer instead of after
every transfer but before the stop bit.
Due to this behaviour we have to be careful that every time we
release the transaction halt we have to re-enable it straight away
so that we only process a single byte, not doing so will result in
all remaining bytes been processed and a stop bit being issued,
which will prevent us having a repeated start.

This change will have no effect on earlier versions of the IP.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Acked-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: James Hartley <james.hartley@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:05:21 +01:00
Sifan Naeem c7b0a7c107 i2c: img-scb: add handle for Master halt interrupt
Master halt is issued after each byte of a transaction is processed in
IP version 3.3.
Master halt will stall the bus by holding the SCK line low until the
halt bit in the scb_general_control is cleared.

After the last byte of a transfer is processed we can use the Master
Halt interrupt to facilitate a repeated start transfer without
issuing a stop bit.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Reviewed-by: James Hartley <james.hartley@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:04:55 +01:00
Sifan Naeem dd29207e6c i2c: img-scb: add handle for stop detected interrupt
Stop Detected interrupt is triggered when a Stop bit is detected on
the bus, which indicates the end of the current transfer.

When the end of a transfer is indicated by the Stop Detected interrupt,
drain the FIFO and signal completion for the transaction.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:04:30 +01:00
Sifan Naeem a8c5a8d8c9 i2c: img-scb: remove fifo EMPTYING interrupts handle
Now that we are using the transaction halt interrupt to safely control
repeated start transfers, we no longer need to handle the fifo
emptying interrupts.

Handling this interrupt along with Transaction Halt interrupt can
cause erratic behaviour.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:04:05 +01:00
Sifan Naeem c55ebe0e72 i2c: img-scb: support I2C_M_IGNORE_NAK
This commit adds support for the I2C_M_IGNORE_NAK protocol
modification.

Such behaviour can only be implemented in atomic mode. So, if a
transaction contains a message with such flag the drivers
switches to atomic mode. The implementation consists simply in
treating NAKs as ACKs.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Acked-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: James Hartley <james.hartley@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-01-02 22:03:39 +01:00
Wolfram Sang b4cd08aa1f i2c: rcar: disable runtime PM correctly in slave mode
When we also are I2C slave, we need to disable runtime PM because the
address detection mechanism needs to be active all the time. However, we
can reenable runtime PM once the slave instance was unregistered. So,
use pm_runtime_get_sync/put to achieve this, since it has proper
refcounting. pm_runtime_allow/forbid is like a global knob controllable
from userspace which is unsuitable here.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2015-12-19 12:00:37 +01:00
Wolfram Sang 54177ccfbe i2c: make i2c_parse_fw_timings() always visible
This function used to be DT only, so it lived inside a CONFIG_OF block.
Now it uses device attributes and must be moved outside of it. No
further code changes, only one whitespace improvement.

Reported-by: Jim Davis <jim.epost@gmail.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-17 20:36:39 +01:00
Wolfram Sang b7d518e6f4 i2c: emev: select I2C slave support
Until we have proper support to make I2C slave support fully optional,
select it to prevent build errors on randconfigs.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-17 20:34:36 +01:00
Måns Rullgård 5398b7ef6c i2c: xlr: add interrupt support for Sigma Designs chips
The Sigma Designs variant of this controller has the ability to generate
interrupts.  This is controlled using two additional registers, oddly
enough overlapping with the defined but unused HDSTATIM.

This patch adds support for using this feature instead of busy-looping
if an IRQ is specified.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-16 11:42:58 +01:00
Måns Rullgård a45af72a60 i2c: xlr: fix extra read/write at end of rx transfer
The BYTECNT register holds the transfer size minus one.  Setting it to
the correct value removes the need for a dummy read/write at the end of
each transfer.  As zero-length transfers are not supported, do not
advertise I2C_FUNC_SMBUS_QUICK.

In other words, this patch makes the driver transfer the number of bytes
requested unless this is zero, which is not supported by the hardware
and is thus refused.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-16 11:42:30 +01:00
Måns Rullgård 75d31c2372 i2c: xlr: add support for Sigma Designs controller variant
Sigma Designs chips use a variant of this controller with the following
differences:

- The BUSY bit in the STATUS register is inverted
- Bit 8 of the CONFIG register must be set
- The controller can generate interrupts

This patch adds support for the first two of these.  It also calculates
and sets the correct clock divisor if a clk is provided.  The bus
frequency is optionally speficied in the device tree node.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-15 13:13:00 +01:00
Masahiro Yamada 51549c087f i2c: uniphier_f: error out if bus speed is zero
There is code to divide by "bus_speed" some lines below.
To eliminate the possibility of division by zero, bail out if
"clock-frequency" is specified as zero.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:59:46 +01:00
Masahiro Yamada ac9b91f39d i2c: uniphier_f: error out if clock rate is zero
This input clock is used to generate the sampling clock for I2C bus.
If the clock rate is zero, there is something wrong with the clock
driver.  Bail out with the appropriate error message in such a case.
It would make it easier to find the root cause of failure.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:59:26 +01:00
Masahiro Yamada 2d5d23b96a i2c: uniphier: error out if bus speed is zero
There is code to divide by "bus_speed" some lines below.
To eliminate the possibility of division by zero, bail out if
"clock-frequency" is specified as zero.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:59:05 +01:00
Masahiro Yamada 1ff49b34bf i2c: uniphier: error out if clock rate is zero
This input clock is used to generate the sampling clock for I2C bus.
If the clock rate is zero, there is something wrong with the clock
driver.  Bail out with the appropriate error message in such a case.
It would make it easier to find the root cause of failure.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:58:44 +01:00
Wolfram Sang ca68eade66 i2c: rcar: honor additional i2c timings from DT
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:51:10 +01:00
Wolfram Sang c7881871de i2c: rcar: switch to i2c generic dt parsing
Switch to the new generic functions. Plain convert, no functionality
added yet.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:51:09 +01:00
Wolfram Sang f9c9d31bdd i2c: rcar: refactor probe function a little
The probe function is a little bit messy, something here, something
there. Rework it so that there is some order: first init the private
structure, then the adapter, then do HW init. This also allows us to
remove the device argument of the clock calculation function, because it
now can be deduced from the private structure. Also, shorten some lines
where possible. This is a preparation for further refactoring.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:51:08 +01:00
Wolfram Sang e1dba01ca6 i2c: add generic routine to parse DT for timing information
Inspired from the i2c-rk3x driver (thanks guys!) but refactored and
extended. See built-in docs for further information.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-14 10:51:07 +01:00
Jarkko Nikula e79e72c5a2 i2c: designware: Keep pm_runtime_enable/_disable calls in sync
On an hardware shared I2C bus (certain Intel Baytrail SoC platforms) the
runtime PM disable depth keeps increasing over repeated modprobe/rmmod
cycle because pm_runtime_disable() is called without checking should it
be disabled already because of bus sharing.

This hasn't made any other harm than dev->power.disable_depth keeps
increasing but keep it sync by calling pm_runtime_disable() only when
runtime PM is not disabled.

Reported-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-12 18:04:57 +01:00
Xiangliang Yu 2d244c8148 i2c: designware: fix IO timeout issue for AMD controller
Because of some hardware limitation, AMD I2C controller can't
trigger pending interrupt if interrupt status has been changed
after clearing interrupt status bits. Then, I2C will lost
interrupt and IO timeout.

According to hardware design, this patch implements a workaround
to disable i2c controller interrupt and re-enable i2c interrupt
before exiting ISR.

To reduce the performance impacts on other vendors, use unlikely
function to check flag in ISR.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2015-12-12 18:00:16 +01:00
Gao Pan 5212f9ae51 i2c: imx: init bus recovery info before adding i2c adapter
During driver probe, i2c_imx_init_recovery_info() must come before
i2c_add_numbered_adapter(), because the get/set_scl() functions
are assigned in i2c_register_adapter() under the conditon that bus
recover_info are initialized. Otherwise, get/set_scl() function
pointers never get assigned.

In such case, when i2c_generic_gpio_recovery() is used for bus recovery,
there will be kernel crash because bri->set_scl is NULL.

The solution to this bug is moving i2c_imx_init_recovery_info() before
i2c_register_adapter().

Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2015-12-09 11:15:41 +01:00
Andy Shevchenko 4077a387b7 x86/platform/iosf_mbi: Remove duplicate definitions
The read and write opcodes are global for all units on SoC and even across
Intel SoCs. Remove duplication of corresponding constants. At the same time
convert all current users.

No functional change.

Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Boon Leong Ong <boon.leong.ong@intel.com>
Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-12-09 01:18:34 +01:00
Mika Westerberg 4c5301abbf i2c: designware: Convert to use unified device property API
With ACPI _DSD (introduced in ACPI v5.1) it is now possible to pass device
configuration information from ACPI in addition to DT. In order to support
this, convert the driver to use the unified device property accessors
instead of DT specific.

Change to ordering a bit so that we first try platform data and if that's
not available look from device properties. ACPI *CNT methods are then used
as last resort to override everything else.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-12-07 02:29:24 +01:00
Niklas Söderlund c31d0a0002 i2c: emev2: add slave support
Add I2C slave provider using the generic slave interface.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-05 19:55:36 +01:00
Paul Burton 7a852b02d4 i2c: eg20t: allow build on MIPS platforms
Allow the eg20t I2C driver to be built for MIPS platforms, in
preparation for use on the MIPS Boston board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-03 22:11:47 +01:00
Paul Burton a613d9d485 i2c: eg20t: set i2c_adapter->dev.of_node
Set the I2C adapter devices of_node to that of the PCI device, such that
I2C clients may be instantiated via device tree.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-03 22:11:46 +01:00
Ludovic Desroches cc018e3612 i2c: at91: add support for the HOLD field
The hold field allows to configure the data hold time which can be set
with the help of the generic binding 'i2c-sda-hold-time-ns'. This
feature has been introduced with SAMA5D4 SoC family.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-03 21:42:37 +01:00
Wolfram Sang d7a4c76336 i2c: piix4: remove unneeded assignments
smatch rightfully says:
drivers/i2c/busses/i2c-piix4.c:504 piix4_access warn: unused return: i = inb_p()
drivers/i2c/busses/i2c-piix4.c:537 piix4_access warn: unused return: i = inb_p()

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
2015-12-03 21:36:55 +01:00
Dmitry V. Krivenok a07f0ad789 i2c: do not use 0x in front of %pa
Signed-off-by: Dmitry V. Krivenok <krivenok.dmitry@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-01 02:01:27 +01:00
Liguo Zhang 173b77e8d8 i2c: mediatek: add i2c first write then read optimization
For platform with auto restart support, between every transfer,
i2c controller will trigger an interrupt and SW need to handle
it to start new transfer. When doing write-then-read transfer,
instead of restart mechanism, using WRRD mode to have controller
send both transfer in one request to reduce latency.

Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
Reviewed-by: Eddie Huang <eddie.huang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-01 01:55:45 +01:00
Shubhrajyoti Datta 948c58a03a i2c: cadence: Remove the suspended flag
The suspended flag is a flag holding the device's PM status.
The runtime framework does that for us.
Use pm_runtime_suspended call instead.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 21:08:07 +01:00
Shubhrajyoti Datta 7fa32329ca i2c: cadence: Move to sensible power management
Currently the clocks are enabled at probe and disabled at remove.
Which keeps the clocks enabled even if no transaction is going on.
This patch enables the clocks at the start of transfer and disables
after it.

Also adapts to runtime pm.

converts dev pm to const to silence a checkpatch warning.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 21:07:40 +01:00
Nicola Corna 4dbfb5f440 i2c: bcm2835: add I2C_AQ_NO_CLK_STRETCH
As reported in the links given below. the BCM2835 has a hardware bug in
its i2c module which prevents a correct clock stretching. This patch
adds the I2C_AQ_NO_CLK_STRETCH quirk flag to i2c-bcm2835.

Signed-off-by: Nicola Corna <nicola@corna.info>
[wsa: put the links into the code as comments]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 18:37:26 +01:00
Nicola Corna a94d306b71 i2c: algo-bit: add I2C_AQ_NO_CLK_STRETCH
Add I2C_AQ_NO_CLK_STRETCH to drivers/i2c/algos/i2c-algo-bit.c when getscl
is not available.

Signed-off-by: Nicola Corna <nicola@corna.info>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 18:37:25 +01:00
Lars-Peter Clausen 77c6801967 i2c: xiic: Replace spinlock with mutex
All protected sections are only called from sleep-able context, so there is
no need to use a spinlock.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 18:37:23 +01:00
LABBE Corentin c4c696fa1b i2c: taos-evm: replace simple_strtoul by kstrtou8
The simple_strtoul function is marked as obsolete.
This patch replace it by kstrtou8.

Reviewed-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 18:37:22 +01:00
Alexander Sverdlin 87cb5b425f i2c: davinci: Increase module clock frequency
I2C controller used in Keystone SoC has an undocumented peculiarity which
results in SDA-SCL margins being dependent on module clock. Driving high
capacity bus near its limits can result in STOP condition sometimes being
understood as REPEATED-START by slaves (or NACK instead of ACK, etc...).
Driving the module with higher clocks increases the margin between SDA and SCL
transitions, making the operations with higher bus rates more robust. Therefore,
target the module clock to 12MHz instead of 7MHz, still staying within
the specification limits.

Before the change STOP timing looked like this on 400kHz:

SDA   ----------+          +----
                 \        /
                  \      /
                   +----+
                       (1)
SCL   --+          +------------
         \        /
          \      /
           +----+
               (2)

While only point (1) signals STOP, point (2) could be incorrectly recognized as
repeated-START (almost no margin between SDA and SCL transitions).

After the change there is at least 600ns margin measured between SCL fall and
SDA fall during STOP generation:

SDA   ------+          +----
             \        /
              \      /
               +----+

SCL   --+          +--------
         \        /
          \      /
           +----+
           ->|    |<- 600ns
                ->|   |<- tSUSTO

So called tSUSTO (setup time for STOP condition) is still slightly higher than
600ns, so no problem here.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 15:55:07 +01:00
Hans de Goede bba61f50f7 i2c: mv64xxx: The n clockdiv factor is 0 based on sunxi SoCs
According to the datasheets the n factor for dividing the tclk is
2 to the power n on Allwinner SoCs, not 2 to the power n + 1 as it is
on other mv64xxx implementations.

I've contacted Allwinner about this and they have confirmed that the
datasheet is correct.

This commit fixes the clk-divider calculations for Allwinner SoCs
accordingly.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2015-11-30 15:54:22 +01:00
Christian Fetzer 725d2e3fac i2c: piix4: Add adapter port name support for SB800 chipset
This patch adds support for port names for the SB800 chipset.
Since the chipset supports a multiplexed main SMBus controller, adding
the channel name to the adapter name is necessary to differentiate the
ports better (for example in sensors output).

Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:36:30 +01:00
Christian Fetzer 2fee61d22e i2c: piix4: Add support for multiplexed main adapter in SB800
The SB800 chipset supports a multiplexed main SMBus controller with
four ports. The multiplexed ports share the same SMBus address and
register set. The port is selected by bits 2:1 of the smb_en register
(0x2C).

Only one port can be active at any point in time therefore a mutex is
needed in order to synchronize access.

Additionally, the commit avoids requesting and releasing the SMBus base
address index region on every multiplexed transfer by moving the
request_region call into piix4_probe.

Tested on HP ProLiant MicroServer G7 N54L (where this patch adds
support to access sensor data from the w83795adg).

Cc: Thomas Brandon <tbrandonau@gmail.com>
Cc: Eddi De Pieri <eddi@depieri.net>
Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:36:25 +01:00
Christian Fetzer ca2061e128 i2c: piix4: Convert piix4_main_adapter to array
The SB800 chipset supports a multiplexed main SMBus controller with
four ports. Therefore the static variable piix4_main_adapter is
converted into a piix4_main_adapters array that can hold one
i2c_adapter for each multiplexed port.

The auxiliary adapter remains unchanged since it represents the second
(not multiplexed) SMBus controller on the SB800 chipset.

Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:31:23 +01:00
Wolfram Sang 9abd29e7c1 i2c: rk3x: populate correct variable for sda_falling_time
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: stable@kernel.org
2015-11-30 14:27:41 +01:00
Wolfram Sang e49865d10a i2c: rcar: handle difference in setting up non-first message
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:24:08 +01:00
Wolfram Sang 3c2b1ff3e5 i2c: rcar: clean up after refactoring
Update the comments to match current behaviour. Shorten some comments.
Update copyrights.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:22:54 +01:00
Wolfram Sang 52df445f29 i2c: rcar: revoke START request early
If we don't clear START generation as soon as possible, it may cause
another message to be generated, e.g. when receiving NACK in address
phase. To keep the race window as small as possible, we clear it right
at the beginning of the interrupt. We don't need any checks since we
always want to stop START and STOP generation on the next occasion after
we started it.

This patch improves the situation but sadly does not completely fix it.
It is still to be researched if we can do better given this HW design.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:22:33 +01:00
Wolfram Sang c3be0af159 i2c: rcar: check master irqs before slave irqs
Due to the HW design, master IRQs are timing critical, so give them
precedence over slave IRQ.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:22:11 +01:00
Wolfram Sang d89667b14f i2c: rcar: don't issue stop when HW does it automatically
The manual says (55.4.8.6) that HW does automatically send STOP after
NACK was received. My measuerments confirm that.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:21:50 +01:00
Wolfram Sang cc21d0b4b6 i2c: rcar: init new messages in irq
Setting up new messages was done in process context while handling a
message was in interrupt context. Because of the HW design, this IP core
is sensitive to timing, so the context switches were too expensive. Move
this setup to interrupt context as well.

In my test setup, this fixed the occasional 'data byte sent twice' issue
which a number of people have seen. It also fixes to send REP_START
after a read message which was wrongly send as a STOP + START sequence
before.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:21:29 +01:00
Wolfram Sang b9d0684c79 i2c: rcar: refactor setup of a msg
We want to reuse this function later.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:21:07 +01:00
Wolfram Sang ff2316b87a i2c: rcar: remove spinlock
After making sure to reinit the HW and clear interrupts in the timeout
case, we know that interrupts are always disabled in the sections
protected by the spinlock. Thus, we can simply remove it which is a
preparation for further refactoring. While here, rename the timeout
variable to time_left which is way more readable.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:20:46 +01:00
Wolfram Sang 90f779e565 i2c: rcar: remove unused IOERROR state
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:20:25 +01:00
Wolfram Sang 2c78cdc1c0 i2c: rcar: rework hw init
We don't need to init HW before every transfer since we know the HW
state then. HW init at probe time is enough. While here, add setting the
clock register which belongs to init HW. Also, set MDBS bit since not
setting it is prohibited according to the manual.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:20:04 +01:00
Wolfram Sang e43e0df13f i2c: rcar: make sure clocks are on when doing clock calculation
When calculating the bus speed, the clock should be on, of course. Most
bootloaders left them on, so this went unnoticed so far.

Move the ioremapping out of this clock-enabled-block and prepare for
adding hw initialization there, too.

Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-30 14:19:42 +01:00
Alexandra Yates cdc5a3110e i2c: i801: add Intel Lewisburg device IDs
Adding Intel codename Lewisburg platform device IDs for SMBus.

Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20 16:22:21 +01:00
Grygorii Strashko c18fba2306 i2c: fix wakeup irq parsing
This patch fixes obvious copy-past error in wake up irq parsing
code which leads to the fact that dev_pm_set_wake_irq() will
be called with wrong IRQ number when "wakeup" IRQ is not
defined in DT.

Fixes: 3fffd12839 ("i2c: allow specifying separate wakeup interrupt in device tree")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: <stable@vger.kernel.org> # v4.3
2015-11-20 16:19:08 +01:00
Lars-Peter Clausen d0fe5258e6 i2c: xiic: Prevent concurrent running of the IRQ handler and __xiic_start_xfer()
Prior to commit e6c9a037bc ("i2c: xiic: Remove the disabling of
interrupts") IRQs where disabled when the initial __xiic_start_xfer() was
called. After the commit the interrupt is enabled while the function is
running, this means it is possible for the interrupt to be triggered while
the function is still running. When this happens the internal data
structures get corrupted and undefined behavior can occur like the
following crash:

	Internal error: Oops: 17 [#1] PREEMPT SMP ARM
	Modules linked in:
	CPU: 0 PID: 2040 Comm: i2cdetect Not tainted 4.0.0-02856-g047a308 #10956
	Hardware name: Xilinx Zynq Platform
	task: ee0c9500 ti: e99a2000 task.ti: e99a2000
	PC is at __xiic_start_xfer+0x6c4/0x7c8
	LR is at __xiic_start_xfer+0x690/0x7c8
	pc : [<c02bbffc>]    lr : [<c02bbfc8>]    psr: 800f0013
	sp : e99a3da8  ip : 00000000  fp : 00000000
	r10: 00000001  r9 : 600f0013  r8 : f0180000
	r7 : f0180000  r6 : c064e444  r5 : 00000017  r4 : ee031010
	r3 : 00000000  r2 : 00000000  r1 : 600f0013  r0 : 0000000f
	Flags: Nzcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
	Control: 18c5387d  Table: 29a5404a  DAC: 00000015
	Process i2cdetect (pid: 2040, stack limit = 0xe99a2210)
	Stack: (0xe99a3da8 to 0xe99a4000)
	3da0:                   ee031010 00000000 00000001 ee031020 ee031224 c02bc5ec
	3dc0: ee34c604 00000000 ee0c9500 e99a3dcc e99a3dd0 e99a3dd0 e99a3dd8 c069f0e8
	3de0: 00000000 ee031020 c064e100 ffff90bb e99a3e48 c02b6590 ee031020 00000001
	3e00: e99a3e48 ee031020 00000000 e99a3e63 00000001 c02b6ec4 00000000 00000000
	3e20: 00000000 c02b7320 e99a3ef0 00000000 00000000 e99e3df0 00000000 00000000
	3e40: 00000103 2814575f 0000003e c00a0000 e99a3e85 0001003e ee0c0000 e99a3e63
	3e60: eefd3578 c064e61c ee0c9500 c0041e04 0000056c e9a56db8 00006e5a b6f5c000
	3e80: ee0c9548 eefd0040 00000001 eefd3540 ee0c9500 eefd39a0 c064b540 ee0c9500
	3ea0: 00000000 ee92b000 00000000 bef4862c ee34c600 e99ecdc0 00000720 00000003
	3ec0: e99a2000 00000000 00000000 c02b8b30 00000000 00000000 00000000 e99a3f24
	3ee0: b6e80000 00000000 00000000 c04257e8 00000000 e99a3f24 c02b8f08 00000703
	3f00: 00000003 c02116bc ee935300 00000000 bef4862c ee34c600 e99ecdc0 c02b91f0
	3f20: e99ecdc0 00000720 bef4862c eeb725f8 e99ecdc0 c00c9e2c 00000003 00000003
	3f40: ee248dc0 00000000 ee248dc8 00000002 eeb7c1a8 00000000 00000000 c00bb360
	3f60: 00000000 00000000 00000003 ee248dc0 bef4862c e99ecdc0 e99ecdc0 00000720
	3f80: 00000003 e99a2000 00000000 c00c9f68 00000000 00000000 b6f22000 00000036
	3fa0: c000dfa4 c000de20 00000000 00000000 00000003 00000720 bef4862c bef4862c
	3fc0: 00000000 00000000 b6f22000 00000036 00000000 00000000 b6f60000 00000000
	3fe0: 00013040 bef48614 00008cab b6ecdbe6 400f0030 00000003 2f7fd821 2f7fdc21
	[<c02bbffc>] (__xiic_start_xfer) from [<c02bc5ec>] (xiic_xfer+0x94/0x168)
	[<c02bc5ec>] (xiic_xfer) from [<c02b6590>] (__i2c_transfer+0x4c/0x7c)
	[<c02b6590>] (__i2c_transfer) from [<c02b6ec4>] (i2c_transfer+0x9c/0xc4)
	[<c02b6ec4>] (i2c_transfer) from [<c02b7320>] (i2c_smbus_xfer+0x3a0/0x4ec)
	[<c02b7320>] (i2c_smbus_xfer) from [<c02b8b30>] (i2cdev_ioctl_smbus+0xb0/0x214)
	[<c02b8b30>] (i2cdev_ioctl_smbus) from [<c02b91f0>] (i2cdev_ioctl+0xa0/0x1d4)
	[<c02b91f0>] (i2cdev_ioctl) from [<c00c9e2c>] (do_vfs_ioctl+0x4b0/0x5b8)
	[<c00c9e2c>] (do_vfs_ioctl) from [<c00c9f68>] (SyS_ioctl+0x34/0x5c)
	[<c00c9f68>] (SyS_ioctl) from [<c000de20>] (ret_fast_syscall+0x0/0x34)
	Code: e283300c e5843210 eafffe64 e5943210 (e1d320b4)

The issue can easily be reproduced by performing I2C access under high
system load or IO load.

To fix the issue protect the invocation to __xiic_start_xfer() form
xiic_start_xfer() with the same lock that is used to protect the interrupt
handler.

Fixes: e6c9a037bc ("i2c: xiic: Remove the disabling of interrupts")
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20 16:15:35 +01:00
Lars-Peter Clausen 9656eeebf3 i2c: Revert "i2c: xiic: Do not reset controller before every transfer"
Commit d701667bb3 ("i2c: xiic: Do not reset controller before every
transfer") removed the reinitialization of the controller before the start
of each transfer. Apparently this change is not safe to make and the commit
results in random I2C bus failures.

An easy way to trigger the issue is to run i2cdetect.

Without the patch applied:
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
	 00:          -- -- -- -- -- -- -- -- -- -- -- -- --
	 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 30: -- -- -- -- -- -- -- -- UU UU -- UU 3c -- -- UU
	 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 70: -- -- -- -- -- -- -- --

With the patch applied every other or so invocation:
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
	 00:          03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
	 10: 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f
	 20: 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
	 30: -- -- -- -- -- -- -- -- UU UU -- UU 3c -- -- UU
	 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
	 70: -- -- -- -- -- -- -- --

So revert the commit for now.

Fixes: d701667bb3 ("i2c: xiic: Do not reset controller before every transfer")
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20 16:04:59 +01:00
Hou Zhiqiang 8bb6fd585d i2c: imx: fix a compiling error
drivers/i2c/busses/i2c-imx.c:978:2: error: implicit declaration of
function ‘pinctrl_select_state’ [-Werror=implicit-function-declaration]
  pinctrl_select_state(i2c_imx->pinctrl, i2c_imx->pinctrl_pins_gpio);
  ^

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20 15:58:22 +01:00
Linus Torvalds d55fc37856 Merge branch 'i2c/for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:

 - New drivers: UniPhier (with and without FIFO)

 - some drivers got some bigger rework: ismt, designware, img-scb (rcar
   had to be reverted because issues were showing up just lately)

 - ACPI: reworked the device scanning and added support for muxes

... and quite a lot of driver bugfixes and cleanups this time.  All
files touched outside of the i2c realm have proper acks.

* 'i2c/for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (70 commits)
  i2c: rcar: Revert the latest refactoring series
  i2c: pnx: remove superfluous assignment
  MAINTAINERS: i2c: drop i2c-pnx maintainer
  MAINTAINERS: i2c: mark also subdirectories as maintained
  i2c: cadence: enable driver for ARM64
  i2c: i801: Document Intel DNV and Broxton
  i2c: at91: manage unexpected RXRDY flag when starting a transfer
  i2c: pnx: Use setup_timer instead of open coding it
  i2c: add ACPI support for I2C mux ports
  acpi: add acpi_preset_companion() stub
  i2c: pxa: Add support for pxa910/988 & new configuration features
  i2c: au1550: Convert to devm_kzalloc and devm_ioremap_resource
  i2c-dev: Fix I2C_SLAVE ioctl comment
  i2c-dev: Fix typo in ioctl name reference
  i2c: sirf: tune the divider to make i2c bus freq more accurate
  i2c: imx: Use -ENXIO as error in the NACK case
  i2c: i801: Add support for Intel Broxton
  i2c: i801: Add support for Intel DNV
  i2c: mediatek: add i2c resume support
  i2c: imx: implement bus recovery
  ...
2015-11-10 11:58:25 -08:00
Linus Torvalds 9cf5c095b6 asm-generic cleanups
The asm-generic changes for 4.4 are mostly a series from Christoph Hellwig
 to clean up various abuses of headers in there. The patch to rename the
 io-64-nonatomic-*.h headers caused some conflicts with new users, so I
 added a workaround that we can remove in the next merge window.
 
 The only other patch is a warning fix from Marek Vasut
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Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic cleanups from Arnd Bergmann:
 "The asm-generic changes for 4.4 are mostly a series from Christoph
  Hellwig to clean up various abuses of headers in there.  The patch to
  rename the io-64-nonatomic-*.h headers caused some conflicts with new
  users, so I added a workaround that we can remove in the next merge
  window.

  The only other patch is a warning fix from Marek Vasut"

* tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  asm-generic: temporarily add back asm-generic/io-64-nonatomic*.h
  asm-generic: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations
  gpio-mxc: stop including <asm-generic/bug>
  n_tracesink: stop including <asm-generic/bug>
  n_tracerouter: stop including <asm-generic/bug>
  mlx5: stop including <asm-generic/kmap_types.h>
  hifn_795x: stop including <asm-generic/kmap_types.h>
  drbd: stop including <asm-generic/kmap_types.h>
  move count_zeroes.h out of asm-generic
  move io-64-nonatomic*.h out of asm-generic
2015-11-06 14:22:15 -08:00
Wolfram Sang 75ecc64ef5 i2c: rcar: Revert the latest refactoring series
This whole series caused sometimes timeouts and even OOPSes on some
r8a7791 Koelsch boards. We need to understand and fix those first.

Revert "i2c: rcar: clean up after refactoring"
Revert "i2c: rcar: revoke START request early"
Revert "i2c: rcar: check master irqs before slave irqs"
Revert "i2c: rcar: don't issue stop when HW does it automatically"
Revert "i2c: rcar: init new messages in irq"
Revert "i2c: rcar: refactor setup of a msg"
Revert "i2c: rcar: remove spinlock"
Revert "i2c: rcar: remove unused IOERROR state"
Revert "i2c: rcar: rework hw init"

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-30 12:40:46 +01:00
Wolfram Sang 77133e1c03 i2c: pnx: remove superfluous assignment
smatch rightfully says:

drivers/i2c/busses/i2c-pnx.c:499 i2c_pnx_xfer warn: unused return: stat = ioread32()

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-30 12:35:58 +01:00
Michal Simek 3924bac47a i2c: cadence: enable driver for ARM64
This IP is available on Xilinx ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26 15:53:00 +01:00
Jarkko Nikula 2b630df721 i2c: i801: Document Intel DNV and Broxton
Add missing entries into i2c-i801 documentation and Kconfig about recently
added Intel DNV and Broxton.

Reported-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26 15:52:59 +01:00
Ludovic Desroches a9bed6b10b i2c: at91: manage unexpected RXRDY flag when starting a transfer
In some cases, we could start a new i2c transfer with the RXRDY flag
set. It is not a clean state and it leads to print annoying error
messages even if there no real issue. The cause is only having garbage
data in the Receive Holding Register because of a weird behavior of the
RXRDY flag.

Reported-by: Peter Rosin <peda@lysator.liu.se>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Tested-by: Peter Rosin <peda@lysator.liu.se>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Fixes: 93563a6a71 ("i2c: at91: fix a race condition when using the DMA controller")
Cc: stable@vger.kernel.org #4.1
2015-10-26 15:44:59 +01:00
Muhammad Falak R Wani 43e9f2aa77 i2c: pnx: Use setup_timer instead of open coding it
Use timer API function setup_timer instead of init_timer to
initialize the timer.

Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-25 16:01:33 +01:00
Dustin Byford 8eb5c87a92 i2c: add ACPI support for I2C mux ports
Although I2C mux devices are easily enumerated using ACPI (_HID/_CID or
device property compatible string match), enumerating I2C client devices
connected through an I2C mux needs a little extra work.

This change implements a method for describing an I2C device hierarchy that
includes mux devices by using an ACPI Device() for each mux channel along
with an _ADR to set the channel number for the device.  See
Documentation/acpi/i2c-muxes.txt for a simple example.

To make this work the ismt, i801, and designware pci/platform devs now
share an ACPI companion with their I2C adapter dev similar to how it's done
in OF.  This is done on the assumption that power management functions will
not be called directly on the I2C dev that is sharing the ACPI node.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-25 15:49:46 +01:00
Vaibhav Hiremath c5fa6fc79f i2c: pxa: Add support for pxa910/988 & new configuration features
TWSI_ILCR & TWSI_IWCR registers are used to adjust clock rate
of standard & fast mode in pxa910/988; so this patch adds these two new
entries to "struct pxa_reg_layout" and "struct pxa_i2c".

Signed-off-by: Jett.Zhou <jtzhou@marvell.com>
Signed-off-by: Yi Zhang <yizhang@marvell.com>
Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
[wsa: white space fixes]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-25 09:36:43 +01:00
Axel Lin 174f2366b0 i2c: au1550: Convert to devm_kzalloc and devm_ioremap_resource
Use devm_* APIs to simplify the code.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 23:31:11 +02:00
Jean Delvare 9e685c84c2 i2c-dev: Fix I2C_SLAVE ioctl comment
The first part of the comment is wrong since November 2007, delete it.

The second part of the comment is related to I2C_PEC, not I2C_SLAVE, so
move it where it belongs.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 23:26:44 +02:00
Jean Delvare c57d3e7a93 i2c-dev: Fix typo in ioctl name reference
The ioctl is named I2C_RDWR for "I2C read/write". But references to it
were misspelled "rdrw". Fix them.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 23:26:43 +02:00
Guoying Zhang d64d45cb95 i2c: sirf: tune the divider to make i2c bus freq more accurate
In prima2 and atlas7, due to some hardware design issue. we
need to adjust the divider ratio a little according to i2c
bus frequency ranges.
Since i2c is open drain interface that allows the slave to
stall the transaction by holding the SCL line at '0', the RTL
implementation is waiting for SCL feedback from the pin after
setting it to High-Z ('1'). This wait adds to the high-time
interval counter few cycles of the input synchronization
(depending on the SCL_FILTER_REG field), and also the time it
takes for the board pull-up resistor to rise the SCL line.
For slow SCL settings these additions are negligible, but they
start to affect the speed when clock is set to faster frequencies.
This patch is based on the actual tests, and it makes SCL more
accurate.

Signed-off-by: Guoying Zhang <Guoying.Zhang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 22:48:45 +02:00
Vladimir Zapolskiy 5dd32eae60 i2c: pnx: fix runtime warnings caused by enabling unprepared clock
The driver can not be used on a platform with common clock framework
until clk_prepare/clk_unprepare calls are added, otherwise clk_enable
calls will fail and a WARN is generated.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 22:26:28 +02:00
Fabio Estevam 4c0657ae43 i2c: imx: Use -ENXIO as error in the NACK case
According to Documentation/i2c/fault-codes the response to a bus NACK
should be -ENXIO, so fix the error code.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 22:25:33 +02:00
Jarkko Nikula dd77f423e5 i2c: i801: Add support for Intel Broxton
This patch adds the SMBUS PCI ID of Intel Broxton.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 22:11:58 +02:00
Mika Westerberg 84d7f2ebd7 i2c: i801: Add support for Intel DNV
Intel DNV SoC has the same legacy SMBus host controller than Intel
Sunrisepoint PCH. It also has same iTCO watchdog on the bus.

Add DNV PCI ID to the list of supported devices.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 22:10:31 +02:00
Liguo Zhang 09027e08ac i2c: mediatek: add i2c resume support
mt65xx i2c controller initial setting will be cleared after system suspend,
so we should init mt65xx i2c controller again when system resume.

Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 21:58:32 +02:00
Gao Pan 1c4b6c3bcf i2c: imx: implement bus recovery
Implement bus recovery methods for i2c-imx so we can recover from
situations where SCL/SDA are stuck low.

Once i2c bus SCL/SDA are stuck low during transfer, config the i2c
pinctrl to gpio mode by calling pinctrl sleep set function, and then
use GPIO to emulate the i2c protocol to send nine dummy clock to recover
i2c device. After recovery, set i2c pinctrl to default group setting.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 21:55:50 +02:00
Masahiro Yamada 6a62974b66 i2c: uniphier_f: add UniPhier FIFO-builtin I2C driver
Add support for on-chip I2C controller used on newer UniPhier SoCs
such as PH1-Pro4, PH1-Pro5, etc.  This adapter is equipped with
8-depth TX/RX FIFOs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 21:55:46 +02:00
Masahiro Yamada dd6fd4a327 i2c: uniphier: add UniPhier FIFO-less I2C driver
Add support for on-chip I2C controller used on old UniPhier SoCs
such as PH1-LD4, PH1-sLD8, etc.  This adapter is so simple that
it has no FIFO in it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 21:55:45 +02:00
Ken Xue 3eddad96c4 i2c: designware: reverts "i2c: designware: Add support for AMD I2C controller"
The patch reverts commit a445900c90 (i2c: designware: Add support for
AMD I2C controller). It never worked anyhow because it did not register
a proper clkdev.

Since kernel 4.1 starts to support APD, there is no need to get freq
from id->driver_data for AMD0010. clkdev is supposed to be already
registered in APD.

So, revert old design and make AMD0010 looks like other ones.

Signed-off-by: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 21:55:44 +02:00
Shaohui Xie fa721baed6 i2c: imx: add support for Freescale Layerscape platforms
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23 21:55:24 +02:00
Cyrille Pitchen 6f6ddbb09d i2c: at91: fix write transfers by clearing pending interrupt first
In some cases a NACK interrupt may be pending in the Status Register (SR)
as a result of a previous transfer. However at91_do_twi_transfer() did not
read the SR to clear pending interruptions before starting a new transfer.
Hence a NACK interrupt rose as soon as it was enabled again at the I2C
controller level, resulting in a wrong sequence of operations and strange
patterns of behaviour on the I2C bus, such as a clock stretch followed by
a restart of the transfer.

This first issue occurred with both DMA and PIO write transfers.

Also when a NACK error was detected during a PIO write transfer, the
interrupt handler used to wrongly start a new transfer by writing into the
Transmit Holding Register (THR). Then the I2C slave was likely to reply
with a second NACK.

This second issue is fixed in atmel_twi_interrupt() by handling the TXRDY
status bit only if both the TXCOMP and NACK status bits are cleared.

Tested with a at24 eeprom on sama5d36ek board running a linux-4.1-at91
kernel image. Adapted to linux-next.

Reported-by: Peter Rosin <peda@lysator.liu.se>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Tested-by: Peter Rosin <peda@lysator.liu.se>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Fixes: 93563a6a71 ("i2c: at91: fix a race condition when using the DMA controller")
Cc: stable@vger.kernel.org #4.1
2015-10-22 15:14:41 +02:00
Jarkko Nikula 319d7f05df i2c: designware: Fix build error when !CONFIG_PM_SLEEP
Commit ("i2c: designware: Rename platform driver probe and PM
functions") introduced "'dw_i2c_plat_prepare' undeclared here" and
"'dw_i2c_plat_complete' undeclared here" build errors when
CONFIG_PM_SLEEP is not set.

Fix this by renaming NULL defined dw_i2c_prepare and dw_i2c_complete PM
hooks to dw_i2c_plat_prepare and dw_i2c_plat_complete since this was
obviously missing from the commit.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-22 15:14:18 +02:00
Hezi Shahmoon 0729a04977 i2c: mv64xxx: really allow I2C offloading
Commit 00d8689b85 ("i2c: mv64xxx: rework offload support to fix
several problems") completely reworked the offload support, but left a
debugging-related "return false" at the beginning of the
mv64xxx_i2c_can_offload() function. This has the unfortunate consequence
that offloading is in fact never used, which wasn't really the
intention.

This commit fixes that problem by removing the bogus "return false".

Fixes: 00d8689b85 ("i2c: mv64xxx: rework offload support to fix several problems")
Signed-off-by: Hezi Shahmoon <hezi@marvell.com>
[Thomas: reworked commit log and title.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: <stable@vger.kernel.org>
2015-10-22 14:47:45 +02:00
Luis de Bethencourt 8c5ec4c7ec i2c: stu300: Fix module autoload for OF platform driver
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:15:39 +02:00
Luis de Bethencourt 598cf1611b i2c: rk3x: Fix module autoload for OF platform driver
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:15:03 +02:00
Luis de Bethencourt 93ae965022 i2c: meson: Fix module autoload for OF platform driver
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:14:36 +02:00
Luis de Bethencourt d695e22a27 i2c: ibm-iic: Fix module autoload for OF platform driver
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:14:01 +02:00
Geert Uytterhoeven c6f1891323 i2c: rcar: Remove obsolete platform data support
Since commit 4baadb9e05 ("ARM: shmobile: r8a7778: remove obsolete
setup code"), Renesas R-Car SoCs are only supported in generic DT-only
ARM multi-platform builds.  The driver doesn't need to use platform data
anymore, hence remove platform data configuration.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[wsa: removed now unused ret value and cast to proper enum type]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:10:25 +02:00
Wolfram Sang 7bb6da5a3d i2c: sh_mobile: add support for r8a7795 (R-Car H3)
Enable the I2C core for this SoC. It is compitable to Gen2 SoCs, so
reuse the settings.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:10:20 +02:00
Wolfram Sang e7db0d34b3 i2c: rcar: add support for r8a7795 (R-Car H3)
Enable the I2C core for this SoC. I add a new type because this version
has new features (e.g. DMA) which will be added somewhen later.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 18:03:07 +02:00
Max Filippov b299167652 i2c: ocores: support big-endian register layout
This allows using OpenCores I2C controller attached to its host in
native-endian mode with bi-endian CPUs. Example of such system is Xtensa
XTFPGA platform.

Acked-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 17:47:45 +02:00
Manuel Lauss 8a5e3d472e i2c: au1550: relax bus timings a bit
The i2c-au1550 driver has to program various setup and hold times
for the sda/scl signals by hand.  The current values seem to be
working best when the driver is supplied with 50MHz, however on the
DB1300 board 48MHz is the closest we can get to it, and the timings
are a bit too tight for that, leading to the last bit of a transmission
sometimes being swallowed.  This manifests itself in wrong readings
of the ne1619 sensor and inability to configure the wm8731 i2s codec.

With the relaxed timings, both the sensor and the i2s codec can now
be accessed more reliably over a wider range of I2C block input
frequencies.

Verified on DB1200, DB1300 and DB1550 boards.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 17:43:13 +02:00
Barry Song 26f590e674 i2c: tegra: drop duplicated code for assigning algo
This code is repeated in probe:
i2c_dev->adapter.algo = &tegra_i2c_algo;

Cc: Donglin Peng <pengdonglin137@163.com>
Signed-off-by: Barry Song <21cnbao@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 17:38:19 +02:00
Alexander Sverdlin 35780e860f i2c: davinci: Optimize clock generation on Keystone SoC
According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed
additive part of frequency divisors (referred as "d" in the code and datasheet)
always equals to 6, independent of module clock prescaler.

                         module clock frequency
master clock frequency = ----------------------
                         (ICCL + 6) + (ICCH + 6)

It was not the case with original Davinci IP. Introduce new compatible property
"ti,keystone-i2c", which triggers special handling in the driver.

Without this change Keystone-based systems (having 204.8MHz input clock) choose
prescaler 29 (PSC=28). Using d=5 in this case leads to bus bitrate ~353kHz
instead of requested 400kHz. After correction, assuming d=6 bus rate is ~392kHz.
This gives ~11% transfer rate increase.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Hemanth Guruva Reddy <hemanth.guruva_reddy@nokia.com>
Tested-by: Lukasz Gemborowski <lukasz.gemborowski@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20 17:05:16 +02:00