On revisions of the Cortex-A9 prior to r2p0, the Store Buffer does not
have any automatic draining mechanism and therefore a livelock may occur
if an external agent continuously polls a memory location waiting to
observe an update.
This workaround defines cpu_relax() as smp_mb(), preventing correctly
written polling loops from denying visibility of updates to memory.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On the r2p* and r3p* versions of the Cortex-A9, a speculative memory
access may cause a page table walk which starts prior to an ASID switch
but completes afterwards. This can populate the micro-TLB with a stale
entry which may be hit with the new ASID.
This workaround places two dsb instructions in the mm switching code so
that no page table walks can cross the ASID switch.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This applies errata fix 753970 for all ux500 platforms. All
current ASICs suffer from this. If the problem is resolved in
later ASICs, the errata selection can be pushed down to other
Kconfig options.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to the hwmod interface data, the DSS submodule "VENC" uses a
clock, "dss_54m_fck"/"dss_tv_fck", which the PRCM cannot autoidle. By
default, the hwmod code assumes that interface clocks can be autoidled
by the PRCM. When the interface clock can't be autoidled by the PRCM,
those interfaces must be marked with the OCPIF_SWSUP_IDLE flag.
Otherwise, the "interface clock" will always have a non-zero use
count, and the device won't enter idle. This problem was observed on
N8x0.
Fix the immediate problem by marking the VENC interface with the
OCPIF_SWSUP_IDLE flag. But it's not clear that
"dss_54m_fck"/"dss_tv_fck" is really the correct interface clock for
VENC. It may be that the VENC interface should use a
hardware-autoidling interface clock. This is the situation on OMAP4,
which uses "l3_div_ck" as the VENC interface clock, which can be
autoidled by the PRCM. Clarification from TI is needed.
Problem found and patch tested on N8x0 by Tony Lindgren
<tony@atomide.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Senthilvadivu Guruswamy <svadivu@ti.com>
Cc: Sumit Semwal <sumit.semwal@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The driver provides the information regarding the ocp errors
that gets logged in the interconnect. The error information
gives the detail regarding the target that was attempted
to be accessed and its corresponding address.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
The l3 interconnect device is build with all the data required
to handle the error logging. The data is extracted from the
hwmod data base.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod change is aligned with Benoit Cousson.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
The driver provides the information regarding the ocp errors
that gets logged in the interconnect.The error info provides
the details regarding the master or the target that
generated the error, type of error and the corresponding address.
The stack dump is also provided.
Signed-off-by: sricharan <r.sricharan@ti.com>
[r.sricharan@ti.com: Enhacements, major cleanup and made it functional]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[santosh.shilimkar@ti.com: Driver design changes as per OMAP4 version]
Signed-off-by: Felipe Balbi <balbi@ti.com>
[balbi@ti.com: Initial version of the driver]
Acked-by: Benoit Cousson <b-cousson@ti.com>
The l3 interconnect device is build with all the data required
to handle the error logging. The data is extracted from the
hwmod database.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod changes are aligned with Benoit Cousson.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Now we used standard SZ_* macros instead of self defined *_SIZE macros. This
patch removes all such unused *_SIZE macros for spear3xx & 6xx.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Resource size required mostly is 4K for all devices, whereas currently
reserved space is much beyond that. This patch replaces SIZE macro's used at
multiple places with SZ_4K.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Order of declarations should be: pmx_devs, shirq support, amba_devices,
plat_devices, routines. This patch moves gpio_device below shirq support.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Device name of SD/MMC/SDIO controller in linux is sdhci. To maintain
consistency across all spear code, rename sdio to sdhci.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch makes inclusion of hardware.h and spear.h consistent over all spear
variants. Now we will include hardware.h, wherever we need to use hardware
macros. spear.h will be automatically included by hardware.h
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Order of inclusion of .h files must be: <linux/...>, <asm/...>, <plat/...>,
<mach/...>. This patch corrects this ordering whereever it is not followed.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- Add a dummy clk_set_rate() function. This is required for compilation
of a few drivers.
- Make functions in plat-spear/clock.c more generic over all SPEAr
platforms.
- Add div_factor in struct clk for clks with .recalc = follow_parent
- Change type of register pointers to void __iomem *
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move platform specific timer initialization code is moved into platform
specific files.
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- compile padmux only for spear3xx
- padmux initialization code rearranged in evaluation board and machine
files.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add IOMEM(x) definition, and use it with MISC_BASE for SPEAr platform.
With this there is no need to typecast misc macros to (unsigned int *).
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use straight 64-bit values as 64-bit operations are fairly efficient on ARM.
Comparing the asm output with and without KTIME_SCALAR, using 64-bit math
generates clearly better code.
Comparing kernel/hrtimer.c .text size, it goes from 0x1414 to 0x119c with
this change.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The simply expanded variable may be evaluated before the target file for
the stat command is up to date or even exists. Switching to a recursively
expanded variable move the execution of the stat command to the location
where LDFLAGS_vmlinux is actually used, fixing the dependency issue
introduced by patch #6746/1.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Few architectures combine the GIC with an external interrupt
controller. On such systems it may be necessary to update both
the GIC registers and the external controller's registers to control
IRQ behavior.
This can be addressed in couple of possible methods.
1. Export common GIC routines along with 'struct irq_chip gic_chip'
and allow architectures to have custom function by override.
2. Provide architecture specific function pointer hooks
within GIC library and leave platforms to add the necessary
code as part of these hooks.
First one might be non-intrusive but have few shortcomings like arch
needs to have there own custom gic library. Locks used should be
common since it caters to same IRQs etc. Maintenance point of view
also it leads to multiple file fixes.
The second probably is cleaner and portable. It ensures that all the
common GIC infrastructure is not touched and also provides archs to
address their specific issue.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Colin Cross <ccross@android.com>
Tested-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Populate the l2x0 set_debug function pointer with OMAP secure call
and enable the PL310 Errata 727915
This patch has dependency on the earlier patch
ARM: l2x0: Errata fix for flush by Way operation can cause data
corruption
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PL310 implements the Clean & Invalidate by Way L2 cache maintenance
operation (offset 0x7FC). This operation runs in background so that
PL310 can handle normal accesses while it is in progress. Under very
rare circumstances, due to this erratum, write data can be lost when
PL310 treats a cacheable write transaction during a Clean & Invalidate
by Way operation.
Workaround:
Disable Write-Back and Cache Linefill (Debug Control Register)
Clean & Invalidate by Way (0x7FC)
Re-enable Write-Back and Cache Linefill (Debug Control Register)
This patch also removes any OMAP dependency on PL310 Errata's
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The i2c_board_info entry supporting AIC23 codec was added into
the i2c2 bus.
Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 3cf32bba8c ("OMAP: McBSP: Convert
McBSP to platform device model") breaks compilation with non-multi-OMAP1
configs:
CC arch/arm/mach-omap1/mcbsp.o
arch/arm/mach-omap1/mcbsp.c: In function 'omap1_mcbsp_init':
arch/arm/mach-omap1/mcbsp.c:384: warning: dereferencing 'void *' pointer
arch/arm/mach-omap1/mcbsp.c:387: error: invalid use of void expression
arch/arm/mach-omap1/mcbsp.c:390: warning: dereferencing 'void *' pointer
arch/arm/mach-omap1/mcbsp.c:393: error: invalid use of void expression
Fix by avoiding NULL dereferences.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
[tony@atomide.com: updated description not to remove unnecessary branch name]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Allow the MSM8960 IOMMU to access its page tables directly
through the L2 cache.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Don't read from V2Pxx command registers when doing
iova-to-phys operations. These registers are write-only and
reading the value before modifying the VA bits is
unnecessary.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Remove the depencency on the IOMMU IDR register, as it may
not be accessible depending on the security configuraton.
This involves moving the NCB field of IDR into the platform
data.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Use ASID tags in the TLB instead of VMID tags in
preparation for changes to the secure environment.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Clean up the clock control code in the probe calls, and add
support for controlling the clock for the IOMMU bus
interconnect. With the (proper) clock driver in place, the
clock control logic in the probe function can be made much
cleaner since it does not have to deal with the placeholder
driver anymore.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Reviewed-by: Trilok Soni <tsoni@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Add clock control to the IOMMU driver. The IOMMU bus clock
(and potentially an AXI clock) need to be on to gain access
to IOMMU registers. Actively control these clocks when
needed instead of leaving them on.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This typo was fixed in 46e3f30 (mx25: fix spi device registration typo), but a
the merge at 0e44e059 (Merge commit 'v2.6.37-rc4' into imx-for-2.6.38) resolved
the merge conflict wrongly.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
TrimSlice has MicroSD and standard MMC/SD slots.
Register sdhci devices and enable GPIOs for MMC/SD slot.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Update regulator names for debugfs compatiblity on SMDK6410
ARM: S3C64XX: Fix build with WM1190 disabled and WM1192 enabled on SMDK6410
ARM: S3C64XX: Reduce output of s3c64xx_dma_init1()
ARM: S3C64XX: Tone down SDHCI debugging
ARM: S3C64XX: Add clock for i2c1
ARM: S3C64XX: Staticise non-exported GPIO to interrupt functions
ARM: SAMSUNG: Include devs.h in dev-uart.c to prototype devices
ARM: S3C64XX: Fix keypad setup to configure correct number of rows
ARM: S3C2440: Fix usage gpio bank j pin definitions on GTA02
ARM: S5P64X0: Fix number of GPIO lines in Bank F
ARM: S3C2440: Select missing S3C_DEV_USB_HOST on GTA02
Add a clockdomain to the GPTIMER7 interface and 2430 HSMMC2 functional
clocks - both were previously missing them.
Also, the 2430 mmchs1_fck is in core_l3_clkdm, but should be in
core_l4_clkdm; fix this.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch fixes these warnings when building kernel for OMAP3EVM
only.
CC arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.o
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c:95: warning:
'dsp_24xx_wkdeps' defined but not used
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c:119: warning:
'mpu_24xx_wkdeps' defined but not used
arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c:147: warning:
'core_24xx_wkdeps' defined but not used
The problem should be noticed when building for other OMAP3
platforms (only) as well.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
After commit 81b34fbecb ("OMAP2 clock:
split OMAP2420, OMAP2430 clock data into their own files"), it's
possible to remove dsp_irate_ick from the OMAP2420 and OMAP2430 clock
files. It was originally only needed due to a 2420/2430 clock tree difference,
and now that the data is in separate files, it's superfluous.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Remove the DPLL rate tolerance code that is called during rate
rounding. As far as I know, this code is never used, since it's been
more important for callers of the DPLL round_rate()/set_rate()
functions to obtain an exact rate than it is to save a relatively
small amount of power.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Bail out before we take the clockfw_lock spinlock if the corresponding
OMAP1 or OMAP2+ clock function is not defined. The intention is to
reduce and simplify the work that is done inside the spinlock.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The parent of the interface clocks for GPTIMER1, MPU_WDT,
SYNCTIMER_32K, SCM, WDT1, and the ICR (2430 only) were all listed as
being l4_ck. This isn't accurate; these modules exist inside the WKUP
domain, and the interface clock to these modules runs at the SYS_CLK
rate rather than the CORE L4 rate.
So, create a new clock "wu_l4_ick", similar to the OMAP3
"wkup_l4_ick", that serves as the parent for these clocks.
Also, these clocks were listed as existing inside core_l4_clkdm;
wkup_clkdm is probably more accurate.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The OMAP2420/2430 external 32-kHz low-frequency oscillator is a 32768
Hz oscillator, not a 32,000 Hz oscillator[1][2]. Fix this in the clock
tree.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
1. OMAP2420/22 Multimedia Processor Data Manual, Version P [SWPS019P],
section 5.1.4 "External 32-kHz CMOS Clock" (note that it refers to
a "32.768-kHz" clock; this presumably should be "32.768-KHz")
2. OMAP2430 Multimedia Processor ES2.1 Data Manual, Version V [SWPS023V],
section 5.1.4 "External 32-kHz CMOS Clock" (note that it refers to
a "32.768-kHz" clock; this presumably should be "32.768-KHz")
Several clocks are listed as having the core L4 clock as their parent,
when they are actually derived from the L3 clock. Fix these.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
At this point in time, there's no reason for this header file to be in
plat-omap/include/plat/voltage.h. It should not be included by device
drivers, and the code that uses it is currently all under mach-omap2/.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
There's no reason for this header file to be in
plat-omap/include/plat/smartreflex.h. The hardware devices are in
OMAP2+ SoCs only. Leaving this header file in plat-omap causes
problems due to cross-dependencies with other header files that should
live in mach-omap2/.
Thanks to Benoît Cousson <b-cousson@ti.com> for suggesting the removal
of the smartreflex.h include from the OMAP3xxx hwmod data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
These CM_AUTOIDLE bits are now set by the clock code via the common PM
code in mach-omap2/pm.c.
N.B.: The pm24xx.c code that this patch removes didn't ensure that the
CM_AUTOIDLE bits were set for several 2430-only modules, such as
GPIO5, MDM_INTC, MMCHS1/2, the modem oscillator clock, and USBHS.
Similarly, the pm34xx.c code that this patch removes didn't ensure
that the CM_AUTOIDLE bits were set for USIM and the AM3517 UART4.
Those cases should now be handled.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Mark each interface clock with a corresponding CM_AUTOIDLE bit with
a clkops that has the allow_idle/deny_idle function pointers populated.
This allows the OMAP clock framework to enable and disable autoidle for
these clocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Mark each interface clock with a corresponding CM_AUTOIDLE bit with
a clkops that has the allow_idle/deny_idle function pointers populated.
This allows the OMAP clock framework to enable and disable autoidle for
these clocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
OMAP2430 and OMAP3xxx have modem autoidle bits that are actually
attached to clocks with CM_FCLKEN bits; add the code and data to
handle these.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Mark each interface clock with a corresponding CM_AUTOIDLE bit with
a clkops that has the allow_idle/deny_idle function pointers populated.
This allows the OMAP clock framework to enable and disable autoidle for
these clocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Add sdrc_ick to the OMAP2420 clock data so the clock code can control
the CM_AUTOIDLE bit associated with this clock.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Add interface clock type code with autoidle enable/disable support.
The clkops structures created in this file will be used for all
OMAP2/3 interface clocks with autoidle support. They will enable the
clock framework to control interface clock autoidle directly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Place some comments in the OMAP oscillator clock control code to note that
its autoidle mode should eventually be controlled via the new OMAP clockfw
autoidle control interface.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
OMAP2xxx devices have two on-chip APLLs. These APLLs can
automatically enter idle when not in use. Connect the APLL autoidle
code to the clock code, so that the clock framework can handle this
process. As part of this patch, remove the code in mach-omap2/pm24xx.c
that previously handled APLL autoidle control.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Add the necessary code and data to allow the clock framework to enable
and disable the OMAP2 DPLL autoidle state. This is so the direct
register access can be moved out of the mach-omap2/pm24xx.c code, and other
code that needs to control this (e.g., CPUIdle) can do so via an API.
As part of this patch, remove the pm24xx.c code that formerly wrote
directly to the autoidle bits.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Some drivers wish to know whether the device that they control can
ever lose context, for example, when the device's enclosing
powerdomain loses power. They can use this information to determine
whether it is necessary to save and restore device context, or whether
it can be skipped. Implement the powerdomain portion of this by
adding the function pwrdm_can_ever_lose_context(). This is not for
use directly from driver code, but instead is intended to be called
from driver-subarch integration code (i.e., arch/arm/*omap* code).
Currently, the result from this function should be passed into the
driver code via struct platform_data, but at some point this should
be part of some common or OMAP-specific device code.
While here, update file copyrights.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The bank power state bitfields in the powerdomain data are
encoded incorrectly. These fields are intended to be bitfields,
representing a set of power states that the memory banks support.
However, when only one power state was supported by a given bank,
the field was incorrectly set to the bit shift -- not the mask.
While here, update some file copyrights.
The OMAP4 autogeneration scripts have been updated accordingly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Mark the WKUP powerdomain as being always on -- at least, as long as the
chip has power. This will be used to enable the powerdomain code to
determine whether a given powerdomain is ever able to power off. While
here, update the file copyright.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Enable new platforms and tegra drivers in tegra_defconfig. Also enable
some of the common devices several platforms, and GUID partition tables
to make it possible to boot a tegra_defconfig kernel with a ChromiumOS
filesystem.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
This patch adds the config infrastructure, the pinmux and basic
board setup code for PAZ00 (name of board inside the AC100/AZ).
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is the final patch to enable audio support on Harmony. It additionally
relies on the latest ASoC branch being merged in, which provides the header
defining the gpio_base field in the WM8903 platform data.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch is the portion of the audio-related setup that relies additionally
on the latest Tegra I2C driver being merged.
* Define platform data for WM8903 audio codec
* Register WM8903 as an I2C device
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Register the base i2c busses on harmony. Devices coming at a later date,
but this allows for hand-probing of some of them at least.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
Register the base i2c devices on seaboard. A few more are pending,
but it's a start.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
This change includes everything required to enable audio on Harmony, except
those parts which rely on code not currently in Tegra's for-next branch, i.e.
except those parts which rely on merges of the Tegra I2C driver or latest
ASoC subsystem.
* Define GPIO names for audio-related GPIOs
* Set up platform data and platform device for ASoC machine driver
* Register audio-related platform devices
* Initialize audio-related clocks
* Correctly configure pinmux and GPIO enables for audio-related pins
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This ensures they're kept in sync between platform_data definitions and
the GPIO table initialization.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch enables lcd and backlight drivers in NURI board.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds the parent clock for watchdog timer for EXYNOS4.
Signed-off-by: Inderpal Singh <inderpal.s@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Currently all boards using the s3c2410_udc driver use a GPIO to control the
state of the pullup, as a result the same code is reimplemented in each board
This patch changes these boards to use the common implementation for GPIO
controlled pullup in the UDC driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Currently all boards using the s3c2410_udc driver use a GPIO to control the
state of the pullup, as a result the same code is reimplemented in each board
file.
This patch adds support for using a GPIO to control the pullup state to the udc
driver, so the boards can use a common implementation.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Most revisions of the OMAP4 Blaze/SDP platform do not have
the EHCI signals routed by default. The pads are routed
for the alternate HSI functionality instead, and explicit
board modifications are needed to route the signals to
the USB PHY on the board.
Also, turning on the PHY connected to the EHCI port causes
a board reboot during bootup due to an unintended short
on the rails - this affects many initial revisions of the
board, and needs a minor board mod to fix (or as a
workaround, one should not attempt to power on the
USB PHY).
Given that these boards need explicit board mods to even
get EHCI working (separate from the accidental short above),
we should not attempt to enable EHCI by default.
So drop the EHCI support from the board files for the
Blaze/SDP platforms.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Keshava Munegowda <keshava_mgowda@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch is to add pad control helper macro to make the code easy
to read. The need is being seen when adding pad definitions for
LCDIF which gets ~30 pads to define.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes:
arch/arm/kernel/built-in.o: In function `__irq_svc':
io.c:(.text+0x2e0): undefined reference to `avic_base'
arch/arm/kernel/built-in.o: In function `__irq_usr':
io.c:(.text+0x4c8): undefined reference to `avic_base'
arch/arm/mach-mxc91231/built-in.o: In function `mxc91231_init_irq':
magx-zn5.c:(.init.text+0x18): undefined reference to `mxc_init_irq'
and was broken by
c7259df (ARM i.MX irq: Compile avic irq code only on SoCs that need it)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to SOC_SOC_IMX3X.
Leave ARCH_MX31/35 definitions there, in case some place prevent multi-soc
single image.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc
using ARCH_MX5X.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The boards are currently using otg_ulpi_create and mxc_ulpi_access_ops,
both are only present if CONFIG_USB_ULPI is set. To remove the need of
ifdefs in the board code introduce a imx_otg_ulpi_create functions
which expands to a static inline function if compiled without ulpi.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The platform data for the otg port is present but never used, so
remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Mack <daniel@caiaq.de>
On mx53_evk board only RX/TX pins are used on UART3.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On mx53_smd board only RX/TX pins are used on UART2.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
changes since v2:
- use v3 and v4 for specifying the ip version instead of i.MX23/28.
This is a better namespace when future versions are added.
- rename mach/fb.h to mach/mxsfb.h
changes since v1:
- Add a LCDC_ prefix to the register names.
- use set/clear registers where appropriate
- protect call to mxsfb_disable_controller() in mxsfb_remove()
with a (host->enabled) as suggested by Lothar Wassmann
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-fbdev@vger.kernel.org
While at it remove some useless consts from unsigned int arguments.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes the following warning in a mx3_defconfig build:
arch/arm/mach-mx3/mach-bug.c: In function 'bug_board_init':
arch/arm/mach-mx3/mach-bug.c:47: warning: passing argument 1 of 'mxc_iomux_setup_multiple_pins' discards qualifiers from pointer target type
While at it remove some useless consts from unsigned int arguments.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Visstrim_M10 boards have an TI tlv320aic3204 codec
attached to SSI1.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It seems vim's autocompletion played tricks on me without me noticing.
This was intruduced in
97976e2 (ARM: mx3: use .init_early to initialize cpu type, reset address and iomuxer)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the "i.MX35 (MCIMX35) Multimedia Applications Processor
Reference Manual" the correct address for the pad control register
IOMUXC_SW_PAD_CTL_PAD_ATA_DATA3 is 0x06ec, not 0x6e8.
Signed-off-by: Ryan Lortie <desrt@desrt.ca>
Acked-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on code created by Lothar Waßmann, Sascha Hauer, Wolfram Sang and
me.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
It is used for example in the i2c driver which can be compiled modular.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The regulator API ifdefs itself out when not enabled
so there is no need for users to do this.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited description]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add support for CS4271 SPI-connected CODEC to EDB93xx.
Signed-off-by: Alexander Sverdlin <subaparts@yandex.ru>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
[np: used min_t() as suggested by Sergei Shtylyov <sshtylyov@mvista.com>]
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Originally the FPGA ID checking switch statement left disabled all the
TS implemented FPGA devices if the ID was unknown to it. Michael Spang
created a fix in f9b1184e that changed the default to enable the devices
in the event TS silently release more revisions into the wild, this
unfortunately breaks custom FPGA bitstreams.
This patch amends the switch statement so that the TS devices are only
enabled if on the revision number is unknown (whilst the magic matches).
Changelog:
v2: neater implementation and some cosmetic changes
v1: initial release <20110305112937.GA22117@chipmunk>
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
When the manufacturer increases the revision number the platform
devices for the RTC, NAND, and RNG disappear. We should assume
new revisions have these devices instead of assuming they do not.
Signed-off-by: Michael Spang <mspang@csclub.uwaterloo.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
The following commit: 38698be:
OMAP2+: clockevent: set up GPTIMER clockevent hwmod right before timer init
Fixed properly the issue with early init for the timer1
So reverts commit 3b03b58dab that is now
generated a warning at boot time.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The debugfs support added to the regulator API (which has been merged
in during this merge window) creates directories for regulators named
after the display names for the regulators so replace / as a separator
for multiple supplies with + in the SMDK6410 machine.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Avoid relying on implicit inclusion of machine.h
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Reduce the logging output of s3c64xx_dma_init1() as it is not useful
for normal bootup (and we get an overall indication of the registration
of the PL180 DMA block).
This removes the following output from the log:
s3c64xx_dma_init1: registering DMA 0 (e0808100)
s3c64xx_dma_init1: registering DMA 1 (e0808120)
s3c64xx_dma_init1: registering DMA 2 (e0808140)
s3c64xx_dma_init1: registering DMA 3 (e0808160)
s3c64xx_dma_init1: registering DMA 4 (e0808180)
s3c64xx_dma_init1: registering DMA 5 (e08081a0)
s3c64xx_dma_init1: registering DMA 6 (e08081c0)
s3c64xx_dma_init1: registering DMA 7 (e08081e0)
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The MMC core calls s3c6400_setup_sdhcp_cfg_card() very frequently, causing
the log message in there at KERN_INFO to be displayed a lot which is slow
and overly chatty. Convert the message into a pr_debug() to tone this down.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The clock for i2c1 has been missing for a while, add it to the list of
clocks for the system and ensure it is initialised at startup.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
No need to put these in the global namespace and sparse gets upset.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Ensures that the declaration agrees with the definition and makes sparse
happy.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The call to s3c_gpio_cfgrange_nopull() takes a size and base
but this looks like it is trying to do base and end. This means
it is configuring too many GPIOs and on the case of the Cragganmore
means we're seeing an overflow of the ROW pins causing problems
with the keyboard driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The gta02 header file still uses the old S3C2410_GPJx defines instead of the
S3C2410_GPJ(x) macro. Since the S3C2410_GPJx defines have already been removed
this causes the following build failure:
sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_set_spk':
sound/soc/samsung/neo1973_wm8753.c:259: error: 'S3C2440_GPJ2' undeclared (first use in this function)
sound/soc/samsung/neo1973_wm8753.c:259: error: (Each undeclared identifier is reported only once
sound/soc/samsung/neo1973_wm8753.c:259: error: for each function it appears in.)
sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_get_spk':
sound/soc/samsung/neo1973_wm8753.c:267: error: 'S3C2440_GPJ2' undeclared (first use in this function)
sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_event':
sound/soc/samsung/neo1973_wm8753.c:276: error: 'S3C2440_GPJ1' undeclared (first use in this function)
sound/soc/samsung/neo1973_wm8753.c: At top level:
sound/soc/samsung/neo1973_wm8753.c:439: error: 'S3C2440_GPJ2' undeclared here (not in a function)
sound/soc/samsung/neo1973_wm8753.c:440: error: 'S3C2440_GPJ1' undeclared here (not in a function)
This patches fixes the issue by doing a s,S3C2410_GPJ([\d]+),S3C2410_GPJ(\1),g
on the file.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch modifies the number of total GPIO lines for Bank F
for Samsung S5P6440 and S5P6450 SoCs from 2 to 16.
This is necessary as the GPIO lines from 0 to 13 are reserved
and only lines 14 and 15 are used. As during initialization,
the line number starts at 0, putting 2 does not solve the
intended purpose.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The gta02 mach file references the ohci device.
So we need to select S3C_DEV_USB_HOST to have the device available.
This fixes the following linker errors:
arch/arm/mach-s3c2440/built-in.o: In function 'gta02_machine_init':
mach-gta02.c:(.init.text+0x370): undefined reference to 's3c_ohci_set_platdata'
arch/arm/mach-s3c2440/built-in.o:(.init.data+0xac): undefined reference to 's3c_device_ohci'
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds Samsung ARMLEX4210 board support file
which is based on Exynos4210.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
[kgene.kim@samsung.com: added clk_type for hsmmc3]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds basic definitions for MAX8952 & LP3974 (MAX8998
compatible) PMICs for UniversalC210 board. Power consumers for the
device drivers will be added later. These two PMICs occupy I2C5 bus.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds Samsung NURI board support.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Currently tegra_pcie_init is effectively called as subsys_initcall. With
multiplatform kernel this may cause hangs on boards that don't intend to
support Tegra2 PCI-e. Ensure that TrimSlice board code initializes PCI-e
only when actually running on the TrimSlice.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Colin Cross <ccross@android.com>
Move tegra_pcie_power_off before tegra_pcie_power_on for clean addition
of PCIE power gating
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Colin Cross <ccross@android.com>
These are not currently used anywhere, but when the relevant
peripherals are enabled on the Dove port, the IRQ numbers should be
passed into the drivers via platform device resources rather than
having the drivers get them from platform headers directly.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
This patch makes the various mach dirs that use the plat-orion time
code pass in timer and bridge addresses explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
This patch declares the i2c audio codec and initialise audio.
It's adding the alc5621 codec in the i2c board info and is calling
kirkwood_audio_init() to initialize kirkwood audio.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
New FPGA revisions have been released and seen in the wild on the
platform, so it's time to update the list.
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Initialize PCIE1 on the 6282-based QNAP TS-419P+ since it has a Marvell 9125
SATA chip on each PCI bus.
Signed-off-by: Zintis Pētersons <zintis.petersons@abcsolutions.lv>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Use the machine-specific kexec_reinit hook to make sure
PCIe is enabled before starting a new kernel.
Signed-off-by: Eric Cooper <ecc@cmu.edu>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
PCIe may have been disabled (by kirkwood_clock_gate)
if this kernel was started by kexec. Make sure PCIe
is enabled before attempting to access the device ID
register, otherwise the system will hang.
Signed-off-by: Eric Cooper <ecc@cmu.edu>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Provide the option to call a machine-specific function
before kexec'ing a new kernel.
Signed-off-by: Eric Cooper <ecc@cmu.edu>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
The NAND supports 32bit reads and writes so lets stop shunting 8bit
chunks across the bus.
Doing a dumb 'dd' benchmark, this increases performance roughly like so:
* read: 1.3MB/s to 3.4MB/s
* write: 614kB/s to 882kB/s
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
omap4 interrupt disable bits is different. On rx kfifo full, the mbox rx
interrupts wasn't getting disabled, and this is causing the rcm stress tests
to hang.
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: Armando Uribe <x0095078@ti.com>
Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds support for LCD backlight control using PWM timer
for Samsung's SMDKV210 board.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for LCD backlight using PWM timer for
Samsung SMDKC100 board.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for LCD backlight control using PWM timer
for Samsung SMDK6450 board.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for LCD backlight control using PWM timer
for Samsung SMDK6440 board.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for LCD backlight using PWM timer for
Samsung SMDK6410 board.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch does the following:-
1. It moves file pwm.c from plat-s3c24xx to plat-samsung. This will
enable all machines with Samsung SoCs to make use of the same code.
2. The device definitions have been separated to a new file dev-pwm.c
for better clarity and structure.
3. It will enable all Samsung S3C and S5P series SoC's to use common
PWM Kconfig definition.
Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
twl4030_codec_audio and twl4030_codec_vibra_data has unused field.
In order to remove it, corresponding settings needs to be removed
from board files.
Signed-off-by: Ilkka Koskinen <ilkka.koskinen@nokia.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Added the KIM (Kernel initialization module for the
Shared Transport driver) device entry in the board file
Only the Blutooth enable GPIO is set for now
Signed-off-by: Guy Eilam <guy@wizery.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On the OMAP3430LDP board, the ads7846 touchscreen controller
is powered by VAUX1 regulator (supplying 3.0v).
Fix this mapping in the board file, and hence prevent
the ads7846 driver init to fail with the below error..
ads7846 spi1.0: unable to get regulator: -19
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
WARNING: arch/arm/plat-omap/built-in.o(.data+0x6d4): Section mismatch in reference from the variable omap_driver to the function .init.text:omap_cpu_init()
The variable omap_driver references
the function __init omap_cpu_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,
Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This Patch frees all the dynamically allocated memory
which couldn't have been released in some error hitting cases.
Signed-off-by: Shweta Gulati <shweta.gulati@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch adds dma support for Freescale MXS-based SoC i.MX23/28,
including apbh-dma and apbx-dma.
* apbh-dma and apbx-dma are supported in the driver as two mxs-dma
instances.
* apbh-dma is different between mx23 and mx28, hardware version
register is used to differentiate.
* mxs-dma supports pio function besides data transfer. The driver
uses dma_data_direction DMA_NONE to identify the pio mode, and
steals sgl and sg_len to get pio words and numbers from clients.
* mxs dmaengine has some very specific features, like sense function
and the special NAND support (nand_lock, nand_wait4ready). These
are too specific to implemented in generic dmaengine driver.
* The driver refers to imx-sdma and only a single descriptor is
statically assigned to each channel.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The _add_optional_clock_alias function expects an entry
already existing in the clkdev table in the form of
<dev-id=NULL, con-id=role> which might not be the case
always.
Instead, just check if an entry already exists in clkdev
in the <dev-id=dev_name, con-id=role> form, else go ahead
and add one.
Remove any assumption of an entry already existing in clkdev
table in any form.
Since this means, adding a new entry in clkdev if it does
not already exist, and not really adding an 'alias',
also rename the function name
(s/_add_optional_clock_alias/_add_optional_clock_clkdev)
to reflect this.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Reported-by: Sumit Semwal <sumit.semwal@ti.com>
Cc: Sumit Semwal <sumit.semwal@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Partha Basak <p-basak2@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
IVAHD and ABE power domain logic state is populated using directly
value instead of the capability flags.
Fix the same.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[paul@pwsan.com: updated to apply at a different point on the tree]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The register naming convention for clock domain control inside
power domain instance is:
OMAPXXXX_<partition>_<power_domain>_<clock_domain>_CDOFFS
Both CPU0 and CPU1 use MPU as clock domain name instead of CPU0
and CPU1.
Change the name to stick to the convention.
The autogen scripts are updated accordingly.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Modifying the device & driver name from "mmci-omap-hs" to
"omap_hsmmc".
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Acked-by: Benoit Cousson<b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP2420 platform consists of mmc block as in omap1 and not the
hsmmc block as present in omap2430, omap3, omap4 platforms.
Removing all base address macro defines except keeping one for OMAP2420 and
adapting only hsmmc device registration and driver to hwmod framework.
Changes involves:
1) Remove controller reset in devices.c which is taken care of
by hwmod framework.
2) Using omap-device layer to register device and utilizing data from
hwmod data file for base address, dma channel number, Irq_number,
device attribute.
3) Update the driver to use dev_attr to find whether controller
supports dual volt cards
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Reviewed-by: Balaji T K <balajitk@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
CC: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Moving the definition of mux setting API from devices.c to hsmmc.c
and renaming it from "omap2_mmc_mux" to "omap_hsmmc_mux".
Also calling "omap_hsmmc_mux" from omap2_hsmmc_init.
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Chris Ball <cjb@laptop.org
Cc: Tony Lindgren <tony@atomide.com
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add a device attribute to hwmod data of omap2430, omap3, omap4.
Currently the device attribute holds information regarding dual volt MMC card
support by the controller which will be later passed to the host driver via
platform data.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Acked-by: Benoit Cousson<b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update the omap3 hwmod data with the HSMMC info.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update the omap2430 hwmod data with the HSMMC info.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The MMC controller on the OMAP2420 is different from those
on the OMAP2430, OMAP3 and OMAP4 families - all of the latter
are identical. The one on the OMAP2420 is closer to that
on OMAP1 chips.
Currently, the n8x0 is the only OMAP2420 platform supported
in mainline which registers the MMC controller. Upcoming
changes to register the controllers using hwmod data are
potentially invasive. To reduce the risk, separate out the
2420 controller registration from the common init function
and update its only user. Also seperating out mux settings
for OMAP2420.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Chris Ball <cjb@laptop.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The devices of clocks are set to usbhs, so that
only usbhs common driver can invoke these clocks.
The dummy per port clocks are added to omap3
clock data base. This helps to invoke common
clock get APIs for omap3 and omap4.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The prototype and defination of functions usb_ehci_init and
usb_ohci_init are removed. The ehci and ohci devices are
removed since usbhs device contains both ehci and ohci details.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The usbhs intialization is invoked by all omap3 and omap4
variant board files.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
A new usbhs platform device is defined;
this device will be the parent device of ehci and
ohci platform devices. the usbhs_init function
is defined which does the usbhs device initialization
and I/O mux of ehci and ohci.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
enabling and disabling the common clocks for ehci
and ohci is implemented. usbhs is a common parent
platform driver for EHCI and OHCI driver. This driver
receives the clock enable and disable requests
from ehci and ohci drivers.The UHH and TLL
initialization is also performed.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Create the ehci and ohci specific platform data structures.
The port enum values are made common for both ehci and ohci.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We already have both EHCI and OHCI there, so let's
rename to be sure everybody will understand the entire
USB HOST functionality is setup on this file.
Signed-off-by: Felipe Balbi <balbi@ti.com>
add names to EHCI and OHCI resources. That will help us
identify the resource correctly when moving to a setup
where OHCI and EHCI play well together.
Signed-off-by: Felipe Balbi <balbi@ti.com>
The patch below removes an extra "l" in the word.
Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
This is not strictly necessary but the right thing to do.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This fixes a small memory leak that was only hit in very unlikely error
paths.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- wrong MUX was set before for IRQ
- get_pendown_state is no more needed
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The latter are error-prone because the bank number is one less than one
would read in the documentation.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Eric Benard <eric@eukrea.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Powerdown the internal PHY during board init for OMAP44xx.
So that when musb is disabled core transition to retention/off
is not blocked.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Add the context save/restore for the control module register
used for OMAP4430 musb with UTMI embedded PHY interface.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch is again current omap-for-linus branch
Adds platform initialization for working with the WLAN module
attached to the omap3evm.
The patch includes MMC2 initialization, SDIO and control pins
muxing and platform device registration.
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On non-OMAP2 and non-OMAP3 kernel configs, turn omap2_sdrc_init() into
a no-op. Otherwise, compilation breaks on an OMAP4-only config with
the current omap-for-linus branch:
arch/arm/mach-omap2/built-in.o: In function `omap2_init_common_devices':
../mach-omap2/io.c:421: undefined reference to `omap2_sdrc_init'
Thanks to Sergei Shtylyov <sshtylyov@mvista.com> for suggesting the use
of a empty static inline function rather than a macro.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
[tony@atomide.com: updated not to use __init for inline omap2_sdrc_init]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix below section mismatch warning:
WARNING: vmlinux.o(.data+0x673c): Section mismatch in reference from the variable davinci_driver to the function .init.text:davinci_cpu_init()
The variable davinci_driver references
the function __init davinci_cpu_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Commit 6d803ba736 (ARM: 6483/1: arm & sh:
factorised duplicated clkdev.c) caused the following warnings:
In file included from /home/headless/src/kernel.org/linux-davinci/arch/arm/
include/asm/clkdev.h:17,
from include/linux/clkdev.h:15,
from arch/arm/mach-davinci/clock.h:71,
from arch/arm/mach-davinci/common.c:22:
arch/arm/mach-davinci/include/mach/clkdev.h:4: warning: `struct clk' declared
inside parameter list
arch/arm/mach-davinci/include/mach/clkdev.h:4: warning: its scope is only this
definition or declaration, which is probably not what you want
arch/arm/mach-davinci/include/mach/clkdev.h:9: warning: `struct clk' declared
inside parameter list
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
For DMA operation, the davinci spi driver needs an event queue number.
Currently, this number is passed as a IORESOURCE_DMA. This is not
correct, as the event queue is not a DMA channel. Pass the event queue
via the platform data structure instead.
On dm355 and dm365, move the eventq assignment for spi0 out of resources
array and into platform data.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The da850 uart pinmux arrays are not used. Remove them.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The da850_mmcsd0_pins pinmux array contains pins that are specific to the
da850 evm board (the write protect and card detect GPIO pins). Move
the array to the board file.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The da850_mcasp_pins pinmux array is specific to the da850_evm, and is
not generic. Move the array to the board file, make it static initdata,
and rename it accordingly.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The da850_emif25_pins pinmux array is not used. Remove it.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The da850_cpgmac_pins pinmux array is not used. Remove it.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
For the MityDSP-L138/MityARM-1808 SoMs, the speed grade can be determined
from the part number string read from the factory configuration block on
the on-board I2C PROM. Configure the maximum CPU speed based on this
information.
This patch was tested using a MityDSP-L138 and MityARM-1808 at various
speedgrades. Also, for code coverage, a bogus configuration was tested
as well as a configuration having an unknown part number.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Michael Williamson <michael.williamson@criticallink.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
From: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
The JTAG variant code for Rev-2.0 silicon of the OMAP-L138 has changed.
In addition, the variant code for the AM-1808 SoC appears to match
the Rev-2.0 code for the OMAP-L138. Add an additional entry to support
these chips.
This patch is originally from a patch on the arago project, here:
http://arago-project.org/git/projects/?p=linux-omapl1.git;a=commit;h=6157618435e313a444cdf059702bd34036a6e2b7
Further information related to the need for this patch can be located at
http://e2e.ti.com/support/embedded/f/354/p/67290/248486.aspxhttp://linux.davincidsp.com/pipermail/davinci-linux-open-source/2010-November/021224.html
This patch was tested using an AM-1808 SoC on a MityARM-1808 SoM card. It
was also tested using a Rev 1.0 silicon OMAP-L138 on a MityDSP-L138F card.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Michael Williamson <michael.williamson@criticallink.com>
Reported-by: Nicolas Luna <luna.id@gmail.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch adds USB1.1 support for the Hawkboard-L138 system
Signed-off-by: Victor Rodriguez <vm.rod25@gmail.com>
Tested-by: Rene Gonzalez <renegs.2378@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch adds USB1.1 and USB2.0 clocks for the Hawkboard-L138 system
Signed-off-by: Victor Rodriguez <vm.rod25@gmail.com>
Tested-by: Rene Gonzalez <renegs.2378@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch adds MMC/SD support for the Hawkboard-L138 system
Signed-off-by: Victor Rodriguez <vm.rod25@gmail.com>
Tested-by: Rene Gonzalez <renegs.2378@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch defines Pin Mux configuration to enable MMC/SD
and USB-OHCI on the Hawkboard-L138 system
Signed-off-by: Victor Rodriguez <vm.rod25@gmail.com>
Tested-by: Rene Gonzalez <renegs.2378@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch adds EDMA support for the Hawkboard-L138 system
Signed-off-by: Victor Rodriguez <vm.rod25@gmail.com>
Tested-by: Rene Gonzalez <renegs.2378@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch adds EMAC support for the Hawkboard-L138 system
Signed-off-by: Victor Rodriguez <vm.rod25@gmail.com>
Tested-by: Rene Gonzalez <renegs.2378@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This patch fix a bug in the register indexing for GPIOs numbers > 31
to get the relevant hardware registers of tnetv107x to control the GPIOs.
In the structure tnetv107x_gpio_regs:
struct tnetv107x_gpio_regs {
u32 idver;
u32 data_in[3];
u32 data_out[3];
u32 direction[3];
u32 enable[3];
};
The GPIO hardware register addresses of tnetv107x are stored.
The chip implements 3 registers of each entity to serve 96 GPIOs,
each register provides a subset of 32 GPIOs.
The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit
and gpio_reg_clear_bit.
The bug implied the use of macros to access the relevant hardware
register e.g. the driver code used the macro like this:
'gpio_reg_clear_bit(®->data_out, gpio)'
But it has to be used like this:
'gpio_reg_clear_bit(reg->data_out, gpio)'.
The different results are shown here:
- ®->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes)
- reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes)
Acked-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
After the multi-component commit f0fba2ad (ASoC: multi-component - ASoC
Multi-Component Support) for ASoC, we need to register the platform
device for davinci-pcm-audio.
This patch and patch at [1] are required for audio to work on
DA850/OMAP-L138.
[1] https://patchwork.kernel.org/patch/495211/
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Set up the GPTIMER hwmod used for the clockevent source immediately
before it is used. This avoids the need to set up all of the hwmods
until the boot process is further along. (In general, we want to defer
as much as possible until late in the boot process.)
This second version fixes a bug pointed out by Santosh Shilimkar
<santosh.shilimkar@ti.com>, that would cause the kernel to use an
incorrect timer hwmod name if the selected GPTIMER was not 1 or 12 -
thanks Santosh. Also, Tarun Kanti DebBarma <tarun.kanti@ti.com>
pointed out that the original patch did not apply cleanly; this has
now been fixed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Add omap_hwmod_setup_one(), which is intended for use early in boot to
selectively setup the hwmods needed for system clocksources and
clockevents, and any other hwmod that is needed in early boot.
omap_hwmod_setup_all() can then be called later in the boot process.
The point is to minimize the amount of code that needs to be run
early.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Previously, if a hwmod had already been set up, and the code attempted
to set up the hwmod again, an error would be returned. This is not
really useful behavior if we wish to allow the OMAP core code to setup
the hwmods needed for the Linux clocksources and clockevents before
the rest of the hwmods are setup. So, instead of generating errors,
just ignore the attempt to re-setup the hwmod.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Move the code that looks for the MPU initiator hwmod to run during
the individual hwmod _register() function. (Previously, it ran after
all hwmods were registered in the omap_hwmod_late_init() function.)
This is done so code can late-initialize a few individual hwmods --
for example, for the system timer -- before the entire set of hwmods is
initialized later in boot via omap_hwmod_late_init().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Migrating to clkdev has several advantages:
* Less code in mach-msm/clock.c
* A more robust clk_get() implementation
* clk_add_alias() support
* clk_get_sys() support
In general, this will help board authors setup clock aliases and
break the dependency on device pointers in the clock tables.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Not all devices use proc_comm and determining if a clock is local
vs. remote is fragile when done by comparing clk_ops pointers.
Instead, implement an is_local() function for all clk_ops to
determine if the clock is local. Doing this allows us to remove
the last references to clk_ops_pcom from clock.c and compile it
for targets with CONFIG_MSM_PROC_COMM=n.
We don't need to set the clk_ops at runtime until 7x30 local
clock detection comes in. Right now it's just complicating things
so just set the ops pointer statically.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
WARNING: vmlinux.o(.cpuinit.text+0xc80): Section mismatch in
reference from the function boot_secondary() to the variable
.init.text:msm_secondary_startup
The function __cpuinit boot_secondary() references a variable
__init msm_secondary_startup. If msm_secondary_startup is only
used by boot_secondary then annotate msm_secondary_startup with
a matching annotation.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Rename omap_hwmod_init() to omap_hwmod_register(). Rename
omap_hwmod_late_init() to omap_hwmod_setup_all(). Also change all of
the callers to reflect the new names. While here, update some
copyrights.
Suggested by Tony Lindgren <tony@atomide.com>.
N.B. The comment in mach-omap2/serial.c may no longer be correct, given
recent changes in init order.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
There's no longer any reason why we should prevent multiple
calls to omap_hwmod_init(). It is now simply used to register an
array of hwmods.
This should allow a subset of hwmods (e.g., hwmods
handling the system clocksource and clockevents) to be registered
earlier than the remaining mass of hwmods.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
This patch fixes wrong constants in the hotplug assembly code for
Exynos4 such as Russell's changing in vexpress hotplug and fixes
hard-coded control register constatns also.
Reported-by: Changhwan Youn <chaos.youn@samsung.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds registers the s3c touchscreen and adc devices
to add touchscreen support for the gta02.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The pcf50633 regulator driver does not use the state_mem constraints,
so there is no use in setting them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Note that the hardware schematics and documentations can be obtained
here: http://www.bugcommunity.com/wiki/index.php/BUGbase
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is to fix the warning below.
arch/arm/configs/mx51_defconfig:113:warning: symbol value 'm' invalid for LEDS_CLASS
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows the regulator core to disable all regulators
which are not in use at the end of the kernel init phase.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The REGULATOR_CHANGE_STATUS flag needs to be set on valid_ops_mask,
otherwise it a driver wont be able to turn the regulator on or off.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds support for the two buttons found on the gta02 device,
which are connectd to gpio pins, using the gpio-keys driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The ASoC multi-component patch introduced a new pcm platform device,
which needs to be registered by board files in order for sound to work.
This patch does this for the gta02 board.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since f0fba2ad1b it's required to register platform devices even for
AC'97 codecs. Register one on tosa (wm9712-codec).
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
pxa25x platforms were left out of major ASoC Update patch.
Since f0fba2ad1b a registration of pxa-pcm-audio device is required for
ASoC to function on pxa platforms. Register one also for pxa210/pxa25x.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Since 2e48928d8a it's no longer possible to set
the name of the LED trigger for RFKILL events. Drop respective code from tosa-bt.c
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Stephen Hemminger <shemminger@vyatta.com>
Cc: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
The Cortex-A9 tile on the Versatile Express suffers from a number of
engineering errata.
This patch selects workarounds in the ARCH_VEXPRESS_CA9X4 Kconfig entry
so that users don't need to worry about which ones to apply.
Reported-by: Ulrich Weigand <ulrich.weigand@de.ibm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We currently presume a 4x expansion to guess the decompressed kernel size
in order to determine if the decompressed kernel is in conflict with
the location where zImage is loaded. This guess may cause many issues
by overestimating the final kernel image size:
- This may force a needless relocation if the location of zImage was
fine, wasting some precious microseconds of boot time.
- The relocation may be located way too far, possibly overwriting the
initrd image in RAM.
- If the kernel image includes a large already-compressed initramfs image
then the problem is even more exacerbated.
And if by some strange means the 4x guess is too low then we may overwrite
ourselves with the decompressed image.
So let's use the exact decompressed kernel image size instead. For that
we need to rely on the stat command, but this is hardly a new build
dependency as the kernel already depends on many external commands
to be built provided by the coreutils package where stat is found.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The S5P6442 and S5PC100 SoCs have 4 VICs. However, default VIC number
is defined 2 in arch/arm/common. So can be happened some problem on it.
Basically, it requires for suspend and resume.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The S5PV210 SoC have 4 VICs. It requires for suspend and resume.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Loading Thumb-2 modules into an ARM kernel or vice-versa isn't
guaranteed to work safely, since the kernel is not interworking-
aware everywhere.
This patch adds "thumb2" to the module vermagic when
CONFIG_THUMB2_KERNEL is enabled, to help avoid accidental loading
of modules into the wrong kernel.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARMv7 allows the debug core logic to be powered down and provides the
DBGPRSR register so that software can power-up and check the status of
the logic.
This patch ensures that the debug logic is powered up on ARMv7 cores
before we attempt to access the extended debug registers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The GETHBPREGS ptrace request incorrectly maps its index argument onto
the thread's saved debug state when the index != 0. This has not yet
been seen from userspace because GDB (the only user of this request)
only reads from register 0.
This patch fixes the indexing.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since commit 6fc31d54 this comment is no longer true.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Disable autoidle on all clocks during clock framework initialization.
(If CONFIG_PM is set, autoidle is re-enabled for all clocks later in
the boot process.)
The principle behind this patch, and some similar patches, is that the
kernel should start with all power management features disabled.
Later in the boot process, the PM code, if compiled in with CONFIG_PM,
enables or re-enables power management features.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Enable hardware gate control for all dpll MX and X2 postdividers.
This requires the allow_idle/deny_idle functions to be
populated for all clock nodes (mx/x2 post dividers) in
clkops.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
On OMAP4, the dpll post divider outputs (MX outputs)
along with clockout_x2 output provide a way to allow/deny
hardware level autogating.
Allowing autoidle would mean that the hw would autogate
this clock when there is no dependency for it.
Denying idle would mean that this clock output will be
forced to stay enabled.
Add dpll api's to read/allow/deny idle control
for these dpll mx postdividers.
NOTE: The gatectrl bit set to 0 allows gatectrl,
and the bit set to 1 denies gatectrl.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: moved OMAP4-specific DPLL control code to
mach-omap2/dpll44xx.c; added some documentation for CLOCK_CLKOUTX2]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Attempt to enable autoidle for as many clocks as possible in the
OMAP2+-common CONFIG_OMAP_RESET_CLOCKS code. Currently, this only
enables DPLL autoidle for OMAP3/4 DPLLs; but future patches will
enable autoidle for other clocks and the OMAP2 DPLL/APLLs.
In the long run, we should probably get rid of
CONFIG_OMAP_RESET_CLOCKS, and unconditionally run the code that it
selects. Otherwise, the state of the clock tree won't match the
hardware state - this could result in clocks being enabled or disabled
unpredictably.
Based on a patch by Rajendra Nayak <rnayak@ti.com> that did this in
the pm34xx.c/pm44xx.c code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
All OMAP3/4 dpll's support hardware level autogating.
Populate allow_idle/deny_idle function pointers for all
DPLL's in clkops.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
On OMAP various clock nodes (dpll's, mx post dividers, interface clocks)
support hardware level autogating which can be controlled from
software.
Support such functionality by adding two new function pointer
allow_idle and deny_idle in the clkops structure.
These function pointers can be populated for any clock
node which supports hardware level autogating.
Also add 2 new functions (omap_clk_enable_autoidle_all and
omap_clk_disable_autoidle_all) which can be called from
architecture specific PM core code, if hardware level
autogating (for all supported clock nodes) is to be
enabled or disabled.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: use spinlock rather than mutex due to race; renamed functions;
functions now return ints]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
DPLL1 on omap3 is very similar to the rest of
the non-core dpll's.
Hence populate clkops_omap3_noncore_dpll_ops
as the clkops for it, instead of the
currently populated clkops_null.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Check if enable/disable operations are supported for a given
clock node before attempting to call them.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Now that wkup and sleep dependencies are supported (in the
form of static deps) for OMAP4, remove all instances of
pr_errs' stating dependencies are still unsupported
on OMAP4.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add OMAP4 platform specific implementation to support clkdm
wkup and sleep dependencies a.k.a static dependencies.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: removed comment about PRM; zero-prefixed STATICDEP
register offset; fixed loop termination condition in
omap4_clkdm_clear_all_wkup_sleep_deps(); thanks to Kevin Hilman for finding
and helping fix this bug]
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add new OMAP4 CM accesor apis to set/clear and read
bitfields (based on mask) from CM registers.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4 supports static dependencies and dynamic dependencies
between clock domains. Static dependencies imply both
wakeup as well as sleep dependencies.
Generate all clockdomain static dependency sources.
(Dynamic dependency sources are hardwired and
cannot to controlled from software).
The autogen scripts are updated to generate the contents
of this patch.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Define the following architecture specific funtions for omap2/3/4
.clkdm_clk_enable
.clkdm_clk_disable
Convert the platform-independent framework to call these functions.
Also rename the api's by removing the omap2_ preamble.
Hence call omap2_clkdm_k_enable as clkdm_clk_enable and
omap2_clkdm_clk_disable as clkdm_clk_disable.a
Remove unused functions (_enable/_disable_hwsup) and unsed
headers from clockdomain.c file.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Define the following architecture specific funtions for omap2/3/4
.clkdm_allow_idle
.clkdm_deny_idle
Convert the platform-independent framework to call these functions.
Also rename the api's by removing the omap2_ preamble.
Hence call omap2_clkdm_allow_idle as clkdm_allow_idle and
omap2_clkdm_deny_idle as clkdm_deny_idle.
Make the _clkdm_add_autodeps and _clkdm_del_autodeps as non-static
so they can be accessed from OMAP2/3 platform specific code.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Define the following architecture specific funtions for omap2/3/4
.clkdm_sleep
.clkdm_wakeup
Convert the platform-independent framework to call these functions.
Also rename the api's by removing the omap2_ preamble.
Hence call omap2_clkdm_wakeup as clkdm_wakeup and
omap2_clkdm_sleep as clkdm_sleep.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: fixed omap3_clkdm_clear_all_sleepdeps() and
omap2_clkdm_clear_all_wkdeps() to test against the correct
loop termination condition; thanks to Kevin Hilman for finding and
helping fix]
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Define the following architecture specific funtions for omap2/3
.clkdm_add_wkdep
.clkdm_del_wkdep
.clkdm_read_wkdep
.clkdm_clear_all_wkdeps
.clkdm_add_sleepdep
.clkdm_del_sleepdep
.clkdm_read_sleepdep
.clkdm_clear_all_sleepdeps
Convert the platform-independent framework to call these functions.
With this also move the clkdm lookups for all wkdep_srcs and
sleepdep_srcs at clkdm_init.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: fixed loop termination conditions in omap*_clkdm_clear_all_*();
thanks to Kevin Hilman for finding and helping fix those bugs; also
avoid re-resolving clockdomains during init; abstracted out clkdm_dep walk]
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Put infrastructure in place, so arch specific func pointers
can be hooked up to the platform-independent part of the
framework.
This is in preparation of splitting the clockdomain framework into
platform-independent part (for all omaps) and platform-specific
parts.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Trivial fix to remove the unused function declaration
from the powerdomain header.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
CPU0 and CPU1 clockdomain is at the offset of 0x18 from the LPRM base.
The header file has set it wrongly to 0x0. Offset 0x0 is for CPUx power
domain control register
Fix the same.
The autogen scripts is fixed thanks to Benoit Cousson
With the old value, the clockdomain code would access the
*_PWRSTCTRL.POWERSTATE field when it thought it was accessing the
*_CLKSTCTRL.CLKTRCTRL field. In the worst case, this could cause
system power management to behave incorrectly.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: added second paragraph to commit message]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
init_early hook runs too early for omap3_mux_init(), so the board
won't boot. Moved to init_machine, then it works just fine.
Signed-off-by: Radek Pilar <mrkva@mrkva.eu>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add SI4713 FM transmitter supplies, platform data and setup to RX-51/N900.
It is connected to line output signals of TLV320AIC34 codec A part.
Driver can be either built-in or a module. It can be tuned with v4l2-ctl
from ivtv-utils. Following examples illustrate the use of it:
v4l2-ctl -d /dev/radio0 --set-ctrl=mute=0 (power up)
v4l2-ctl -d /dev/radio0 -f 107900 (tune 107.9 MHz)
v4l2-ctl -d /dev/radio0 --set-ctrl=mute=1 (power down)
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support to register an isr for IOMMU fault situations and adapt it
to allow such (*isr)() to be used as fault callback. Drivers using IOMMU
module might want to be informed when errors happen in order to debug it
or react.
Signed-off-by: David Cohen <dacohen@gmail.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
IOMMU upper layer and user are responsible to handle a fault and to
define whether it will end up as an error or not. OMAP2+ specific
layer should not print anything in such case.
Signed-off-by: David Cohen <dacohen@gmail.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Information like base address and DMA channel nubers should no longer
be obtained using macros. These information should be obtained from
hwmod database. Hence the macros that define the base address are removed.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
After McBSP driver is hwmod adapted, the information about the hw would be
obtained from the hwmod database by the mcbsp driver. Since DMA programming is
handled by the client driver, APIs are provided to pass the DMA channel number
and base address of data register required by the client driver for DMA
programming.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pm runtime support for McBSP driver.
Reference to fclk is not removed because it is required when the
functional clock is switched from one source to another.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
McBSP2/3 in OMAP3 has sidetone feature which requires autoidle
to be disabled before starting the sidetone. Also SYSCONFIG
register has to be set with smart idle or no idle depending on the
dma op mode (threshold or element sync). For doing these operations
dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[tony@atomide.com: updated to compile without omap_device idle calls]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Modify OMAP2+ McBSP to use omap hwmod framework APIs
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since the sidetone block is tightly coupled to the mcbsp, sidetone information
is directly added to mcbsp2 & 3 hwmod dev_attr.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Added a name to address space belonging to SDMA and MPU facilitating
the driver to get the address space info by name. Added a revision
member inorder to facilitate the driver to differentiate between
mcbsp in different omap.
Also added a platform_get_irq in probe to get irq number by index since
from OMAP4, there will be a single irq line.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add McBSP hwmod data for OMAP3.
Added a revision member inorder to facilitate the driver to
differentiate between mcbsp in different omap.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add McBSP hwmod data for OMAP2430.
Added a revision member inorder to facilitate the driver to
differentiate between mcbsp in different omap.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add McBSP hwmod data for OMAP2420.
Also add macros in prcm-common.h for idlest bit of OMAP24XX McBSP devices
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Implement McBSP as platform device and add support for
registering through platform device layer using resource
structures.
Later in this patch series, OMAP2+ McBSP driver would be modified to
use hwmod framework after populating the omap2+ hwmod database.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adds support for resource API to get address space info other than just MPU.
The drivers can now use platform_get_resource_byname() to get resource of
type 'IORESOURCE_MEM' by name.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use runtime pm APIs to enable/disable mailbox clocks and
to configure SYSC register.
Based on the patch sent by Felipe Contreras:
https://patchwork.kernel.org/patch/101662/
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove static platform_device and resource data within
omap mailbox driver; use the one defined in the hwmod
database along with omap_device framework for device
build and registration.
Add device latency functions to be used, so clock can be
enabled and sysconfig is configured.
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Mailbox hwmod data for omap3.
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP IOMMU generic layer doesn't need ot print function name during
error messages. Print module name instead which is more useful.
Signed-off-by: David Cohen <dacohen@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In a modular build of the iommu code it's possible that the arch iommu code
isn't loaded when trying to enable the iommu. Instead of blindly following a
null pointer return -NODEV in that case.
Signed-off-by: Martin Hostettler <martin@neutronstar.dyndns.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP2+ kernels built without CONFIG_OMAP_32K_TIMER crash on boot after the
2.6.38 sched_clock changes:
[ 0.000000] OMAP clockevent source: GPTIMER1 at 13000000 Hz
[ 0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[ 0.000000] pgd = c0004000
[ 0.000000] [00000000] *pgd=00000000
[ 0.000000] Internal error: Oops: 80000005 [#1] SMP
[ 0.000000] last sysfs file:
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 Not tainted (2.6.38-rc5-00057-g04aa67d #152)
[ 0.000000] PC is at 0x0
[ 0.000000] LR is at sched_clock_poll+0x2c/0x3c
Without CONFIG_OMAP_32K_TIMER, the kernel has an clockevent and
clocksource resolution about three orders of magnitude higher than
with CONFIG_OMAP_32K_TIMER set. The tradeoff is that the lowest
power consumption states are not available.
Fix by calling init_sched_clock() from the GPTIMER clocksource init code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds definitions for power consumers for s3c-hsotg driver
on Goni board. The consumers are defined as arrays, because later more
entries for MIPI and ADC will be defined.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
A lot of power regulator has been enabled by default causing the board
to consume a lot of power. This patch fixes this issue.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
tegra_dma_init currently simply bails out early if any initialization fails.
This skips various data-structure initialization. In turn, this means that
tegra_dma_allocate_channel can still hand out channels. In this case, when
tegra_dma_free_channel is called, which calls tegra_dma_cancel, the walking
on ch->list will OOPS since the list's next/prev pointers may still be
NULL.
To solve this, add an explicit "initialized" flag, only set this once _init
has fully completed successfully, and have _allocate_channel refuse to hand
out channels if this is not set.
While at it, simplify _init:
* Remove redundant memsets
* Use bitmap_fill to mark all channels as in-use up-front, and remove
some now-redundant bitmap initialization loops.
* Only mark a channel as free once all channel-related initialization has
completed.
Finally, the successful exit path from _init always has ret==0, so just
hard-code that return. The error path still returns ret.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The ASoC machine driver was written assuming my previous patch to add
complete support for these clocks, which named them cdev1/2. Rename
the clocks to match that, to avoid churn in the ASoC driver.
This rename also makes the clocks more consistent with other Tegra
clocks irrespective of any of that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The driver is tegra-i2s not just i2s. Rename the clocks to match, so that
clk_get_sys can look up by driver name.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The following commit makes the Tegra APB DMA engine fail to initialize
correctly: 0cf6230af9
ARM: tegra: Move tegra_common_init to tegra_init_early
The reason is that tegra_init_early_ calls tegra_dma_init which calls
request_threaded_irq, which fails since the IRQ hasn't yet been marked
valid; that only happens in tegra_init_irq, which gets called after
tegra_init_early.
This used to work OK, since tegra_init_early was tegra_common_init, which
got called after tegra_init_irq, basically from the beginning of
tegra_harmony_init.
Solve this by converting tegra_dma_init to a postcore_initcall. This makes
it execute late enough that IRQs are marked valid, and avoids having to
add it back to every machine's init function.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
On OMAP4430 ES1.0 the local timers are gated by security. Enable the
CONFIG_LOCAL_TIMERS for omap2plus build and handle the OMAP4430 es1.0
exception case.
This patch has dependency on the first patch in this series.
ARM: smp: Select local timers vs dummy timer support runtime
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The current code support of dummy timers in absence of local
timer is compile time. This is an attempt to convert it to runtime
so that on few SOC version if the local timers aren't supported
kernel can switch to dummy timers. OMAP4430 ES1.0 does suffer from
this limitation.
This patch should not have any functional impact on affected
files.
Cc: Daniel Walker <dwalker@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Colin Cross <ccross@android.com>
Cc: Erik Gilling <konkers@android.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In the case of a conflict between the memory used by the compressed
kernel with its decompressor code and the memory used for the
decompressed kernel, we currently store the later after the former and
relocate it afterwards.
This would be more efficient to do this the other way around i.e.
relocate the compressed data up front instead, resulting in a smaller
copy. That also has the advantage of making the code smaller and more
straight forward.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PTRACE_SINGLESTEP is a ptrace request designed to offer single-stepping
support to userspace when the underlying architecture has hardware
support for this operation.
On ARM, we set arch_has_single_step() to 1 and attempt to emulate hardware
single-stepping by disassembling the current instruction to determine the
next pc and placing a software breakpoint on that location.
Unfortunately this has the following problems:
1.) Only a subset of ARMv7 instructions are supported
2.) Thumb-2 is unsupported
3.) The code is not SMP safe
We could try to fix this code, but it turns out that because of the above
issues it is rarely used in practice. GDB, for example, uses PTRACE_POKETEXT
and PTRACE_PEEKTEXT to manage breakpoints itself and does not require any
kernel assistance.
This patch removes the single-step emulation code from ptrace meaning that
the PTRACE_SINGLESTEP request will return -EIO on ARM. Portable code must
check the return value from a ptrace call and handle the failure gracefully.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move L1_CACHE_SHIFT related options together, rather than spreading them
across two separate Kconfig files.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Some installers would binary patch the kernel zImage to replace the
first few nops with custom instructions. This breaks the Thumb2 kernel
as the mode switch is right at the beginning. Let's move it towards the
end of the nop sequence instead.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Improve the documentation for the VFP hotplug notifier handler, so
that people better understand what's going on there and what has
been done for them.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In commit e616c59140, highmem support was
deactivated for SMP platforms without hardware TLB ops broadcast because
usage of kmap_high_get() requires that IRQs be disabled when kmap_lock
is locked which is incompatible with the IPI mechanism used by the
software TLB ops broadcast invoked through flush_all_zero_pkmaps().
The reason for kmap_high_get() is to ensure that the currently kmap'd
page usage count does not decrease to zero while we're using its
existing virtual mapping in an atomic context. With a VIVT cache this
is essential to do due to cache coherency issues, but with a VIPT cache
this is only an optimization so not to pay the price of establishing a
second mapping if an existing one can be used. However, on VIPT
platforms without hardware TLB maintenance we can give up on that
optimization in order to be able to use highmem.
From ARMv7 onwards the TLB ops are broadcasted in hardware, so let's
disable ARCH_NEEDS_KMAP_HIGH_GET only when CONFIG_SMP and
CONFIG_CPU_TLB_V6 are defined.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Saeed Bishara <saeed.bishara@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This cleans up after the conversion to irq_data. Rename the function
to match the method, and remove the now useless lookup of the irq
descriptor which is never used. Move the bitmask calculation out of
the irq_controller_lock region.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ensure appropriate locks are taken to ensure that IRQ migration off
the current CPU is race-free. We may have a concurrent set_affinity
via procfs running on another CPU in parallel with the IRQ migration,
resulting in unpredictable results.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The force argument to irq_set_affinity really should be 'true' as
moving IRQs off a CPU which is going down isn't optional.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a missing call to pci_enable_bridges() so that devices behind
bridges get found by the pci bus scan.
Signed-off-by: Chris Partington <chris.partington@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Current diagnostics are rather poor when things go wrong:
ipv6: relocation out of range, section 2 reloc 0 sym 'snmp_mib_free'
Let's include a little more information about the problem:
ipv6: section 2 reloc 0 sym 'snmp_mib_free': relocation 28 out of range (0xbf0000a4 -> 0xc11b4858)
so that we show exactly what the problem is - not only what type of
relocation but also the offending address range too.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We have 'install' and 'zinstall' for installing Image and zImage
kernels, so add 'uinstall' to complete the set.
This allows developers to have a ~/bin/installkernel script which (eg)
copies the kernel to the tftp server automatically once the kernel
has built, resulting in a better workflow.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/return_address.c:37:6: warning: symbol 'return_address' was not declared. Should it be static?
arch/arm/kernel/setup.c:76:14: warning: symbol 'processor_id' was not declared. Should it be static?
arch/arm/kernel/traps.c:259:1: warning: symbol 'die_lock' was not declared. Should it be static?
arch/arm/vfp/vfpmodule.c:156:6: warning: symbol 'vfp_raise_sigfpe' was not declared. Should it be static?
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Achieve better usage of the DMA coherent region by doing top-down
allocation rather than bottom up. If we ask for a 128kB allocation,
this will be aligned to 128kB and satisfied from the very bottom
address. If we then ask for a 600kB allocation, this will be aligned
to 1MB, and we will have a 896kB hole.
Performing top-down allocation resolves this by allocating the 128kB
at the very top, and then the 600kB can come in below it without any
unnecessary wastage.
This problem was reported by Janusz Krzysztofik, who had 2 x 128kB +
1 x 640kB allocations which wouldn't fit into 1MB.
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make Primecell driver probe functions take a const pointer to their
ID tables. Drivers should never modify their ID tables in their
probe handler.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit
06824ba (ARM: tlb: delay page freeing for SMP and ARMv7 CPUs)
introduced a build failure for builds with CONFIG_SWAP=n:
In file included from arch/arm/mm/init.c:27:
arch/arm/include/asm/tlb.h: In function 'tlb_flush_mmu':
arch/arm/include/asm/tlb.h:101: error: implicit declaration of function 'release_pages'
arch/arm/include/asm/tlb.h: In function 'tlb_remove_page':
arch/arm/include/asm/tlb.h:165: error: implicit declaration of function 'page_cache_release'
as linux/swap.h doesn't include linux/pagemap.h but actually needs it
(see comments in linux/swap.h as to why this is.)
Fix that by #including <linux/pagemap.h> in <asm/pgalloc.h> as it's done
by x86.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon