Add register definitions required to configure the USB Phy. The definitions
for PHYCTRL, PHYPWR, URSTCON and UCLKCON registers and corresponding bit
field definitions are added.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Define maps for HSMMC devices.
S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.
So suppose that S3C2443 has only HSMMC1.
Define clock for hsmmc0 device and register it.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adds suspend-to-ram support for SMDK2416 based on existing 2412 PM code
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fix the definition of the LCD clock bit, it is the TFT display
controller on bit 9, not the older STN on bit 10.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move more of the core clocks that where left over from the last commit
as they are much more core to the system operation. This should allow
for easier tracking of any problems.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C2443 clock code could easily make use of the clksrc implementation
in plat-samsung for many of the clocks. Make the clocks that easily move
to clksrc-clk over, update any initialisation and remove the old register
definitions from the header file (it is only being used once).
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the S3C2443 clock register definitions for selecting the EPLL
reference clock described by S3C2443_CLKSRC_EPLLREF.
Signed-off-by: Wei Shuai <cpuwolf@gmail.com>
[ben-linux@fluff.org: minor description fixes]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Thomas Abraham