This contains a pinctrl implementation for the pad configuration that
can be controlled from the PMC.
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Merge tag 'tegra-for-4.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.20-rc1
This contains a pinctrl implementation for the pad configuration that
can be controlled from the PMC.
* tag 'tegra-for-4.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Implement pad configuration via pinctrl
soc/tegra: pmc: Remove public pad voltage APIs
soc/tegra: pmc: Use X macro to generate IO pad tables
soc/tegra: pmc: Implement tegra_io_pad_is_powered()
soc/tegra: pmc: Factor out DPD register bit calculation
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
soc/tegra: pmc: Fix child-node lookup
dt-bindings: Add Tegra PMC pad configuration bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a couple of new APIs to check the probing status of qman and bman:
'int bman_is_probed()' and 'int qman_is_probed()'.
They return the following values.
* 1 if qman/bman were probed correctly
* 0 if qman/bman were not yet probed
* -1 if probing of qman/bman failed
Drivers that use qman/bman driver services are required to use these
APIs before calling any functions exported by qman or bman drivers
or otherwise they will crash the kernel.
The APIs will be used in the following couple of qbman portal patches
and later in the series in the dpaa1 ethernet driver.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
There is a copy and paste bug so we accidentally use the RX_ shift when
we're in TX_ mode.
Fixes: bb8b2062af ("fsl/qe: setup clock source for TDM mode")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
(cherry picked from commit 3cb31b634052ed458922e0c8e2b4b093d7fb60b9)
Signed-off-by: Olof Johansson <olof@lixom.net>
If the qman driver didn't probe, calling qman_alloc_fqid_range,
qman_alloc_pool_range or qman_alloc_cgrid_range (as done in dpaa_eth) will
pass a NULL pointer to gen_pool_alloc, leading to a NULL pointer
dereference.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
(cherry picked from commit f72487a2788aa70c3aee1d0ebd5470de9bac953a)
Signed-off-by: Olof Johansson <olof@lixom.net>
MT6357 is a new power management IC and it is used for mt6765 SoCs.
To define mt6357_regs for pmic register mapping and pmic_mt6357
for accessing register.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
mt6765 is a highly integrated SoCs, it uses mt6357 for power management.
This patch adds pwrap driver to access mt6357. Pwrap of mt6765 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
[mb: change has_bridge to capabilities]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Return statements in functions returning bool should use true or false
instead of an integer value.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT6358 is a new power management IC and it is used for
mt8183 SoCs. To define mt6358_regs for pmic register
mapping and pmic_mt6358 for accessing register.
Adding one more interrupt and wdt source.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use group of bits for pwrap capability instead of
elements of structure.
This patch is preparing for adding mt8183 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Order SoC and PMIC numbers ascending to make the code more
readable.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Trivial fix to spelling mistake in dev_err messages and comments
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The geni_se_clk_freq_match() has some strange semantics. Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. It can find a non-exact match but it can't handle multiples then
...but callers should always be able to handle a clock that is a
multiple of the requested clock so mode #2 doesn't really make sense.
Let's change the semantics so that the non-exact match can also accept
multiples and then change the code to handle that.
The only caller of this code is the unlanded SPI driver [1] which
currently passes "exact = True", thus it should be safe to change the
semantics in this way. ...and, in fact, the SPI driver should likely
be modified to pass "exact = False" (with the new semantics) since
that will allow it to work with SPI devices that request a clock rate
that doesn't exactly match a rate we can make.
[1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The function clk_round_rate() is defined to return a "long", not an
"unsigned long". That's because it might return a negative error
code. Change the call in geni_se_clk_tbl_get() to check for errors.
While we're at it, get rid of a useless init of "freq".
NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a table already present in the clock driver is
questionable. Specifically:
- This method relies on "clk_round_rate()" rounding up.
- This method only works if the table is sorted and has no duplicates.
...this patch doesn't try to fix those problems, it just makes the
error handling more correct.
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Commit 3ad85b08f7 (soc: actions: sps: Add S700)
added S700 support to the SPS driver but forget to update Kconfig help.
Add missing S700 mention, in preparation for further SoCs.
Fixes: 3ad85b08f7 ("soc: actions: sps: Add S700")
Reported-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Replace textual license notices with SPDX-License-Identifier lines.
Add an SPDX-License-Identifier for the Makefile.
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit adds back functions removed in
commit a211c8170b ("staging: fsl-mc/dpio: remove couple of unused functions")
since dpseci object will make use of them.
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add support for RZ/G1N (R8A7744) SoC power areas to the R-Car SYSC driver.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for the RZ/G2E (R8A774C0) SoC power areas to the
R-Car SYSC driver.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch contains several small cleanups:
- In qcom_smem_enumerate_partitions(), change the "local_host"
argument to have 16 bit unsigned type
- Also in qcom_smem_enumerate_partitions(), change the type of
the "host0" and "host1" local variables to be u16
- Fix error messages reporting host ids to use the right format
specifier
- Shorten the error messages as well, to fit on one line
- Add a compile-time check to ensure the local host value passed
to qcom_smem_enumerate_partitions() is in range
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add verification in qcom_smem_partition_header() that the host ids
found in a partition's header structure match those in its partition
table entry.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Change the logic in the loop that finds that global host entry in
the partition table not require the host0 and host1 local variables.
The next patch will remove them.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add verification in qcom_smem_partition_header() that the
offset_free_uncached field in a partition's header structure does
not exceed the partition's size.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add verification in qcom_smem_partition_header() that the size in a
partition's header structure matches the size in its partition table
entry.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Create a new function qcom_smem_partition_header() to encapsulate
validating locating a partition header and validating information
found within it. This will be built up over a few commits to make
it more obvious how the common function is replacing duplicated code
elsewhere. Initially it just verifies the header has the right
magic number.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In qcom_smem_enumerate_partitions(), we find all partitions that
have a given local host id in either its host0 or its host1 field
in the partition table entry. We then verify that the header
structure at the start of each partition also contains the same two
host ids as is found in the table of contents.
There is no requirement that the order of the two host ids be the
same in the table of contents and in the partition header.
This patch changes that, requiring host0 to in the partition table
entry to equal host0 in the partition header structure (and similar
for the host1 values).
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The global partition is indicated by having both host values in its
table of contents entry equal SMEM_GLOBAL_HOST=0xfffe.
In qcom_smem_set_global_partition(), we check whether the header
structure at the beginning of the partition contains that host
value, but the check only verifies *one* of them. Change the check
so the partition header must have SMEM_GLOBAL_HOST for *both* its
host fields.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Combine the code that checks whether a partition table entry is
associated with the local host with the assignment of the remote
host id value.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In qcom_smem_enumerate_partitions(), any partition table entry
having a zero offset or size field is ignored. Move those checks
earlier in the loop, because there's no sense in examining the
host fields for those entries.
Add the same checks in qcom_smem_set_global_partition(), so the
scan for the global partition skips over these invalid entries.
This allows a later check for zero size or offset once the global
entry is found to be eliminated.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Hold off initializing anything for the array entry representing a
memory region in qcom_smem_map_memory() until we know we've
successfully mapped it.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Rename the variable "area" to be "region" in qcom_smem_get_global(),
so its name better matches its type.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The wait_for_compl register ensures the request sequence is maintained
when sending requests from the TCS. Clear the register after sending
active request and during invalidate of the sleep and wake TCS.
Reported-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The scm device must be present in order for the rmtfs driver to
configure memory permissions for the rmtfs memory region, so check that
it is probed before continuing.
Cc: stable@vger.kernel.org
Fixes: fa65f80451 ("soc: qcom: rmtfs-mem: Add support for assigning memory to remote")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Check for SCM availability before attempting to use SPM. SPM probe will
fail otherwise.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since commit cab673583d ("soc: Unconditionally include qcom Makefile"),
we unconditionally include the soc/qcom/Makefile.
This opens up the possibility to compile test the code even when building
for other architectures.
Allow COMPILE_TEST for all qcom SoC Kconfigs, except for two Kconfigs
that depend on QCOM_SCM, since that triggers lots of build errors in
qcom_scm.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
'adev->name' is used as a NUL-terminated string, but using strncpy() with the
length equal to the buffer size may result in lack of the termination:
In function 'apr_add_device',
inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7,
inlined from 'apr_probe' at drivers//soc/qcom/apr.c:290:2:
drivers//soc/qcom/apr.c:222:3: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation]
strncpy(adev->name, np->name, APR_NAME_SIZE);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This changes it to use the safer strscpy() instead.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
'chinfo.name' is used as a NUL-terminated string, but using strncpy() with
the length equal to the buffer size may result in lack of the termination:
drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel':
drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation]
strncpy(chinfo.name, name, sizeof(chinfo.name));
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This changes it to use the safer strscpy() instead.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
QCOM_RPHM already selects ARM64, which always selects OF.
Additionally, the rpmh driver only uses linux/of.h, which has dummy
definitions for all functions, in order for code to to be able to
build without CONFIG_OF set.
Remove the superfluous depends on OF.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.
drivers/soc/qcom/smsm.c: In function ‘smsm_inbound_entry’:
drivers/soc/qcom/smsm.c:411:18: error: implicit declaration of function
‘irq_domain_add_linear’
entry->domain = irq_domain_add_linear(node, 32, &smsm_irq_ops, entry);
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.
drivers/soc/qcom/smp2p.c: In function ‘qcom_smp2p_inbound_entry’:
drivers/soc/qcom/smp2p.c:317:18: error: implicit declaration of function
‘irq_domain_add_linear’
entry->domain = irq_domain_add_linear(node, 32, &smp2p_irq_ops, entry);
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Trivial fix to spelling mistake in dev_err message text
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The geni_se_clk_freq_match() has some strange semantics. Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. It can find a non-exact match but it can't handle multiples then
...but callers should always be able to handle a clock that is a
multiple of the requested clock so mode #2 doesn't really make sense.
Let's change the semantics so that the non-exact match can also accept
multiples and then change the code to handle that.
The only caller of this code is the unlanded SPI driver [1] which
currently passes "exact = True", thus it should be safe to change the
semantics in this way. ...and, in fact, the SPI driver should likely
be modified to pass "exact = False" (with the new semantics) since
that will allow it to work with SPI devices that request a clock rate
that doesn't exactly match a rate we can make.
[1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The function clk_round_rate() is defined to return a "long", not an
"unsigned long". That's because it might return a negative error
code. Change the call in geni_se_clk_tbl_get() to check for errors.
While we're at it, get rid of a useless init of "freq".
NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a table already present in the clock driver is
questionable. Specifically:
- This method relies on "clk_round_rate()" rounding up.
- This method only works if the table is sorted and has no duplicates.
...this patch doesn't try to fix those problems, it just makes the
error handling more correct.
Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Cache error reporting controller detects and reports single and
double bit errors on Last Level Cache Controller (LLCC) cache.
Add required support to register LLCC EDAC driver as platform driver,
from LLCC driver.
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently, broadcast base is set to end of the LLCC banks, which may
not be correct always. As the number of banks may vary for each chipset
and the broadcast base could be at a different address as well. This info
depends on the chipset, so get the broadcast base info from the device
tree (DT). Add broadcast base in LLCC driver and use this for broadcast
writes.
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Amlogic SoCs have a repository of 256 canvas which they use to
describe pixel buffers.
They contain metadata like width, height, block mode, endianness [..]
Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
pixels.
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This makes it possible to build the sunxi SRAM driver without building
for the sunxi architecture. This allows selecting the driver when
building the kernel in testing environments.
In particular, this is necessary for testing of the Cedrus driver, that
selects the sunxi SRAM driver.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Add support for identifying the RZ/G2E (r8a774c0) SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for RZ/G2M (R8A774A1) SoC power areas to the R-Car SYSC
driver.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
imx6_pm_domain_power_off() reads iso and iso2sw from GPC_PGC_PUPSCR_OFFS
which stores the power up delays.
So use GPC_PGC_PDNSCR_OFFS for the correct delays.
Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pointer 'priv' is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
variable 'priv' set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use the of_get_child_by_name() helper instead of open coding searching
for the 'firmware' child node. This removes directly accessing the name
pointer as well.
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Add support for identifying the RZ/A2M (R7S9210) SoC.
Also add support for reading the BSID register which is a different format
than the PRR.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds support for identifying the RZ/G2M (r8a774a1) SoC.
It corrects the original RZ/G SoC family name to RZ/G1 and also
adds support for the new RZ/G2 SoC family.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Make tegra_io_pad_set_voltage() and tegra_io_pad_get_voltage() static
and remove the prototypes from pmc.h. Remove enum tegra_io_pad_voltage
and use the defines from <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
instead.
These functions aren't used outside of the pmc driver and new use cases
should use the pinctrl interface instead.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Implement a function to query whether a pad is in deep power down mode.
This is needed by the pinctrl callbacks.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.
To make things worse, the parent pmc node could end up being prematurely
freed as of_find_node_by_name() drops a reference to its first argument.
Fixes: 3568df3d31 ("soc: tegra: Add thermal reset (thermtrip) support to PMC")
Cc: stable <stable@vger.kernel.org> # 4.0
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Business as usual -- the bulk of our changes are to devicetree files
with new hardware support, new SoCs and platforms, and new board types.
New SoCs/platforms:
- Raspberry Pi Compute Module (CM1) and IO board
- i.MX6SSL from NXP
- Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN and
PLC interfaces
- TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
controllers, communication and PRU subsystem and lots of other
interfaces (PCIe, USB3, etc).
New boards and systems:
- Several Atmel at91-based boards from Laird
- Marvell Armada388-based Helios4 board from SolidRun
- Samsung Aires-based phones (s5pv210)
- Allwinner A64-based Pinebook laptop
In addition to the above, there's the usual amount of new devices
described on existing platforms, fixes and tweaks and new minor variants
of boards/platforms.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Olof Johansson:
"Business as usual -- the bulk of our changes are to devicetree files
with new hardware support, new SoCs and platforms, and new board
types.
New SoCs/platforms:
- Raspberry Pi Compute Module (CM1) and IO board
- i.MX6SSL from NXP
- Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN
and PLC interfaces
- TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
controllers, communication and PRU subsystem and lots of other
interfaces (PCIe, USB3, etc).
New boards and systems:
- Several Atmel at91-based boards from Laird
- Marvell Armada388-based Helios4 board from SolidRun
- Samsung Aires-based phones (s5pv210)
- Allwinner A64-based Pinebook laptop
In addition to the above, there's the usual amount of new devices
described on existing platforms, fixes and tweaks and new minor
variants of boards/platforms"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (478 commits)
arm64: dts: sdm845: Add tsens nodes
arm64: dts: msm8996: thermal: Initialise via DT and add second controller
arm64: dts: sprd: Add one suspend timer
arm64: dts: sprd: Add SC27XX ADC device
arm64: dts: sprd: Add SC27XX eFuse device
arm64: dts: sprd: Add SC27XX vibrator device
arm64: dts: sprd: Add SC27XX breathing light controller device
arm64: dts: meson-axg: add spdif-dit codec
arm64: dts: meson-axg: add lineout codec
arm64: dts: meson-axg: add linein codec
arm64: dts: meson-axg: add tdm interfaces
arm64: dts: meson-axg: add tdmout formatters
arm64: dts: meson-axg: add tdmin formatters
arm64: dts: meson-axg: add spdifout
arm64: dts: rockchip: add led support for Firefly-RK3399
arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399
arm64: dts: rockchip: add power button support for Firefly-RK3399
ARM: dts: aspeed: Add coprocessor interrupt controller
arm64: dts: meson-axg: add audio arb reset controller
arm64: dts: meson-axg: add usb power regulator
...
Some of the larger changes this merge window:
- Removal of drivers for Exynos5440, a Samsung SoC that never saw
widespread use.
- Uniphier support for USB3 and SPI reset handling
- Syste control and SRAM drivers and bindings for Allwinner platforms
- Qualcomm AOSS (Always-on subsystem) reset controller drivers
- Raspberry Pi hwmon driver for voltage
- Mediatek pwrap (pmic) support for MT6797 SoC
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Some of the larger changes this merge window:
- Removal of drivers for Exynos5440, a Samsung SoC that never saw
widespread use.
- Uniphier support for USB3 and SPI reset handling
- Syste control and SRAM drivers and bindings for Allwinner platforms
- Qualcomm AOSS (Always-on subsystem) reset controller drivers
- Raspberry Pi hwmon driver for voltage
- Mediatek pwrap (pmic) support for MT6797 SoC"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (52 commits)
drivers/firmware: psci_checker: stash and use topology_core_cpumask for hotplug tests
soc: fsl: cleanup Kconfig menu
soc: fsl: dpio: Convert DPIO documentation to .rst
staging: fsl-mc: Remove remaining files
staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
staging: fsl-dpaa2: eth: move generic FD defines to DPIO
soc: fsl: qe: gpio: Add qe_gpio_set_multiple
usb: host: exynos: Remove support for Exynos5440
clk: samsung: Remove support for Exynos5440
soc: sunxi: Add the A13, A23 and H3 system control compatibles
reset: uniphier: add reset control support for SPI
cpufreq: exynos: Remove support for Exynos5440
ata: ahci-platform: Remove support for Exynos5440
soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
soc: mediatek: pwrap: add mt6351 driver for mt6797 SoCs
soc: mediatek: pwrap: add pwrap driver for mt6797 SoCs
soc: mediatek: pwrap: fix cipher init setting error
dt-bindings: pwrap: mediatek: add pwrap support for MT6797
reset: uniphier: add USB3 core reset control
dt-bindings: reset: uniphier: add USB3 core reset support
...
Most of the SoC updates in this cycle are cleanups and moves to more
modern infrastructure:
- Davinci was moved to common clock framework
- OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
keyboard interface (bitbanged AT keyboard via GPIO).
- Removal of some stale code for Renesas platforms
- Power management improvements for i.MX6LL
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 32-bit SoC platform updates from Olof Johansson:
"Most of the SoC updates in this cycle are cleanups and moves to more
modern infrastructure:
- Davinci was moved to common clock framework
- OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
keyboard interface (bitbanged AT keyboard via GPIO).
- Removal of some stale code for Renesas platforms
- Power management improvements for i.MX6LL"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits)
ARM: uniphier: select RESET_CONTROLLER
arm64: uniphier: select RESET_CONTROLLER
ARM: uniphier: remove empty Makefile
ARM: exynos: Clear global variable on init error path
ARM: exynos: Remove outdated maintainer information
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
soc: r9a06g032: don't build SMP files for non-SMP config
ARM: shmobile: Add the R9A06G032 SMP enabler driver
ARM: at91: pm: configure wakeup sources for ULP1 mode
ARM: at91: pm: add PMC fast startup registers defines
ARM: at91: pm: Add ULP1 mode support
ARM: at91: pm: Use ULP0 naming instead of slow clock
ARM: hisi: handle of_iomap and fix missing of_node_put
ARM: hisi: check of_iomap and fix missing of_node_put
ARM: hisi: fix error handling and missing of_node_put
ARM: mx5: Set the DBGEN bit in ARM_GPC register
ARM: imx51: Configure M4IF to avoid visual artifacts
ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
ARM: imx: fix i.MX6SLL build
...
This adds support for pre-start and post-shutdown hooks for remoteproc
subdevices, refactors the Qualcomm Hexagon support to allow reuse
between several drivers, makes authentication in the MDT file loader
optional, migrates a few format strings to use %pK and migrates the
Davinci driver to use the reset framework.
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Merge tag 'rproc-v4.19' of git://github.com/andersson/remoteproc
Pull remoteproc updates from Bjorn Andersson:
"This adds support for pre-start and post-shutdown hooks for remoteproc
subdevices, refactors the Qualcomm Hexagon support to allow reuse
between several drivers, makes authentication in the MDT file loader
optional, migrates a few format strings to use %pK and migrates the
Davinci driver to use the reset framework"
* tag 'rproc-v4.19' of git://github.com/andersson/remoteproc:
remoteproc/davinci: use the reset framework
remoteproc/davinci: Mark error recovery as disabled
remoteproc: st_slim: replace "%p" with "%pK"
remoteproc: replace "%p" with "%pK"
remoteproc: qcom: fix Q6V5_WCSS dependencies
remoteproc: Reset table_ptr in rproc_start() failure paths
remoteproc: qcom: q6v5-pil: fix modem hang on SDM845 after axis2 clk unvote
remoteproc: qcom q6v5: fix modular build
remoteproc: Introduce prepare and unprepare for subdevices
remoteproc: rename subdev probe and remove functions
remoteproc: Make client initialize ops in rproc_subdev
remoteproc: Make start and stop in subdev optional
remoteproc: Rename subdev functions to start/stop
remoteproc: qcom: Introduce Hexagon V5 based WCSS driver
remoteproc: qcom: q6v5-pil: Use common q6v5 helpers
remoteproc: qcom: adsp: Use common q6v5 helpers
remoteproc: q6v5: Extract common resource handling
remoteproc: qcom: mdt_loader: Make the firmware authentication optional
- Add a new framework for CPU idle time injection (Daniel Lezcano).
- Add AVS support to the armada-37xx cpufreq driver (Gregory CLEMENT).
- Add support for current CPU frequency reporting to the ACPI CPPC
cpufreq driver (George Cherian).
- Rework the cooling device registration in the imx6q/thermal
driver (Bastian Stender).
- Make the pcc-cpufreq driver refuse to work with dynamic
scaling governors on systems with many CPUs to avoid
scalability issues with it (Rafael Wysocki).
- Fix the intel_pstate driver to report different maximum CPU
frequencies on systems where they really are different and to
ignore the turbo active ratio if hardware-managend P-states (HWP)
are in use; make it use the match_string() helper (Xie Yisheng,
Srinivas Pandruvada).
- Fix a minor deferred probe issue in the qcom-kryo cpufreq
driver (Niklas Cassel).
- Add a tracepoint for the tracking of frequency limits changes
(from Andriod) to the cpufreq core (Ruchi Kandoi).
- Fix a circular lock dependency between CPU hotplug and sysfs
locking in the cpufreq core reported by lockdep (Waiman Long).
- Avoid excessive error reports on driver registration failures
in the ARM cpuidle driver (Sudeep Holla).
- Add a new device links flag to the driver core to make links go
away automatically on supplier driver removal (Vivek Gautam).
- Eliminate potential race condition between system-wide power
management transitions and system shutdown (Pingfan Liu).
- Add a quirk to save NVS memory on system suspend for the ASUS
1025C laptop (Willy Tarreau).
- Make more systems use suspend-to-idle (instead of ACPI S3) by
default (Tristian Celestin).
- Get rid of stack VLA usage in the low-level hibernation code on
64-bit x86 (Kees Cook).
- Fix error handling in the hibernation core and mark an expected
fall-through switch in it (Chengguang Xu, Gustavo Silva).
- Extend the generic power domains (genpd) framework to support
attaching a device to a power domain by name (Ulf Hansson).
- Fix device reference counting and user limits initialization in
the devfreq core (Arvind Yadav, Matthias Kaehlcke).
- Fix a few issues in the rk3399_dmc devfreq driver and improve its
documentation (Enric Balletbo i Serra, Lin Huang, Nick Milner).
- Drop a redundant error message from the exynos-ppmu devfreq driver
(Markus Elfring).
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Merge tag 'pm-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki:
"These add a new framework for CPU idle time injection, to be used by
all of the idle injection code in the kernel in the future, fix some
issues and add a number of relatively small extensions in multiple
places.
Specifics:
- Add a new framework for CPU idle time injection (Daniel Lezcano).
- Add AVS support to the armada-37xx cpufreq driver (Gregory
CLEMENT).
- Add support for current CPU frequency reporting to the ACPI CPPC
cpufreq driver (George Cherian).
- Rework the cooling device registration in the imx6q/thermal driver
(Bastian Stender).
- Make the pcc-cpufreq driver refuse to work with dynamic scaling
governors on systems with many CPUs to avoid scalability issues
with it (Rafael Wysocki).
- Fix the intel_pstate driver to report different maximum CPU
frequencies on systems where they really are different and to
ignore the turbo active ratio if hardware-managend P-states (HWP)
are in use; make it use the match_string() helper (Xie Yisheng,
Srinivas Pandruvada).
- Fix a minor deferred probe issue in the qcom-kryo cpufreq driver
(Niklas Cassel).
- Add a tracepoint for the tracking of frequency limits changes (from
Andriod) to the cpufreq core (Ruchi Kandoi).
- Fix a circular lock dependency between CPU hotplug and sysfs
locking in the cpufreq core reported by lockdep (Waiman Long).
- Avoid excessive error reports on driver registration failures in
the ARM cpuidle driver (Sudeep Holla).
- Add a new device links flag to the driver core to make links go
away automatically on supplier driver removal (Vivek Gautam).
- Eliminate potential race condition between system-wide power
management transitions and system shutdown (Pingfan Liu).
- Add a quirk to save NVS memory on system suspend for the ASUS 1025C
laptop (Willy Tarreau).
- Make more systems use suspend-to-idle (instead of ACPI S3) by
default (Tristian Celestin).
- Get rid of stack VLA usage in the low-level hibernation code on
64-bit x86 (Kees Cook).
- Fix error handling in the hibernation core and mark an expected
fall-through switch in it (Chengguang Xu, Gustavo Silva).
- Extend the generic power domains (genpd) framework to support
attaching a device to a power domain by name (Ulf Hansson).
- Fix device reference counting and user limits initialization in the
devfreq core (Arvind Yadav, Matthias Kaehlcke).
- Fix a few issues in the rk3399_dmc devfreq driver and improve its
documentation (Enric Balletbo i Serra, Lin Huang, Nick Milner).
- Drop a redundant error message from the exynos-ppmu devfreq driver
(Markus Elfring)"
* tag 'pm-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (35 commits)
PM / reboot: Eliminate race between reboot and suspend
PM / hibernate: Mark expected switch fall-through
cpufreq: intel_pstate: Ignore turbo active ratio in HWP
cpufreq: Fix a circular lock dependency problem
cpu/hotplug: Add a cpus_read_trylock() function
x86/power/hibernate_64: Remove VLA usage
cpufreq: trace frequency limits change
cpufreq: intel_pstate: Show different max frequency with turbo 3 and HWP
cpufreq: pcc-cpufreq: Disable dynamic scaling on many-CPU systems
cpufreq: qcom-kryo: Silently error out on EPROBE_DEFER
cpufreq / CPPC: Add cpuinfo_cur_freq support for CPPC
cpufreq: armada-37xx: Add AVS support
dt-bindings: marvell: Add documentation for the Armada 3700 AVS binding
PM / devfreq: rk3399_dmc: Fix duplicated opp table on reload.
PM / devfreq: Init user limits from OPP limits, not viceversa
PM / devfreq: rk3399_dmc: fix spelling mistakes.
PM / devfreq: rk3399_dmc: do not print error when get supply and clk defer.
dt-bindings: devfreq: rk3399_dmc: move interrupts to be optional.
PM / devfreq: rk3399_dmc: remove wait for dcf irq event.
dt-bindings: clock: add rk3399 DDR3 standard speed bins.
...
Merge changes in the PM core, system-wide PM infrastructure, generic
power domains (genpd) framework, ACPI PM infrastructure and cpuidle
for 4.19.
* pm-core:
driver core: Add flag to autoremove device link on supplier unbind
driver core: Rename flag AUTOREMOVE to AUTOREMOVE_CONSUMER
* pm-domains:
PM / Domains: Introduce dev_pm_domain_attach_by_name()
PM / Domains: Introduce option to attach a device by name to genpd
PM / Domains: dt: Add a power-domain-names property
* pm-sleep:
PM / reboot: Eliminate race between reboot and suspend
PM / hibernate: Mark expected switch fall-through
x86/power/hibernate_64: Remove VLA usage
PM / hibernate: cast PAGE_SIZE to int when comparing with error code
* acpi-pm:
ACPI / PM: save NVS memory for ASUS 1025C laptop
ACPI / PM: Default to s2idle in all machines supporting LP S0
* pm-cpuidle:
ARM: cpuidle: silence error on driver registration failure
Moves DPAA2 DPIO driver from staging to fsl/soc
Adds multiple-pin support to QE gpio driver
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Merge tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers
Various updates to soc/fsl for 4.19
Moves DPAA2 DPIO driver from staging to fsl/soc
Adds multiple-pin support to QE gpio driver
* tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: cleanup Kconfig menu
soc: fsl: dpio: Convert DPIO documentation to .rst
staging: fsl-mc: Remove remaining files
staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
staging: fsl-dpaa2: eth: move generic FD defines to DPIO
soc: fsl: qe: gpio: Add qe_gpio_set_multiple
Signed-off-by: Olof Johansson <olof@lixom.net>
There's been work for this release cycles in both the SRAM controller
driver in order to support more SoCs, as part of our VPU work, but also to
enable the EMAC on the A64 (that needs to poke at registers within the same
register space).
Some work has been needed too to represent the bus to the display engine
controllers that all need an SRAM to be mapped to the CPU to be able to
access those controllers' registers.
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Merge tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers
Allwinner drivers changes for 4.19
There's been work for this release cycles in both the SRAM controller
driver in order to support more SoCs, as part of our VPU work, but also to
enable the EMAC on the A64 (that needs to poke at registers within the same
register space).
Some work has been needed too to represent the bus to the display engine
controllers that all need an SRAM to be mapped to the CPU to be able to
access those controllers' registers.
* tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
soc: sunxi: Add the A13, A23 and H3 system control compatibles
drivers: soc: sunxi: Add support for the C1 SRAM region
dt-bindings: sram: sunxi: Populate valid sections compatibles
dt-bindings: sram: sunxi: Add A13, A20, A23 and H3 dedicated bindings
soc: sunxi: sram: Add dt match for the A10 system-control compatible
dt-bindings: sram: sunxi: Introduce new A10 binding for system-control
bus: add bus driver for accessing Allwinner A64 DE2
dt-bindings: add binding for the Allwinner A64 DE2 bus
soc: sunxi: sram: Add updated compatible string for A64 system control
dt-bindings: sram: Rename A64 SRAM controller compatible
soc: sunxi: export a regmap for EMAC clock reg on A64
Signed-off-by: Olof Johansson <olof@lixom.net>
Convert the Datapath I/O documentation to .rst format
and move to the Documation/networking/dpaa2 directory
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Move the NXP DPIO (Datapath I/O Driver) out of the
drivers/staging directory and into the drivers/soc/fsl directory.
The DPIO driver enables access to Queue and Buffer Manager (QBMAN)
hardware on NXP DPAA2 devices. This is a prerequisite to moving the
DPAA2 Ethernet driver out of staging.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This cousin to gpio-mpc8xxx was lacking a multiple pins method,
add one.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
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Merge tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
TI AM654 support for v4.19 merge window
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
* tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm64: dts: ti: Add support for AM654 EVM base board
soc: ti: Add Support for AM654 SoC config option
arm64: dts: ti: Add Support for AM654 SoC
arm64: Add support for TI's K3 Multicore SoC architecture
dt-bindings: arm: ti: Add bindings for AM654 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- Handle i.MX6SL chip errata ERR006287 in the safest possible way by
keeping the DISP domain always-on, because Upon resuming from power
gating, the modules in the display power domain (eLCDIF, EPDC, PXP
and SPDC) might fail to perform register reads correctly.
- Use GENPD_FLAG_ALWAYS_ON flag for i.MX6QP PU ERR009619 handling.
It is functionally identical to the exsiting implementation but
simpler and slightly faster.
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Merge tag 'imx-drivers-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers update for 4.19:
- Handle i.MX6SL chip errata ERR006287 in the safest possible way by
keeping the DISP domain always-on, because Upon resuming from power
gating, the modules in the display power domain (eLCDIF, EPDC, PXP
and SPDC) might fail to perform register reads correctly.
- Use GENPD_FLAG_ALWAYS_ON flag for i.MX6QP PU ERR009619 handling.
It is functionally identical to the exsiting implementation but
simpler and slightly faster.
* tag 'imx-drivers-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
soc: imx: gpc: Disable 6sl display power gating for ERR006287
Signed-off-by: Olof Johansson <olof@lixom.net>
* Always enable ARCH_TIMER on SoCs with A7 or A15
All such SoCs have ARCH_TIMER so there is no need for it to be optional.
This allows clean-up which is included in this change.
* Do not compile r8a7779_platform_cpu_kill when it is unused
This avoids a warning by shuffling code into an existing #ifdef
r8a7779 is the R-Car H1 SoC
* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
This is to allow SMP to be enabled via DT on the r9a06g032
* Stop compiling headsmp-apmu for non-SMP configs
This is a minor clean-up allowing removal of an #ifdef
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Merge tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.19
* Always enable ARCH_TIMER on SoCs with A7 or A15
All such SoCs have ARCH_TIMER so there is no need for it to be optional.
This allows clean-up which is included in this change.
* Do not compile r8a7779_platform_cpu_kill when it is unused
This avoids a warning by shuffling code into an existing #ifdef
r8a7779 is the R-Car H1 SoC
* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
This is to allow SMP to be enabled via DT on the r9a06g032
* Stop compiling headsmp-apmu for non-SMP configs
This is a minor clean-up allowing removal of an #ifdef
* tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
soc: r9a06g032: don't build SMP files for non-SMP config
ARM: shmobile: Add the R9A06G032 SMP enabler driver
ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP
Signed-off-by: Olof Johansson <olof@lixom.net>
Make sure to set the mem device release callback before calling
put_device() in a couple of probe error paths so that the containing
object also gets freed.
Fixes: d1de6d6c63 ("soc: qcom: Remote filesystem memory driver")
Cc: stable <stable@vger.kernel.org> # 4.15
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add missing MODULE_LICENSE().
According to the SPDX-License-Identifier, the license is GPL v2.
Fixes the following warning:
WARNING: modpost: missing MODULE_LICENSE() in drivers/soc/qcom/llcc-slice.o
Fixes: a3134fb ("drivers: soc: Add LLCC driver")
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The patch fixes the bug reported by Dan Carpenter.
It removes the unnecessary err check for ‘tcs’ reported by
static checker warning:
drivers/soc/qcom/rpmh-rsc.c:111 tcs_invalidate()
warn: 'tcs' isn't an ERR_PTR
See also:
drivers/soc/qcom/rpmh-rsc.c:178 get_tcs_for_msg() warn: 'tcs' isn't
an ERR_PTR
drivers/soc/qcom/rpmh-rsc.c:180 get_tcs_for_msg() warn: 'tcs' isn't
an ERR_PTR
https://www.spinics.net/lists/linux-soc/msg04624.html
Fixes: 9a3afcf ("drivers: qcom: rpmh-rsc: allow invalidation
of sleep/wake TCS")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
get_req_from_tcs introduced in patch[1] returns tcs_request from
tcs_group. The size of tcs (of type - tcs_group) array in rsc_drv is
TCS_TYPE_NR. So the loop index needs to be iterated up to TCS_TYPE_NR only.
[1] https://patchwork.kernel.org/patch/10477547/
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Children of RPMh will need access to cmd_db. Rather than having each
child have code to check if cmd_db is ready let's add the check to
RPMh.
With this we'll be able to remove this boilerplate code from
clk-rpmh.c and qcom-rpmh-regulator.c. Neither of these files has
landed upstream yet but patches are pretty far along.
===
This code is based upon v11 of Lina and Raju's RPMh series.
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Some RSCs may only have sleep and wake TCS, i.e, there is no dedicated
TCS for active mode request, but drivers may still want to make active
requests from these RSCs. In such cases re-purpose the wake TCS to send
active state requests.
The requirement for this is that the driver is aware that the wake TCS
is being repurposed to send active request, hence the sleep and wake
TCSes be invalidated before the active request is sent.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Platform drivers need make a lot of resource state requests at the same
time, say, at the start or end of an usecase. It can be quite
inefficient to send each request separately. Instead they can give the
RPMH library a batch of requests to be sent and wait on the whole
transaction to be complete.
rpmh_write_batch() is a blocking call that can be used to send multiple
RPMH command sets. Each RPMH command set is set asynchronously and the
API blocks until all the command sets are complete and receive their
tx_done callbacks.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Platform drivers that want to send a request but do not want to block
until the RPMH request completes have now a new API -
rpmh_write_async().
The API allocates memory and send the requests and returns the control
back to the platform driver. The tx_done callback from the controller is
handled in the context of the controller's thread and frees the
allocated memory. This API allows RPMH requests from atomic contexts as
well.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Active state requests are sent immediately to the RSC controller, while
sleep and wake state requests are cached in this driver to avoid taxing
the RSC controller repeatedly. The cached values will be sent to the
controller when the rpmh_flush() is called.
Generally, flushing is a system PM activity and may be called from the
system PM drivers when the system is entering suspend or deeper sleep
modes during cpuidle.
Also allow invalidating the cached requests, so they may be re-populated
again.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
[rplsssn: remove unneeded semicolon, address line over 80chars error]
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Allow sleep and wake commands to be cleared from the respective TCSes,
so that they can be re-populated.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Sleep and wake requests are sent when the application processor
subsystem of the SoC is entering deep sleep states like in suspend.
These requests help lower the system power requirements when the
resources are not in use.
Sleep and wake requests are written to the TCS slots but are not
triggered at the time of writing. The TCS are triggered by the firmware
after the last of the CPUs has executed its WFI. Since these requests
may come in different batches of requests, it is the job of this
controller driver to find and arrange the requests into the available
TCSes.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Sending RPMH requests and waiting for response from the controller
through a callback is common functionality across all platform drivers.
To simplify drivers, add a library functions to create RPMH client and
send resource state requests.
rpmh_write() is a synchronous blocking call that can be used to send
active state requests.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Log sent RPMH requests and interrupt responses in FTRACE.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
[rplsssn@codeaurora.org: rebase to v4.18-rc1 & fix merge conflict]
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add controller driver for QCOM SoCs that have hardware based shared
resource management. The hardware IP known as RSC (Resource State
Coordinator) houses multiple Direct Resource Voter (DRV) for different
execution levels. A DRV is a unique voter on the state of a shared
resource. A Trigger Control Set (TCS) is a bunch of slots that can house
multiple resource state requests, that when triggered will issue those
requests through an internal bus to the Resource Power Manager Hardened
(RPMH) blocks. These hardware blocks are capable of adjusting clocks,
voltages, etc. The resource state request from a DRV are aggregated
along with state requests from other processors in the SoC and the
aggregate value is applied on the resource.
Some important aspects of the RPMH communication -
- Requests are <addr, value> with some header information
- Multiple requests (upto 16) may be sent through a TCS, at a time
- Requests in a TCS are sent in sequence
- Requests may be fire-n-forget or completion (response expected)
- Multiple TCS from the same DRV may be triggered simultaneously
- Cannot send a request if another request for the same addr is in
progress from the same DRV
- When all the requests from a TCS are complete, an IRQ is raised
- The IRQ handler needs to clear the TCS before it is available for
reuse
- TCS configuration is specific to a DRV
- Platform drivers may use DRV from different RSCs to make requests
Resource state requests made when CPUs are active are called 'active'
state requests. Requests made when all the CPUs are powered down (idle
state) are called 'sleep' state requests. They are matched by a
corresponding 'wake' state requests which puts the resources back in to
previously requested active state before resuming any CPU. TCSes are
dedicated for each type of requests. Active mode TCSes (AMC) are used to
send requests immediately to the resource, while control TCS are used to
provide specific information to the controller. Sleep and Wake TCS send
sleep and wake requests, after and before the system halt respectively.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
LLCC (Last Level Cache Controller) provides additional cache memory
in the system. LLCC is partitioned into multiple slices and each
slice gets its own priority, size, ID and other config parameters.
LLCC driver programs these parameters for each slice. Clients that
are assigned to use LLCC need to get information such size & ID of the
slice they get and activate or deactivate the slice as needed. LLCC driver
provides API for the clients to perform these operations.
Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org>
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The moved check for the global partition ended up in the wrong place and I
failed to spot this in my review. This moves it to the correct place.
Fixes: 11d2e7edac ("soc: qcom: smem: check sooner in qcom_smem_set_global_partition()")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Without CONFIG_SMP, we get a build failure:
In file included from include/linux/byteorder/little_endian.h:5,
from arch/arm/include/uapi/asm/byteorder.h:22,
from include/asm-generic/bitops/le.h:6,
from arch/arm/include/asm/bitops.h:342,
from include/linux/bitops.h:18,
from include/linux/kernel.h:11,
from include/asm-generic/bug.h:18,
from arch/arm/include/asm/bug.h:60,
from include/linux/bug.h:5,
from include/linux/io.h:23,
from drivers/soc/renesas/r9a06g032-smp.c:11:
drivers/soc/renesas/r9a06g032-smp.c: In function 'r9a06g032_smp_boot_secondary':
drivers/soc/renesas/r9a06g032-smp.c:43:21: error: 'secondary_startup' undeclared (first use in this function)
writel(__pa_symbol(secondary_startup), cpu_bootaddr);
^~~~~~~~~~~~~~~~~
This makes the compilation of that file conditional on SMP support.
It would probably be better for consistency to leave that file
in arch/arm/mach-shmobile/, matching what we do for all other smp
operations.
Fixes: cde4f86f9249 ("arm: shmobile: Add the R9A06G032 SMP enabler driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it
equires a special enable method to get it started.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Restrict GPC driver on register range that is accessible by regmap,
so that we can avoid user space from triggering imprecise external
abort exception.
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Merge tag 'imx-fixes-4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.18, round 3:
- Restrict GPC driver on register range that is accessible by regmap,
so that we can avoid user space from triggering imprecise external
abort exception.
* tag 'imx-fixes-4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: restrict register range for regmap access
Signed-off-by: Olof Johansson <olof@lixom.net>
The A13, A23 and H3 have variations of the system controls, in part due to
the SRAM that are available (and can be mapped) in the SoC.
In order to make it future proof, let's add compatibles for these SoCs in
the driver.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add option to build AM6 SoC specific components
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benjamin Fair <b-fair@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is functionally identical but simpler and slightly faster.
The PU domain is turned on at boot time and never turned off. In the
current implementation the pm core will repeatedly call power_off when
the domain is unused and get -EBUSY back. If the domain is marked as
"always on" instead the pm core won't even attempt to turn it off.
In theory on 6qp it is safe to turn PU off in suspend, however that is
best accomplished with a new core flag.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
MT6351 is a new power management IC and it is used for mt6797 SoCs. To define
mt6351_regs for pmic register mapping and pmic_mt6351 for
accessing register.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
mt6797 is a highly integrated SoCs, it uses mt6351 for power management.
This patch adds pwrap driver to access mt6351. Pwrap of mt6797 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.
A big change from V4 to V5 is we remove INT1 interrupt declaration since
it is only for debug purpose. The PWRAP_RDDMY, RESET and DCM can use legacy
setting, it is backwards compatible. The new caps flag declaration is not
needed, just remove it.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
PWRAP_DEW_CIPHER_LOAD and PWRAP_DEW_CIPHER_START only exist at
PMIC_mt6397 datasheet. We fix it before merge PMIC_mt6351 driver.
Fixes: 5ae48040aa ("soc: mediatek: PMIC wrap: add mt6323 slave support")
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
These changes are mostly PM related changes for am335x and
am437x to support RTC only suspend mode. Some of the clock
and driver related chances are still pending so it's not
yet fully functional.
Also included is a change for PM debug sysfs entry to use
DEFINE_SHOW_ATTRIBUTE.
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Merge tag 'omap-for-v4.19/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC updates for omaps for v4.19 merge window
These changes are mostly PM related changes for am335x and
am437x to support RTC only suspend mode. Some of the clock
and driver related chances are still pending so it's not
yet fully functional.
Also included is a change for PM debug sysfs entry to use
DEFINE_SHOW_ATTRIBUTE.
* tag 'omap-for-v4.19/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support
ARM: OMAP2+: sleep33/43xx: Make sleep actions configurable
ARM: OMAP2+: reuse DEFINE_SHOW_ATTRIBUTE() macro
ARM: hwmod: RTC: Don't assume lock/unlock will be called with irq enabled
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.19, please pull the following:
- Doug updates the low-level suspend/resume code for ARM SoCs to support
the latest rev B3.0 memory controllers found on newer chips with an
appropriate match structure to perform the correct entry sequencing
- Florian updates the Device Tree binding document for these memory
controllers to list all possible compatible strings that exist given
the supported memory controllers.
- Stefan adds the GET_THROTTLED firmware property value that is required
for the Rasperry Pi voltage monitoring driver and updates the
Raspberry Pi firmware driver accordingly to register such a device
using the HWMON subsystem. Finally he adds support for reporting under
voltage conditions using a specialized HWMON driver.
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Merge tag 'arm-soc/for-4.19/drivers' of https://github.com/Broadcom/stblinux into next/drivers
This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.19, please pull the following:
- Doug updates the low-level suspend/resume code for ARM SoCs to support
the latest rev B3.0 memory controllers found on newer chips with an
appropriate match structure to perform the correct entry sequencing
- Florian updates the Device Tree binding document for these memory
controllers to list all possible compatible strings that exist given
the supported memory controllers.
- Stefan adds the GET_THROTTLED firmware property value that is required
for the Rasperry Pi voltage monitoring driver and updates the
Raspberry Pi firmware driver accordingly to register such a device
using the HWMON subsystem. Finally he adds support for reporting under
voltage conditions using a specialized HWMON driver.
* tag 'arm-soc/for-4.19/drivers' of https://github.com/Broadcom/stblinux:
firmware: raspberrypi: Remove VLA usage
firmware: raspberrypi: Register hwmon driver
hwmon: Add support for RPi voltage sensor
soc: bcm: brcmstb: Add missing DDR MEMC compatible strings
soc: bcm: brcmstb: pm: Add support for newer rev B3.0 controllers
ARM: bcm2835: Add GET_THROTTLED firmware property
Signed-off-by: Olof Johansson <olof@lixom.net>
The imx6sl chip errata document describes ERR006287 like this:
> Upon resuming from power gating, the modules in the display power domain
(eLCDIF, EPDC, PXP and SPDC) might fail to perform register reads
correctly.
> When the modules listed above are used, do not use power gating on the
display power domain.
Link: https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf#page=62
Handle this in the safest possible way by keeping the DISP domain
always-on.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This introduces support for the SRAM C1 section, that is controlled by
the system controller. This SRAM area can be muxed either to the CPU
or the Video Engine, that needs this area to store various tables (e.g.
the Huffman VLD decoding tables).
This only supports devices with the same layout as the A10 (which also
includes the A13, A20, A33 and other SoCs).
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This binds the new A10 system-control compatible to the associated
driver, with the same driver data as the previous compatible.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add support for RTC mode to low level suspend code. This includes
providing the rtc base address for the assembly code to configuring the
PMIC_PWR_EN line late in suspend to enter RTC+DDR mode.
Note: This patch also fold in left out space parameter for
am33xx_emif_sram_table and am43xx_emif_sram_table
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add an argument to the sleep33xx and sleep43xx code to allow us to set
flags to determine which portions of the code get called in order to use
the same code for multiple power saving modes. This patch allows us to
decide whether or not we flush and disable caches, save EMIF context,
put the memory into self refresh and disable the EMIF, and/or invoke
the wkup_m3 when entering into WFI.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that we want to add another flag to autoremove the device link
on supplier unbind, it's fair to rename the existing flag from
DL_FLAG_AUTOREMOVE to DL_FLAG_AUTOREMOVE_CONSUMER so that we can
add similar flag for supplier later.
And, while we are touching device.h, fix a doc build warning.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Everyone gets these #ifdefs wrong, leading to another warning here:
drivers/soc/ti/wkup_m3_ipc.c:547:12: error: 'wkup_m3_ipc_resume' defined but not used [-Werror=unused-function]
static int wkup_m3_ipc_resume(struct device *dev)
drivers/soc/ti/wkup_m3_ipc.c:539:12: error: 'wkup_m3_ipc_suspend' defined but not used [-Werror=unused-function]
static int wkup_m3_ipc_suspend(struct device *dev)
The easiest way to get it right is to remove all the #ifdefs and
let the compiler drop the unused functions silently after we
mark them as __maybe_unused.
Fixes: 7a872b6fb7 ("soc: ti: wkup_m3_ipc: Add rtc_only with ddr in self refresh mode support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Add wkup_m3_request_wake_src to allow users to get the name of
the wakeup source after a DeepSleep or Standby transition.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Adds rtc_only support. This needs resume function to shutdown and
reboot the m3.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
* Convert to SPDX identifier
* Remove legacy SMP fallback code
Geert Uytterhoeven says "R-Car H2 and M2-W have been supporting SMP
enablement from DT using the "renesas,apmu" enable-method since v4.8.
A legacy fallback was left in place for backwards compatibility with old
DTBs.
This patch series removes the legacy SMP fallbacks for R-Car H2 and
M2-W, and consolidates their support in the common R-Car Gen2 machine
definition.2
* APMU cleanups after legacy SMP fallback removal
- Move cpu_leave_lowpower() from HOTPLUG_CPU || SUSPEND section to the
SUSPEND section as it is only used for suspend
- Remove shmobile_smp_apmu_prepare_cpus() as it is no longer used
- Remove platsmp-apmu.h
* Drop legacy SYSC fallbacks
Geert Uytterhoeven says "When DT SYSC support was introduced in v4.7,
legacy fallbacks were kept to keep secondary CPUs working on R-Car H1,
H2, and M2-W using old DTBs. However, the time has come to drop these
fallbacks, and clean up the resulting code"
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Merge tag 'renesas-arm-soc-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Arm SoC Updates for v4.19
* Convert to SPDX identifier
* Remove legacy SMP fallback code for R-CAR H2 and M2-W
- DT enablement has been in since 4.8, no longer needed
* APMU cleanups after legacy SMP fallback removal
* Drop legacy SYSC fallback code for R-Car H1, H2 and M2-W
- DT enablement has been in since 4.7, no longer needed.
* tag 'renesas-arm-soc-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: convert to SPDX identifier
soc: renesas: rcar-sysc: Drop legacy handling
ARM: shmobile: r8a7779: Remove explicit SYSC config and init
ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu()
soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs
ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot
ARM: shmobile: rcar-gen2: Remove explicit SYSC config and init
ARM: shmobile: apmu: Remove platsmp-apmu.h
ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus()
ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND section
ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops()
ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition
ARM: shmobile: r8a7791: Remove legacy SMP fallback code
ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition
ARM: shmobile: r8a7790: Remove legacy SMP fallback code
Signed-off-by: Olof Johansson <olof@lixom.net>
We would not be matching the following chip/compatible strings
combinations, which would lead to not setting the warm boot flag
correctly, fix that:
7260A0/B0: brcm,brcmstb-memc-ddr-rev-b.2.1
7255A0: brcm,brcmstb-memc-ddr-rev-b.2.3
7278Bx: brcm,brcmstb-memc-ddr-rev-b.3.1
The B2.1 core (which is in 7260 A0 and B0) doesn't have the
SHIMPHY_ADDR_CNTL_0_DDR_PAD_CNTRL setup in the memsys init code, nor
does it have the warm boot flag re-definition on entry. Those changes
were for B2.2 and later MEMSYS cores. Fall back to the previous S2/S3
entry method for these specific chips.
Fixes: 0b741b8234 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)")
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Device Tree binding document and add a matching entry for the
MEMC DDR controller revision B3.0 which is found on chips like 7278A0
and newer.
Signed-off-by: Doug Berger <opendmb@gmail.com>
[florian: tweak commit message, make it apply to upstream kernel]
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Without CONFIG_OF_RESERVED_MEM, gcc sees that the global cmd_db_header
variable is never initialized, and through code optimization concludes
that a lot of other code cannot possibly work after that:
drivers/soc/qcom/cmd-db.c: In function 'cmd_db_read_addr':
drivers/soc/qcom/cmd-db.c:197:21: error: 'ent.addr' may be used uninitialized in this function [-Werror=maybe-uninitialized]
return ret < 0 ? 0 : le32_to_cpu(ent.addr);
drivers/soc/qcom/cmd-db.c: In function 'cmd_db_read_aux_data':
drivers/soc/qcom/cmd-db.c:224:10: error: 'ent.len' may be used uninitialized in this function [-Werror=maybe-uninitialized]
ent_len = le16_to_cpu(ent.len);
drivers/soc/qcom/cmd-db.c:115:6: error: 'rsc_hdr.data_offset' may be used uninitialized in this function [-Werror=maybe-uninitialized]
u16 offset = le16_to_cpu(hdr->data_offset);
^~~~~~
drivers/soc/qcom/cmd-db.c:116:6: error: 'ent.offset' may be used uninitialized in this function [-Werror=maybe-uninitialized]
u16 loffset = le16_to_cpu(ent->offset);
^~~~~~~
drivers/soc/qcom/cmd-db.c: In function 'cmd_db_read_aux_data_len':
drivers/soc/qcom/cmd-db.c:250:38: error: 'ent.len' may be used uninitialized in this function [-Werror=maybe-uninitialized]
return ret < 0 ? 0 : le16_to_cpu(ent.len);
^
drivers/soc/qcom/cmd-db.c: In function 'cmd_db_read_slave_id':
drivers/soc/qcom/cmd-db.c:272:7: error: 'ent.addr' may be used uninitialized in this function [-Werror=maybe-uninitialized]
Using a hard CONFIG_OF_RESERVED_MEM dependency avoids this warning,
and we can remove the CONFIG_OF dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be
properly propagated to the upstream interrupt controller.
- Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference
Manual are incorrect.
- Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that
the SPI controller RX FIFO was not empty after a DMA transfer, and
the driver gets stuck in the next PIO transfer when reading one word
more than expected.
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Merge tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.18:
- Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be
properly propagated to the upstream interrupt controller.
- Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference
Manual are incorrect.
- Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that
the SPI controller RX FIFO was not empty after a DMA transfer, and
the driver gets stuck in the next PIO transfer when reading one word
more than expected.
* tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx: fix irq for pcie bridge
soc: imx: gpcv2: correct PGC offset
ARM: dts: imx6q: Use correct SDMA script for SPI5 core
Signed-off-by: Olof Johansson <olof@lixom.net>
Make PM domain initialization more robust in Renesas R-Car SYSC driver.
This resolves a regression due to re-parenting of PM domains by
086b399965 ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}").
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Merge tag 'renesas-fixes-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Renesas ARM Based SoC Fixes for v4.18
Make PM domain initialization more robust in Renesas R-Car SYSC driver.
This resolves a regression due to re-parenting of PM domains by
086b399965 ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}").
* tag 'renesas-fixes-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Make PM domain initialization more robust
Signed-off-by: Olof Johansson <olof@lixom.net>
The SRAM mapping controls on Allwinner SoCs is located in a block called
"System Controls". This block also has registers for identifying the SoC,
reading the state of an external boot-related pin, and on some newer SoCs,
glue layer controls for the EMAC Ethernet controller.
The A64 variant compatible is renamed to "allwinner,a64-system-control"
to reflect this. The old A64 compatible is deprecated. So far we haven't
seen any actual use of it.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The A64 SRAM controller memory zone has a EMAC clock register, which is
needed by the Ethernet MAC driver (dwmac-sun8i).
Export a regmap for this register on A64.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[wens@csie.org: export whole address range with only EMAC register
accessible and drop regmap name]
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
qcom_mdt_load function loads the mdt type firmware and
initialises the secure memory as well. Make the initialisation only
when requested by the caller, so that the function can be used
by self-authenticating remoteproc as well.
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Now the R-Car platform code no longer supports DTBs lacking a SYSC
device node in DT, all legacy handling can be dropped from the R-Car
SYSC driver:
- Make rcar_sysc_ch private to the driver,
- Make rcar_sysc_power_{down,up}() static (they have been replaced by
rcar_sysc_power_{down,up}_cpu()),
- Remove the legacy wrapper rcar_sysc_init(), and the check for double
initialization (only the early_initcall is left).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Provide helpers to control CPU power areas from platform code, taking
just a CPU index. This will avoid having to pass full CPU power area
parameter blocks, and thus duplicating information already provided by
SoC-specific SYSC drivers.
This will be used on R-Car H1 only.
Later R-Car generations rely on APMU/RST for CPU power area control.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Correct MIPI/PCIe/USB_HSIC's PGC offset based on
design RTL, the values in the Reference Manual
(Rev. 1, 01/2018 and the older ones) are incorrect.
The correct offset values should be as below:
0x800 ~ 0x83F: PGC for core0 of A7 platform;
0x840 ~ 0x87F: PGC for core1 of A7 platform;
0x880 ~ 0x8BF: PGC for SCU of A7 platform;
0xA00 ~ 0xA3F: PGC for fastmix/megamix;
0xC00 ~ 0xC3F: PGC for MIPI PHY;
0xC40 ~ 0xC7F: PGC for PCIe_PHY;
0xC80 ~ 0xCBF: PGC for USB OTG1 PHY;
0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY;
0xD00 ~ 0xD3F: PGC for USB HSIC PHY;
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Fixes: 03aa12629f ("soc: imx: Add GPCv2 power gating driver")
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
With PHYS_ADDR_MAX there is now a type safe variant for all bits set.
Make use of it.
Patch created using a semantic patch as follows:
// <smpl>
@@
typedef phys_addr_t;
@@
-(phys_addr_t)ULLONG_MAX
+PHYS_ADDR_MAX
// </smpl>
Link: http://lkml.kernel.org/r/20180419214204.19322-1-stefan@agner.ch
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com> [arm64]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- Additional struct_size() conversions (Matthew, Kees)
- Explicitly reported overflow fixes (Silvio, Kees)
- Add missing kvcalloc() function (Kees)
- Treewide conversions of allocators to use either 2-factor argument
variant when available, or array_size() and array3_size() as needed (Kees)
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Merge tag 'overflow-v4.18-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux
Pull more overflow updates from Kees Cook:
"The rest of the overflow changes for v4.18-rc1.
This includes the explicit overflow fixes from Silvio, further
struct_size() conversions from Matthew, and a bug fix from Dan.
But the bulk of it is the treewide conversions to use either the
2-factor argument allocators (e.g. kmalloc(a * b, ...) into
kmalloc_array(a, b, ...) or the array_size() macros (e.g. vmalloc(a *
b) into vmalloc(array_size(a, b)).
Coccinelle was fighting me on several fronts, so I've done a bunch of
manual whitespace updates in the patches as well.
Summary:
- Error path bug fix for overflow tests (Dan)
- Additional struct_size() conversions (Matthew, Kees)
- Explicitly reported overflow fixes (Silvio, Kees)
- Add missing kvcalloc() function (Kees)
- Treewide conversions of allocators to use either 2-factor argument
variant when available, or array_size() and array3_size() as needed
(Kees)"
* tag 'overflow-v4.18-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: (26 commits)
treewide: Use array_size in f2fs_kvzalloc()
treewide: Use array_size() in f2fs_kzalloc()
treewide: Use array_size() in f2fs_kmalloc()
treewide: Use array_size() in sock_kmalloc()
treewide: Use array_size() in kvzalloc_node()
treewide: Use array_size() in vzalloc_node()
treewide: Use array_size() in vzalloc()
treewide: Use array_size() in vmalloc()
treewide: devm_kzalloc() -> devm_kcalloc()
treewide: devm_kmalloc() -> devm_kmalloc_array()
treewide: kvzalloc() -> kvcalloc()
treewide: kvmalloc() -> kvmalloc_array()
treewide: kzalloc_node() -> kcalloc_node()
treewide: kzalloc() -> kcalloc()
treewide: kmalloc() -> kmalloc_array()
mm: Introduce kvcalloc()
video: uvesafb: Fix integer overflow in allocation
UBIFS: Fix potential integer overflow in allocation
leds: Use struct_size() in allocation
Convert intel uncore to struct_size
...
This is a branch with a few merge requests that either came in late, or
took a while longer for us to review and merge than usual and thus cut
it a bit close to the merge window. We stage them in a separate branch
and if things look good, we still send them up -- and that's the case
here.
This is mostly DT additions for Renesas platforms, adding IP block
descriptions for existing and new SoCs.
There are also some driver updates for Qualcomm platforms for SMEM/QMI
and GENI, which is their generalized serial protocol interface.
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late updates from Olof Johansson:
"This is a branch with a few merge requests that either came in late,
or took a while longer for us to review and merge than usual and thus
cut it a bit close to the merge window. We stage them in a separate
branch and if things look good, we still send them up -- and that's
the case here.
This is mostly DT additions for Renesas platforms, adding IP block
descriptions for existing and new SoCs.
There are also some driver updates for Qualcomm platforms for SMEM/QMI
and GENI, which is their generalized serial protocol interface"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits)
soc: qcom: smem: introduce qcom_smem_virt_to_phys()
soc: qcom: qmi: fix a buffer sizing bug
MAINTAINERS: Update pattern for qcom_scm
soc: Unconditionally include qcom Makefile
soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
soc: qcom: smem: fix qcom_smem_set_global_partition()
soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
soc: qcom: smem: byte swap values properly
soc: qcom: smem: return proper type for cached entry functions
soc: qcom: smem: fix first cache entry calculation
soc: qcom: cmd-db: Make endian-agnostic
drivers: qcom: add command DB driver
arm64: dts: renesas: salvator-common: Add ADV7482 support
ARM: dts: r8a7740: Add CEU1
ARM: dts: r8a7740: Add CEU0
arm64: dts: renesas: salvator-common: enable VIN
arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a7795-es1: add CSI-2 node
...
This branch contains platform-related driver updates for ARM and ARM64.
Highlights:
- ARM SCMI (System Control & Management Interface) driver cleanups
- Hisilicon support for LPC bus w/ ACPI
- Reset driver updates for several platforms: Uniphier,
- Rockchip power domain bindings and hardware descriptions for several SoCs.
- Tegra memory controller reset improvements
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"This contains platform-related driver updates for ARM and ARM64.
Highlights:
- ARM SCMI (System Control & Management Interface) driver cleanups
- Hisilicon support for LPC bus w/ ACPI
- Reset driver updates for several platforms: Uniphier,
- Rockchip power domain bindings and hardware descriptions for
several SoCs.
- Tegra memory controller reset improvements"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (59 commits)
ARM: tegra: fix compile-testing PCI host driver
soc: rockchip: power-domain: add power domain support for px30
dt-bindings: power: add binding for px30 power domains
dt-bindings: power: add PX30 SoCs header for power-domain
soc: rockchip: power-domain: add power domain support for rk3228
dt-bindings: power: add binding for rk3228 power domains
dt-bindings: power: add RK3228 SoCs header for power-domain
soc: rockchip: power-domain: add power domain support for rk3128
dt-bindings: power: add binding for rk3128 power domains
dt-bindings: power: add RK3128 SoCs header for power-domain
soc: rockchip: power-domain: add power domain support for rk3036
dt-bindings: power: add binding for rk3036 power domains
dt-bindings: power: add RK3036 SoCs header for power-domain
dt-bindings: memory: tegra: Remove Tegra114 SATA and AFI reset definitions
memory: tegra: Remove Tegra114 SATA and AFI reset definitions
memory: tegra: Register SMMU after MC driver became ready
soc: mediatek: remove unneeded semicolon
soc: mediatek: add a fixed wait for SRAM stable
soc: mediatek: introduce a CAPS flag for scp_domain_data
soc: mediatek: reuse regmap_read_poll_timeout helpers
...
Here are the main updates for SoC support (besides DT additions) for ARM
32- and 64-bit platforms. The branch also contains defconfig updates to
turn on drivers and options as needed on the various platforms.
The largest parts of the delta are from cleanups moving platform data
and board file setup of TI platforms to ti-sysc bus drivers. There are
also some sweeping changes of eeprom and nand setup on Davinci, i.MX
and other platforms.
Samsung is removing support for Exynos5440, which was an oddball SoC
that hasn't been seen much use in designs.
Renesas is adding support for new SoCs (R-Car E3, RZ/G1C and RZ/N1D).
Linus Walleij is also removing support for ux500 (Sony Ericsson)
U8540/9540 SoCs that never made it to significant mass production and
products.
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"Here are the main updates for SoC support (besides DT additions) for
ARM 32- and 64-bit platforms. The branch also contains defconfig
updates to turn on drivers and options as needed on the various
platforms.
The largest parts of the delta are from cleanups moving platform data
and board file setup of TI platforms to ti-sysc bus drivers. There are
also some sweeping changes of eeprom and nand setup on Davinci, i.MX
and other platforms.
Samsung is removing support for Exynos5440, which was an oddball SoC
that hasn't been seen much use in designs.
Renesas is adding support for new SoCs (R-Car E3, RZ/G1C and RZ/N1D).
Linus Walleij is also removing support for ux500 (Sony Ericsson)
U8540/9540 SoCs that never made it to significant mass production and
products"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
MAINTAINERS: add NXP linux team maillist as i.MX reviewer
ARM: stm32: Don't select DMA unconditionally on STM32MP157C
arm64: defconfig: Enable PCIe on msm8996 and db820c
ARM: pxa3xx: enable external wakeup pins
ARM: pxa: stargate2: use device properties for at24 eeprom
arm64: defconfig: Enable HISILICON_LPC
arm64: defconfig: enable drivers for Poplar support
arm64: defconfig: Enable UFS on msm8996
ARM: berlin: switch to SPDX license identifier
arm: berlin: remove non-necessary flush_cache_all()
ARM: berlin: extend BG2CD Kconfig entry
OMAP: CLK: CLKSRC: Add suspend resume hooks
ARM: AM43XX: Add functions to save/restore am43xx control registers
ASoC: ams_delta: use GPIO lookup table
ARM: OMAP1: ams-delta: add GPIO lookup tables
bus: ti-sysc: Fix optional clocks array access
ARM: OMAP2+: Make sure LOGICRETSTATE bits are not cleared
ARM: OMAP2+: prm44xx: Inroduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: prm44xx: Introduce context save/restore for am43 PRCM IO
ARM: OMAP2+: powerdomain: Introduce cpu_pm notifiers for context save/restore
...
general cleanups, but nothing too major. The majority of the diff goes to
two SoCs, Actions Semi and Qualcomm. A brand new driver is introduced for
Actions Semi so it takes up some lines to add all the different types, and
the Qualcomm diff is there because we add support for two SoCs and it's quite
a bit of data.
Otherwise the big driver updates are on TI Davinci and Amlogic platforms. And
then the long tail of driver updates for various fixes and stuff follows
after that.
Core:
- debugfs cleanups removing error checking and an unused provider API
- Removal of a clk init typedef that isn't used
- Usage of match_string() to simplify parent string name matching
- OF clk helpers moved to their own file (linux/of_clk.h)
- Make clk warnings more readable across kernel versions
New Drivers:
- Qualcomm SDM845 GCC and Video clk controllers
- Qualcomm MSM8998 GCC
- Actions Semi S900 SoC support
- Nuvoton npcm750 microcontroller clks
- Amlogic axg AO clock controller
Removed Drivers:
- Deprecated Rockchip clk-gate driver
Updates:
- debugfs functions stopped checking return values
- Support for the MSIOF module clocks on Rensas R-Car M3-N
- Support for the new Rensas RZ/G1C and R-Car E3 SoCs
- Qualcomm GDSC, RCG, and PLL updates for clk changes in new SoCs
- Berlin and Amlogic SPDX tagging
- Usage of of_clk_get_parent_count() in more places
- Proper implementation of the CDEV1/2 clocks on Tegra20
- Allwinner H6 PRCM clock support and R40 EMAC support
- Add critical flag to meson8b's fdiv2 as temporary fixup for ethernet
- Round closest support for meson's mpll driver
- Support for meson8b nand clocks and gxbb video decoder clocks
- Mediatek mali clks
- STM32MP1 fixes
- Uniphier LD11/LD20 stream demux system clock
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This time we have a good set of changes to the core framework that do
some general cleanups, but nothing too major. The majority of the diff
goes to two SoCs, Actions Semi and Qualcomm. A brand new driver is
introduced for Actions Semi so it takes up some lines to add all the
different types, and the Qualcomm diff is there because we add support
for two SoCs and it's quite a bit of data.
Otherwise the big driver updates are on TI Davinci and Amlogic
platforms. And then the long tail of driver updates for various fixes
and stuff follows after that.
Core:
- debugfs cleanups removing error checking and an unused provider API
- Removal of a clk init typedef that isn't used
- Usage of match_string() to simplify parent string name matching
- OF clk helpers moved to their own file (linux/of_clk.h)
- Make clk warnings more readable across kernel versions
New Drivers:
- Qualcomm SDM845 GCC and Video clk controllers
- Qualcomm MSM8998 GCC
- Actions Semi S900 SoC support
- Nuvoton npcm750 microcontroller clks
- Amlogic axg AO clock controller
Removed Drivers:
- Deprecated Rockchip clk-gate driver
Updates:
- debugfs functions stopped checking return values
- Support for the MSIOF module clocks on Rensas R-Car M3-N
- Support for the new Rensas RZ/G1C and R-Car E3 SoCs
- Qualcomm GDSC, RCG, and PLL updates for clk changes in new SoCs
- Berlin and Amlogic SPDX tagging
- Usage of of_clk_get_parent_count() in more places
- Proper implementation of the CDEV1/2 clocks on Tegra20
- Allwinner H6 PRCM clock support and R40 EMAC support
- Add critical flag to meson8b's fdiv2 as temporary fixup for ethernet
- Round closest support for meson's mpll driver
- Support for meson8b nand clocks and gxbb video decoder clocks
- Mediatek mali clks
- STM32MP1 fixes
- Uniphier LD11/LD20 stream demux system clock"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits)
clk: qcom: Export clk_fabia_pll_configure()
clk: bcm: Update and add Stingray clock entries
dt-bindings: clk: Update Stingray binding doc
clk-si544: Properly round requested frequency to nearest match
clk: ingenic: jz4770: Add 150us delay after enabling VPU clock
clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
clk: ingenic: jz4770: Change OTG from custom to standard gated clock
clk: ingenic: Support specifying "wait for clock stable" delay
clk: ingenic: Add support for clocks whose gate bit is inverted
clk: use match_string() helper
clk: bcm2835: use match_string() helper
clk: Return void from debug_init op
clk: remove clk_debugfs_add_file()
clk: tegra: no need to check return value of debugfs_create functions
clk: davinci: no need to check return value of debugfs_create functions
clk: bcm2835: no need to check return value of debugfs_create functions
clk: no need to check return value of debugfs_create functions
clk: imx6: add EPIT clock support
clk: mvebu: use correct bit for 98DX3236 NAND
...
Arnd Bergmann