Commit Graph

2 Commits

Author SHA1 Message Date
Faiz Abbas 7f35e63dbf bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x
The dra76x MCAN generic interconnect module has a its own
format for the bits in the control registers.

Therefore add a new module type, new regbits and new capabilities
specific to the MCAN module.

Acked-by: Rob Herring <robh@kernel.org>
CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-09 22:31:27 -07:00
Tony Lindgren 20a2742e57 dt-bindings: ti-sysc: Update binding for timers and capabilities
The ti-sysc binding does not yet describe the capabilities of the
interconnect target module. So to make the ti-sysc binding usable
for configuring the interconnect target module, we need to add few
more properties:

1. To detect between omap2 and omap4 timers, let's add compatibles
   for them for "ti,sysc-omap2-timer" and,sysc-omap4-timer". This
   makes it easier to pick up the already initialized system timers
   later on

2. Let's add "ti,sysc-mask" for a mask of features supported by the
   interconnect target module. This describes what we have available
   in the various SYSCONFIG registers

3. Let's add "ti,sysc-midle" and "ti,sysc-sidle" lists for the master
   and slave idle modes supported by the interconnect target module.
   These describe the values available for MIDLE and SIDLE bits in
   the SYSCONFIG registers

4. Some interconnect target modules need a short delay after reset
   before they can be accessed, let's use "ti,sysc-delay-us" for
   that

5. Let's add "ti,syss-mask" bit to describe the optional SYSSTATUS
   register bits for reset done bits

6. Let's support the two existing custom quirk properties already
   listed in Documentation/devicetree/bindings/arm/omap/omap.txt for
   "ti,no-reset-on-init" and "ti,no-idle-on-init"

7. And finally, let's add a header for the binding for the dts
   files and the driver to use

Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Sakari Ailus <sakari.ailus@iki.fi>
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-15 09:39:11 -08:00