The final version of fusb300 controller adds EPSET0_STL_CLR
for clearing EP0 stall and also removes EPSET0_EPn_TX0BYTE.
fusb300_udc driver is tested on FARADAY platform a369 with
FUSB300 FPGA v1.8
Signed-off-by: Yuan-Hsin Chen <yhchen@faraday-tech.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
remove the following two paragraphs as they are not needed:
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License along with
this program; if not, write to the Free Software Foundation, Inc.,59
Temple Place - Suite 330, Boston, MA 02111-1307, USA.
Signed-off-by: Klaus Schwarzkopf <schwarzkopf@sensortherm.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Yuan-Hsin Chen