Since switching to clk drivers, the CLK_POUT cannot be searched for by
clk_get() API and thus it returns with ENOENT.
Register it with the clk_lookup and thus unbreak the users of it.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
gcc-4.4 got confused by the inline assembler statement:
drivers/clk/pxa/clk-pxa.c: In function 'pxa2xx_core_turbo_switch':
drivers/clk/pxa/clk-pxa.c:152: error: expected string literal before ')' token
This removes the extraneous ':' to let all compilers parse the
driver correctly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
These are updates for platform specific code on 32-bit ARM machines,
essentially anything that can not (yet) be expressed using DT files.
Noteworthy changes include:
- Added support for the TI DRA71x family of SoCs in mach-omap2,
this is an new variant of the the DRA72x/DRA74x automotive
infotainment chips we already supported for a while.
- Added support for the ST STM32F746 SoC, the first Cortex-M7
based microcontroller we support, related to the smaller
STM32F4 family.
- Renesas adds support for r8a7743 and r8a7745 in mach-shmobile,
see http://elinux.org/RZ-G
- SMP is now supported on the OX820 platform
- A lot of code in mach-omap2 gets removed as a follow-up to
removing support for board files in the previous release
- Davinci has some new work to improve USB support
- For i.MX, the performance monitor now supports profiling the
memory controller using 'perf'
Conflicts:
arch/arm/mach-shmobile/setup-rcar-gen2.c: rcar_gen2_clocks_init()
is gone, calling of_clk_init(NULL) is sufficient now.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMS9WCrR//JCVInAQIG+Q/7BElvubqO/Cc/VEAyoB5iF9OB9wPD2t5p
O0KwtrTtzqJZJNGTmPiesR4DMZH07O1XoW8HqvBPeXtB7/t0tmOegwK+WABbpkSE
ZQgUjtrIGwteJXYqU2BbhooO8G6mEsfWaqdGX8ZiIk40fPhMN6536lG+JA8DV7uv
ckAPHCZkIf34lDtwljN97Cvj1TT9lBFp04bx7alKqfg1IMV+iMSxvSRHuuFlxRCk
kzwVXDmFlZLmueU2KbQXTuOUrvehIGlZ/X5QWlxfrjwCwnOvr54p8WDoVWu2UkHm
Dc8BVfsBny8mCZJRzfDD1S0PD0mWn1msdOhRb4VRzsC9DnRI4qbL0/Hstu8A7yUQ
kBtMyVtFTzvRSclABbHHN6Mnm37AyNwSIKIB8h2U1m7YHqZGwHLaflVT5sf3tl7m
4arTVqHtR8oSU5G5a2FTznMM2rfIx4LcCBbLQxWqzmO4Qrh4j6t7c2i7+VTfFAja
0bToLgTArKK/cep6PWeBnMH14nzlXoKtBf2T8qwQPuAmLKy9E0ZduLKZ01B/nqrj
OXcsnG0OUuqU4RgbIaDssRU4ohKIk8JcAl60TdRFhzj+/LTbeMaWVwbWuQS+iHd3
zfzGUoUIhElx0vHt6ghR0BYQadszb1z9V0NEs3UM0v5cWlNodX//3okH8lZmSW6w
+fO4dSnIKIA=
=BF6Y
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"These are updates for platform specific code on 32-bit ARM machines,
essentially anything that can not (yet) be expressed using DT files.
Noteworthy changes include:
- Added support for the TI DRA71x family of SoCs in mach-omap2, this
is an new variant of the the DRA72x/DRA74x automotive infotainment
chips we already supported for a while.
- Added support for the ST STM32F746 SoC, the first Cortex-M7 based
microcontroller we support, related to the smaller STM32F4 family.
- Renesas adds support for r8a7743 and r8a7745 in mach-shmobile, see
http://elinux.org/RZ-G
- SMP is now supported on the OX820 platform
- A lot of code in mach-omap2 gets removed as a follow-up to removing
support for board files in the previous release
- Davinci has some new work to improve USB support
- For i.MX, the performance monitor now supports profiling the memory
controller using 'perf'"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (95 commits)
ARM: davinci: da830-evm: use gpio descriptor for mmc pins
ARM: davinci: da850-evm: use gpio descriptor for mmc pins
ARM: davinci: hawk: use gpio descriptor for mmc pins
ARM: ARTPEC-6: add select MFD_SYSCON to MACH_ARTPEC6
ARM: davinci: da8xx: Fix ohci device name
ARM: oxnas: Add OX820 config and makefile entry
ARM: oxnas: Add OX820 SMP support
ARM: davinci: PM: fix build when da850 not compiled in
ARM: orion5x: remove legacy support of ls-chl
ARM: integrator: drop EBI access use syscon
ARM: BCM5301X: Add back handler ignoring external imprecise aborts
ARM: davinci: PM: support da8xx DT platforms
ARM: davinci: PM: cleanup: remove references to pdata
ARM: davinci: PM: rework init, remove platform device
ARM: Kconfig: Introduce MACH_STM32F746 flag
ARM: mach-stm32: Add a new SOC - STM32F746
ARM: shmobile: document SK-RZG1E board
ARM: shmobile: r8a7745: basic SoC support
ARM: imx: mach-imx6ul: add imx6ull support
ARM: zynq: Reserve correct amount of non-DMA RAM
...
This function is passed an __iomem pointer but we use a u32
pointer instead which makes checkers like spare complain.
Furthermore, "lock" is a pretty poor variable name for a string
that will go into lockdep reports and the symbol isn't marked
static. Cleanup all this.
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The new pxa2xx_determine_rate() function seems lacking in a few
regards:
- For an exact match or no match at all, the rate is uninitialized
as reported by gcc -Wmaybe-unintialized:
drivers/clk/pxa/clk-pxa.c: In function 'pxa2xx_determine_rate':
drivers/clk/pxa/clk-pxa.c:243:5: error: 'rate' may be used uninitialized in this function
- If we get a non-exact match, the req->rate output is never set
to the actual rate but remains at the requested rate.
- We should not attempt to print a rate if none could be found
This rewrites the logic accordingly.
Fixes: 9fe6942950 ("clk: pxa: transfer CPU clock setting from pxa2xx-cpufreq")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The dummy_clk_set_parent function is marked as 'static' but is
no longer referenced from the pxa25x clk driver after the last use
of the RATE_RO_OPS() macro is gone from this file, causing a
harmless build warning:
In file included from drivers/clk/pxa/clk-pxa25x.c:24:0:
drivers/clk/pxa/clk-pxa.h:146:12: error: 'dummy_clk_set_parent' defined but not used [-Werror=unused-function]
This marks the functon as 'inline', which lets the compiler simply
drop it when it gets referenced.
Fixes: 9fe6942950 ("clk: pxa: transfer CPU clock setting from pxa2xx-cpufreq")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This is the initial stage to transfer the pxa25x and pxa27x CPU clocks
handling from cpufreq to the clock API. More precisely, the clocks
transferred are :
- cpll : core pll, known also as the CPU core turbo frequency
- core : core, known also as the CPU actual frequency, being either the
CPU core turbo frequency or the CPU core run frequency
This transfer is a prequel to shrink the code in pxa2xx-cpufreq.c, so
that it can become, at least in devicetree builds, the casual cpufreq-dt
driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
pxaxxx_get_clk_frequency_khz() needs several clocks to be available
through clk_get(), ie. the cpu clocks, system bus clock and memory
clocks.
Add the missing clkdev so that their rate can be acquired.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The meaning of this bit was inverted :
- when set to 0, system bus clock is half of the CPU run clock
- when set to 1, system bus clock is the CPU run clock
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The t bit of clkfcfg doesn't affect the core pll clock, but it makes core
clock select between core pll clock and core run clock.
As such remove it from the core pll rate reporting function, while it
remains in clk_pxa27x_core_get_parent().
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This is a cleanup patch to remove unused values not used in their
respective functions.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The OSTIMER0 clock ticks at the main oscillator rate, not the 32kHz
oscillator rate. Ensure that it is parented to the main oscillator.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
new device support in terms of LoC, but there has been some cleanup
in the core as well as the usual minor clk additions to various
drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a minor
refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABCAAGBQJW8fPZAAoJENidgRMleOc9sc0P/2b4k8FiFwjMXiiXI1rcEjiz
ZjeVxzyAcwBiYoL8a2XONd+pihjLNcAbDbjk8SGUzmKDDz7elQbrhby/6o1dPlW/
fQEQFa8Xa8zhZgidO1AFc1DmIcPg/u/Z58wHbjIcqDjvzKA63213Ud34NJsRtF6y
+EJrIUZiTtj5q1pJgDmqlOv6ImmQtgW/AN51vNXCNNCyS9OsSgQm0DK5/f485HNc
2y5NE5hpijso69HFet5chuT3DiDLz/0dxmgCm/w9CRRzkHxYl3lxV/v07B+rZBo5
cWplFfvJqX7PvQtcP0sPPzZUfGT/vOeTboWprQwI4R3RObS18xLqlq6DEvOTmnqW
Jh+9uNBq4+kwSz5GcYjpwvj7+W0FPgIaBVRHrEW9qeXkgDpYloPtnEt8C8GmO6Bt
O0bgIzETq9mnRTA+VesIfjmTa4IYRDDUoDwGTw5CnW3jaZmtYJh8GhgZulMfPfyK
vfWQkY2OesXFwct0rU8tFiswTPeTRgXqL3AsPYjTPAHx1kfBpvfOQTCzzT7eSBr7
jykd9EXsXrYb/rpIxW7j6KjPpaWu+EouK06wc4TIBGrrWVTIV0ZvybzOBgf0FnpS
UDx87OyQb8x9TDMrfKf6bmJyly8y1dXkutFYY4XKIGUydlXIf0kn7AnIXW6SR7mX
fTEdLFMZ03ViCojtah5r
=bZFY
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The clk changes for this release cycle are mostly dominated by new
device support in terms of LoC, but there has been some cleanup in the
core as well as the usual minor clk additions to various drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a
minor refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction
dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
clk: renesas: div6: use RENESAS for #define
clk: renesas: Rename header file renesas.h
clk: max77{686,802}: Remove CLK_IS_ROOT
clk: versatile: Remove CLK_IS_ROOT
clk: sunxi: Remove use of variable length array
clk: fixed-rate: Remove CLK_IS_ROOT
clk: qcom: Remove CLK_IS_ROOT
doc: dt: add documentation for lpc1850-creg-clk driver
clk: add lpc18xx creg clk driver
clk: lpc32xx: fix compilation warning
clk: xgene: Add missing parenthesis when clearing divider value
clk: mb86s7x: Remove CLK_IS_ROOT
clk: x86: Remove clkdev.h and clk.h includes
clk: x86: Remove CLK_IS_ROOT
clk: mvebu: Remove CLK_IS_ROOT
clk: renesas: move drivers to renesas directory
clk: si5{14,351,70}: Remove CLK_IS_ROOT
clk: scpi: Remove CLK_IS_ROOT
clk: s2mps11: Remove CLK_IS_ROOT
...
This flag is a no-op now. Remove usage of the flag.
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
We should not dereference registers as pointers, so use readl/writel
instead for these registers.
The clock registers are accessed in multiple files, so we have to
change them all at once.
I stumbled over these registers while looking at something unrelated.
There are in fact other registers with the same problem, but I did
not try to address those at this point.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Lots of header files are never included outside of a mach-pxa
directory and do not need to be made visible in include/mach,
so let's just move them all down one level.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
and the addition of new clock drivers. Stephen Boyd has also done a lot
of subsystem-wide driver clean-ups (thanks!). There are also fixes to
the framework core and changes to better split clock provider drivers
from clock consumer drivers.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJV5KelAAoJEKI6nJvDJaTUwaQP/RVb70v6XSgMIePuOq3iaECT
bclCAyito3YFwykrPPmQ1DucHvEjlWopeFwKqEE9VjNl07TVIH/OMGeonb9yErIY
aN+FMoA9RUGVexMhy004q5sSbOEihAqTgKWaOiYoY8zAfJfeTpYXUoy34FcrW7MB
j/cDDJgigtWe9zzcdrW04oT454lXQaSQuGX39tDCR0s0S3soYU2JyjkyBGiO5Yid
1yIMq/nzI8SrCwxwD/nFwQNtg7lqiAN291Nbi4At1vvG5r4RhNveuLGv8uJ50XRB
xwy0sdHLIVJrIJ8OUcs1sY8wxu7ghDS8u+vjTNO2RzBf3KZWbuXWX+yVM7JQi4Ty
0iL5hGbvERy5E9QSzzH+Ox2jVt5e/r/dyvRf3oBDPVrFXhKusYhn6JmdUVJkTZ83
GTw2sQdEpcmry4z/50/MaqpZuXVZ09VTOCTqp8ToseJjsz9jXxVhQ4HdAwLc8cmV
txWGRXuBxCB+2o8M0oky3IKS69VFFH5u6QQ0KG8+JYOrDDG7GcnJsFeV7mQjlu8g
3evYUILNAUfJGBpkOeLs654KUBHwUyXc87cUIKwjGaPruWb2048+kdCVrL3IFwPb
sS/7Qn3DQ90pHFUTssDnWLz3X0IWT3H0iV4zZyAqqdARugEo+mpykmXmMWcWc3VR
MrD1l3GVxLegEf242Zpo
=QAiQ
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Michael Turquette:
"The clk framework changes for 4.3 are mostly updates to existing
drivers and the addition of new clock drivers. Stephen Boyd has also
done a lot of subsystem-wide driver clean-ups (thanks!). There are
also fixes to the framework core and changes to better split clock
provider drivers from clock consumer drivers"
* tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (227 commits)
clk: s5pv210: add missing call to samsung_clk_of_add_provider()
clk: pistachio: correct critical clock list
clk: pistachio: Fix PLL rate calculation in integer mode
clk: pistachio: Fix override of clk-pll settings from boot loader
clk: pistachio: Fix 32bit integer overflows
clk: tegra: Fix some static checker problems
clk: qcom: Fix MSM8916 prng clock enable bit
clk: Add missing header for 'bool' definition to clk-conf.h
drivers/clk: appropriate __init annotation for const data
clk: rockchip: register pll mux before pll itself
clk: add bindings for the Ux500 clocks
clk/ARM: move Ux500 PRCC bases to the device tree
clk: remove duplicated code with __clk_set_parent_after
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
clk: Constify clk_hw argument to provider APIs
clk: Hi6220: add stub clock driver
dt-bindings: clk: Hi6220: Document stub clock driver
dt-bindings: arm: Hi6220: add doc for SRAM controller
clk: atlas7: fix pll missed divide NR in fraction mode
clk: atlas7: fix bit field and its root clk for coresight_tpiu
...
Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
were inadequately inverted. As a consequence, all clock operations were
happening on CKENB, because almost all but 2 clocks are on CKENA.
As the clocks were activated by the bootloader in the former tests, it
escaped the testing that the wrong clock gate was manipulated. The error
was revealed by changing the pxa3xx-nand driver to a module, where upon
unloading, the wrong clock was disabled in CKENB.
Fixes: 9bbb8a338f ("clk: pxa: add pxa3xx clock driver")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Legacy drivers which are not yet ported, such as cpufreq-pxa[23]xx, rely
on pxaXXx_get_clk_frequency_khz() to find the CPU core frequency.
This reporting was broken because the expected unit is kHz and not
Hz. Fix the reporting for pxa25x, pxa27x and pxa3xx.
Fixes: fe7710fae4 ("clk: add pxa25x clock drivers")
Fixes: d40670dc61 ("clk: add pxa27x clock drivers")
Fixes: 9bbb8a338f ("clk: pxa: add pxa3xx clock driver")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers and updates to existing ones, as usual. There are some fixes to
the framework itself and several cleanups for sparse warnings, etc.
Please consider pulling.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVlCubAAoJEKI6nJvDJaTUJ3cQAKdaU+NpWX9Qajt6snIHcqB6
nBg57DltuPh1XFMPHDIdPe+8rK0RDQjao6jwzzqUKGaZJ3sycPCIn8mh+iZCP7Se
yxhacQIAIp2qbIlIQ8Epcc6jnma/8cUyfB0BuYMddzb7bk2PXLfLxzJgAo5pXZM1
LQoBxdpBh3Y7vcdBFLuHsnORTZdRI29Nu7p5dRK27vxWFBoCqL3bshHSS8g7lTBc
XUWcFhfFe7WvMvBqqF8pSJlCmHzO90S0MmFPT4OQy4NtAysPpjsqI6RPCHBTyvy+
oniMM6zM/RdN1VnLB49HvAL4mArjAdsQGxNywsUpvD/IcZPbpM8N3VA3xHzANMfy
iJ9374zgjRn3/YBfjYFCcyVUY7SPeiRsXh97ZMZJGY5BC5FbXuKMn3STPrUilhw/
CMSq9ARdmjlPQDW5EuEGFeap+7oz4q4Kgk0qgmOktIVYhtt9Pn0ddMKINIpokzbi
4w0z1kc/YVHZpFMNYxAQoxYzejU9hxybUvYUEnu9RFzzOW+o7DsmMv7k5r1XY+oO
P1Kz0jVWCw46XnvP6z1V4SforZOQXr1Om698O8fd7ke7Q7gFCr2UQjIuXliC/g8u
NREqu1kceXTeWnt0LFZB7GMOo2Edo21qYIAILyqTO50QJL2at5WLoibaM03y7I7x
GeMP1APDHJI0E5dn0v5P
=Iv72
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clock framework updates from Michael Turquette:
"The changes to the common clock framework for 4.2 are dominated by new
drivers and updates to existing ones, as usual.
There are some fixes to the framework itself and several cleanups for
sparse warnings, etc"
* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
clk: stm32: Add clock driver for STM32F4[23]xxx devices
dt-bindings: Document the STM32F4 clock bindings
cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
clk: samsung: add infrastructure to register cpu clocks
clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
doc: dt: add documentation for lpc1850-ccu clk driver
clk: add lpc18xx ccu clk driver
doc: dt: add documentation for lpc1850-cgu clk driver
clk: add lpc18xx cgu clk driver
clk: keystone: add support for post divider register for main pll
clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
clk: cygnus: remove Cygnus dummy clock binding
clk: cygnus: add clock support for Broadcom Cygnus
clk: Change bcm clocks build dependency
clk: iproc: add initial common clock support
clk: iproc: define Broadcom iProc clock binding
MAINTAINERS: update email for Michael Turquette
clk: meson: add some error handling in meson_clk_register_cpu()
...
A recent change to mark parent names as const missed this struct
member so we get warnings like:
drivers/clk/pxa/clk-pxa25x.c:122:2: warning: initialization
discards 'const' qualifier from pointer target type
Fix it.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Since commit 2893c37946 ("clk: make strings in parent name arrays
const") the name of parent clocks can be const. So add more const in
several clock drivers.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add 2 clocks which were erronously forgotten by the clock framework
port, namely :
- sa1100-rtc
- irda for pxa2xx-ir:UARTCLK
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Michael Turquette <mturquette@linaro.org>
Since pxa clocks were ported to the clock framework, an ordering issue
appears between clocks and clocksource initialization. As a consequence,
the pxa timer clock cannot be acquired in pxa_timer, and is disabled by
clock framework because it is "unused".
The ordering issue is that in the kernel boot sequence :
start_kernel()
...
time_init()
-> pxa_timer()
-> here the clocksource is initialized
...
rest_init()
kernel_init()
initcalls
-> here the clocks are initialized
In the current sequence, the clocks are initialized way after pxa_timer,
which cannot acquire the OSTIMER0 clock.
To solve this issue, the clocks initialization is moved to pxa_timer(),
so that clocks are initialized before clocksource for non device-tree.
For device-tree, the standard arm time_init() will take care of the
ordering.
Reviewed-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The statement
static const char *name[];
defines a modifiable array of pointers to constant chars. That is
*name[0] = 'f';
is forbidden, but
name[0] = "f";
is not. So marking an array that is defined as above with __initconst is
wrong. Either an additional const must be added such that the whole
definition reads:
static const char *const name[] __initconst;
or where this is not possible __initdata must be used.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
The pxa3xx scheduler relies on the pxa-timer, which requires a clock for
its rate. As the clock handling will be taken over by the clock
framework, add this missing clock.
The miss was discovered by attempting to run a zylonite platform in a
device-tree configuration, with the future patch to shift clocks
handling to clock framework applied.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Have each pxa variant (pxa25x, pxa27x, pxa3xx) have its own device-tree
clock initializing function, to be able to register its own specific
core clocks.
Apply that change specifically to pxa27x.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
As the clock descriptions are constant and only usefull at init time,
mark them as such by :
- spliting clock description (desc) and clock private data (dynamic)
- mark __initdata clock descriptions
This makes all the register and descriptions of the clocks to go after
kernel init phase.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Trivial fix to check the A bit of CCCR for memory frequency
calculations, where the shift of the bit index was missing, triggering a
wrong calculation of memory frequency.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remaining steps are
:
- pxa3xx
- once PXA is fully converted to device tree, if that happens,
clk-pxa2* and clk-pxa3* should only hold the core clocks which cannot
be described in devicetree.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Move pxa27x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add a the common code used by all PXA variants.
This is the first step in the transition from architecture defined
clocks (in arch/arm/mach-pxa) towards clock framework. The goal is to
have the same features (and not all the features) of the existing
clocks, and enable the transition of PXA to device-tree.
All PXA rely on a "CKEN" type clock, which :
- has a gate (bit in CKEN register)
- is generated from a PLL, generally divided
- has an alternate low power clock
Each variant will specialize the CKEN clock :
- pxa25x have no low power clock
- pxa27x in low power use always the 13 MHz ring oscillator
- pxa3xx in low power have specific dividers for each clock
The device-tree provides a list of CLK_* (ex: CLK_USB or CLK_I2C) to get
a handle on the clock. While pxa-clock.h will describe all the clocks of
all the variants, each variant will only use a subset of it.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Igor Grinberg