Commit Graph

414579 Commits

Author SHA1 Message Date
Florian Fainelli a4c0201e23 MIPS: update MIPS_L1_CACHE_SHIFT based on MIPS_L1_CACHE_SHIFT_<N>
All platforms that require a special MIPS_L1_CACHE_SHIFT value have been
updated, such that we can now make MIPS_L1_CACHE_SHIFT default to the
appropriate integer value based on the select MIPS_L1_CACHE_SHIFT_<N>
variable.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2014-01-24 22:39:55 +01:00
Florian Fainelli 930beb5ac0 MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>
In order to avoid keeping an ever growing list of chips which need to
select a specific MIPS_L1_CACHE_SHIFT value introduce multiple internal
and non-exposed Kconfig symbols for the various MIPS_L1_CACHE_SHIFT
values out there and update the relevant Kconfig symbols to select them.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2014-01-24 22:39:55 +01:00
Antony Pavlov dc4d7b377c MIPS: ZBOOT: gather string functions into string.c
In the worst case this adds less then 128 bytes of code
but on the other hand this makes code organization more clear.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6344/
2014-01-24 22:39:55 +01:00
Wolfram Sang dfe0924ebd arch/mips/pci: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6349/
2014-01-24 22:39:55 +01:00
Wolfram Sang 9fbf8e8880 arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6348/
2014-01-24 22:39:54 +01:00
Rafał Miłecki d5ab2adbc3 bcma: gpio: don't cast u32 to unsigned long
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6343/
2014-01-24 22:39:54 +01:00
Rafał Miłecki 7c1bc0da32 ssb: gpio: add own IRQ domain
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Michael Buesch <m@bues.ch>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6342/
2014-01-24 22:39:54 +01:00
Hauke Mehrtens 89fb3ac862 MIPS: BCM47XX: fix sparse warnings in board.c
This fixes the following sparse warnings:
arch/mips/bcm47xx/board.c:39:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:46:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:53:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:78:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:99:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:109:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:124:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:155:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:177:16: warning: Using plain integer as NULL pointer
arch/mips/bcm47xx/board.c:189:16: warning: Using plain integer as NULL pointer

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6318/
2014-01-24 22:39:54 +01:00
Hauke Mehrtens 2b3ab0efba MIPS: BCM47XX: add board detection for Linksys WRT54GS V1
This adds board detection for Linksys WRT54GS V1.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6317/
2014-01-24 22:39:53 +01:00
Hauke Mehrtens a2ffb564dd MIPS: BCM47XX: fix detection for some boards
When a nvram reset was performed from CFE, it sometimes does not
contain the productid value in nvram, but it still contains
hardware_version.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6316/
2014-01-24 22:39:53 +01:00
Rafał Miłecki 4d6dc7fdef MIPS: BCM47XX: Enable buttons support on SSB
This is supported since implementing IRQ domain in ssb.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6315/
2014-01-24 22:39:53 +01:00
Rafał Miłecki e7277e1dcc MIPS: BCM47XX: Convert WNDR4500 to new syntax
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6313/
2014-01-24 22:39:53 +01:00
Rafał Miłecki aeee3f5a4d MIPS: BCM47XX: Use "timer" trigger for status LEDs
Some devices have power LED as well as status LED. The second one is
used to show the firmware is up and running. Set "timer" trigger for
such LEDs.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6312/
2014-01-24 22:39:52 +01:00
Hauke Mehrtens 9cbeac05b6 MIPS: BCM47XX: check length of serial console array
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6310/
2014-01-24 22:39:52 +01:00
Hauke Mehrtens 978e55d2d8 bcma: prevent irq handler from firing when registered
With this patch we prevent the irq from being fired when it is
registered. The Hardware fires an IRQ when input signal XOR polarity
AND gpio mask is 1. Now we are setting polarity to a vlaue so that is
is 0 when we register it.

In addition we also set the irq mask register to 0 when the irq handler
is initialized, so all gpio irqs are masked and there will be no
unexpected irq.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6304/
2014-01-24 22:39:52 +01:00
Markos Chandras 17d97bad1a MIPS: bcm63xx: cpu: Replace BUG() with panic()
BUG() can be a noop if CONFIG_BUG is not selected,
leading to the following build problem on a randconfig:

arch/mips/bcm63xx/cpu.c: In function 'detect_cpu_clock':
arch/mips/bcm63xx/cpu.c:254:1: error: control reaches end of
non-void function [-Werror=return-type]

We fix this problem by replacing BUG() with panic() since it's
best to handle the case of an unknown board instead of silently
returning a random clock frequency.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5932/
2014-01-24 22:39:52 +01:00
Rafał Miłecki 68e30f3087 MIPS: BCM47XX: Drop WGT634U hacks
This old wgt634u.c was trying to implement a bit ugly support for
Netgear WGT634U. It provided info about LED, flash mapping & layout and
was trying to handle reset button.

This is not needed anymore as we have replacement for all this stuff.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6302/
2014-01-24 22:39:52 +01:00
Rafał Miłecki 2d0816dcb7 MIPS: BCM47XX: Import LEDs database from OpenWrt
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6298/
2014-01-24 22:39:51 +01:00
Rafał Miłecki 3be972556f MIPS: BCM47XX: Import buttons database from OpenWrt
This includes all devices from OpenWrt's "diag" that we support in arch
code (we have entries for in enum bcm47xx_board).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6301/
2014-01-24 22:39:51 +01:00
Rafał Miłecki ef1e3e7a19 MIPS: BCM47XX: Prepare support for GPIO buttons
So far this adds support for one Netgear model only, but it's designed
and ready to add many more device. We could hopefully import database
from OpenWrt.
Support for SSB is currently disabled, because SSB doesn't implement IRQ
domain yet.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6300/
2014-01-24 22:39:51 +01:00
Rafał Miłecki 515fa75d48 MIPS: BCM47XX: Prepare support for LEDs
So far this is mostly just a proof of concept, database consists of a
single device. Creating a nice iterateable array wasn't an option
because devices have different amount of LEDs. And we don't want to
waste memory just because of support for a device with dozens on LEDs.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6299/
2014-01-24 22:39:51 +01:00
Hauke Mehrtens 76b573e460 MIPS: BCM47XX: do not use cpu_wait instruction on BCM4706
The BCM4706 has a problem with the CPU wait instruction. When r4k_wait
or r4k_wait_irqoff is used will just hang and not return from a
msleep(). Removing the cpu_wait functionality is a workaround for this
problem. The BCM4716 does not have this problem.

The BCM4706 SoC uses a MIPS 74K V4.9 CPU.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6288/
2014-01-24 22:39:51 +01:00
Hauke Mehrtens 7da4b6f8ff MIPS: BCM47XX: print board name in machine entry in cpuinfo
This will add the board name to the machine entry in /proc/cpuinfo.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5864/
2014-01-24 22:39:51 +01:00
Jayachandran C e92e1d0d78 MIPS: Netlogic: Core wakeup improvements
Move wakeup to after early console. This will allow us to display error
messages when cores are not woken up.  Also reduce the wait time for core
to come up.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6303/
2014-01-24 22:39:50 +01:00
Jayachandran C 194d315da8 MIPS: Netlogic: Remove XLR early serial setup
The early serial code is not needed because we already have early
printk support provided by common/earlycons.c

This change also fixes the following build error that occurs when
CONFIG_SERIAL_8250 is not configured for Netlogic XLR boards:

arch/mips/built-in.o: In function `nlm_early_serial_setup':
setup.c:(.init.text+0x274): undefined reference to `early_serial_setup'
make: *** [vmlinux] Error 1

Reported-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6083/
2014-01-24 22:39:50 +01:00
Jayachandran C a17fca649c MIPS: Netlogic: Add default DTB for XLP9XX SoC
Add a default device tree fie for XLP9XX boards, and add code to use
this device tree if no DTB is passed to the kernel.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6287/
2014-01-24 22:39:50 +01:00
Jayachandran C 5fcbdf7cac MIPS: Netlogic: XLP9XX PIC OF support
Support for adding legacy IRQ domain for XLP9XX. The node id of the
PIC has to be calulated differently for XLP9XX.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6286/
2014-01-24 22:39:50 +01:00
Ganesan Ramalingam 3262b21ef8 MIPS: Netlogic: XLP9XX USB support
XLP9XX has a USB 3.0 controller on-chip with 2 xHCI ports. The USB
block is similar to the one on XLP2XX, so update usb-init-xlp2.c
to handle XLP9XX as well.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6285/
2014-01-24 22:39:49 +01:00
Jayachandran C b6ba1c5294 MIPS: PCI: Netlogic XLP9XX support
Add PCI support for Netlogic XLP9XX. The PCI registers and
SoC bus numbers have changed in XLP9XX.

Also skip a few (bus,dev,fn) combinations which have issues when
read.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6284/
2014-01-24 22:39:49 +01:00
Jayachandran C 98d4884ca5 MIPS: Netlogic: Add cpu to node mapping for XLP9XX
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX.
Update code that calculates node id from cpu id to handle this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6283/
2014-01-24 22:39:49 +01:00
Jayachandran C e7aa6c66b0 MIPS: Netlogic: XLP9XX bridge and DRAM code
Update bridge code. Add code to the XLP9XX registers for DRAM
size, limit and node when running on XLPXX

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6282/
2014-01-24 22:39:49 +01:00
Jayachandran C 61673de131 MIPS: Netlogic: XLP9XX UART offset
Update IO offset of the early console UART.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6281/
2014-01-24 22:39:48 +01:00
Jayachandran C 861c056953 MIPS: Netlogic: SYS block updates of XLP9XX
Add the SYS block registers for XLP9XX, most of them have changed.
The wakeup sequence has been updated to set the coherent mode from
the main thread rather than the woken up thread.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6280/
2014-01-24 22:39:48 +01:00
Jayachandran C d150cef4e8 MIPS: Netlogic: XLP9XX PIC updates
Functions for the XLP9XX interrupt table entry format and other PIC
register changes.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6279/
2014-01-24 22:39:48 +01:00
Jayachandran C 5513c760db MIPS: Netlogic: update iomap.h for XLP9XX
Most IO block offsets have changed in XLP9XX. Update iomap.h to add the
new addresses of different SoC blocks like PIC, SYS, UART etc. that are
needed by the base code.

On XLP9xx, the SoC blocks of other nodes are seen on a PCI bus
corresponding to the node. Update iomap code to reflect this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6277/
2014-01-24 22:39:48 +01:00
Jayachandran C 8907c55e72 MIPS: Netlogic: Identify XLP 9XX chip
Adds processor ID of XLP 9XX to asm/cpu.h.  Update netlogic/xlp-hal/xlp.h
to add cpu_is_xlp9xx() and to update cpu_is_xlpii() to support XLP 9XX.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6274/
2014-01-24 22:39:48 +01:00
Jayachandran C db038feedd MIPS: Netlogic: Get coremask from FUSE register
Use the FUSE register to get the list of active cores in the CPU
instead of using the CPU reset register, this is the recommended
method.

Also add code to mask the coremask with the default number of cores
for each processor series.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6275/
2014-01-24 22:39:47 +01:00
Jayachandran C cfec4c63f5 MIPS: Netlogic: Add macro for node present
Add macro nlm_node_present() that can be used to check if a node is present
in a multi-chip configuration. This can be used even when NUMA is not enabled.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6272/
2014-01-24 22:39:47 +01:00
Yonghong Song ed8dfc46e0 MIPS: Netlogic: L1D cacheflush before thread enable on XLPII
On XLPII CPUs, the L1D cache has to be flushed with regular cache
operations before enabling threads in a core.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6276/
2014-01-24 22:39:47 +01:00
Jayachandran C d3b9428502 MIPS: Netlogic: Some cleanups for assembly code
No change in logic, the changes are:
* cleanup some whitespace and comments
* remove confusing argument of SYS_CPU_COHERENT_BASE macro
* make the numerical labels in macros consistent

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6273/
2014-01-24 22:39:47 +01:00
Jayachandran C ce59d0f7fe MIPS: Netlogic: Add topology.h for XLP family
Add mach-netlogic/topology.h which contains XLP cpu number to core and
node mapping.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6271/
2014-01-24 22:39:47 +01:00
Jayachandran C c24a8a7a99 MIPS: Netlogic: Add MSI support for XLP
Add MSI chip and MSIX chip definitions.

For MSI, we map the link interrupt to a MSI link IRQ which will
do a second level of dispatch based on the MSI status register.

The MSI chip definitions use the MSI enable register to enable
and disable the MSI irqs.

For MSI-X, we split the 32 available MSI-X vectors across the
four PCIe links (8 each). These PIC interrupts generate an IRQ
per link which uses a second level dispatch as well.

The MSI-X chip definition uses the standard functions to enable
and disable interrupts.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6270/
2014-01-24 22:39:46 +01:00
Deng-Cheng Zhu 27547abf36 MIPS: malta: Incorporate PIIX4 ACPI I/O region in PCI controller resources
Boot log says:

pci 0000:00:0a.3: no compatible bridge window for [io  0x1000-0x103f]
pci 0000:00:0a.3: no compatible bridge window for [io  0x1100-0x110f]

The io resource starting point on Malta was modified by c5de50dada (MIPS:
Malta: Change start address to avoid conflicts.) to avoid conflicts with
ACPI and SMB devices. In fact, that was not needed (and now causing
southbridge ACPI missing) since 166c637075 (PCI: add pci_create_root_bus()
that accepts resource list) and 7c090e5bfa (mips/PCI: convert to
pci_scan_root_bus() for correct root bus resources) had already done the
correct fix.

This patch actually reverts the change made by c5de50dada. And with this
fix, log says:

pci 0000:00:0a.3: quirk: [io  0x1000-0x103f] claimed by PIIX4 ACPI
pci 0000:00:0a.3: quirk: [io  0x1100-0x110f] claimed by PIIX4 SMB

These things may not be used but as part of platform resources are better
off to be included.

Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6037/
2014-01-24 22:39:46 +01:00
Aaro Koskinen 41315b6ec1 MIPS: /proc/cpuinfo: always print the supported ISA
Currently the supported ISA is only printed on the latest architectures.
Print it also on legacy platforms.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6295/
2014-01-24 22:39:46 +01:00
Apelete Seketeli c330fd90b1 MIPS: jz4740: update platform data for JZ4740 usb device controller
The platform data already available in tree for JZ4740 USB Device
Controller was previously used by an out-of-tree USB gadget driver
which was not relying on the musb driver and was written by Ingenic
and the Qi-Hardware community.

Update platform data for JZ4740 USB device controller to be used with
musb driver.

Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6265/
2014-01-24 22:39:46 +01:00
Eunbong Song 14a17836ca MIPS: Kill CONFIG_MTD_PARTITIONS
This patch removes CONFIG_MTD_PARTITIONS in config files for MIPS.
 Because CONFIG_MTD_PARTITIONS was removed by commit 6a8a98b22b.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6162/
Signed-off-by: Eunbong Song <eunb.song@samsung.com>
2014-01-24 22:39:45 +01:00
Paul Burton a3056b1ca5 MIPS: replace open-coded init_dsp
There is already an init_dsp function which checks cpu_has_dsp & calls
__init_dsp if it does. Make use of it instead of duplicating the same
code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6148/
2014-01-24 22:39:45 +01:00
Paul Burton 8c0f8ab0e9 MIPS: clean up resume declaration
This patch cleans up the declaration of the resume function by replacing
void pointers with their correct types. The irrelevant & incorrect
comment preceeding the resume function is replaced by one documenting
its function.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6146/
2014-01-24 22:39:45 +01:00
Apelete Seketeli f0c0c2a81d MIPS: qi_lb60: add defconfig for Ben NanoNote
Add defconfig for the Ben NanoNote handheld computer which is built
around QI_LB60 board and Ingenic JZ4740 MIPS SoC.

Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6257/
2014-01-24 22:39:45 +01:00
Rafał Miłecki 2997609eb4 bcma: gpio: add own IRQ domain
Input GPIO changes can generate interrupts, but we need kind of ACK for
them by changing IRQ polarity. This is required to stop hardware from
keep generating interrupts and generate another one on the next GPIO
state change.
This code allows using GPIOs with standard interrupts and add for
example GPIO buttons support.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6216/
2014-01-23 13:02:37 +01:00