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3 Commits

Author SHA1 Message Date
Mark Brown c8532db7f2 [ARM] 5411/1: S3C64XX: Fix EINT unmask 
Currently the unmask function for EINT interrupts was setting the mask
bit rather than clearing it.  This was also previously reported and
fixed by Kyungmin Park <kyungmin.park@samsung.com> and others.

Acked-By: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 2009-02-24 19:12:31 +00:00
Matt Hsu a9c5d23ac7 [ARM] S3C64XX: Correct the EINT IRQ type configuration 
Select the correct EINT configuration register when configuring
the external interrupt level/edge type.

Signed-off-by: Matt Hsu <matt_hsu@openmoko.org>
[ben-linux@fluff.org: description improvement]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
 2008-12-16 10:19:26 +00:00
Ben Dooks 80789e7915 [ARM] S3C64XX: Add IRQ_EINT support 
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.

Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
 2008-12-15 23:15:46 +00:00