Commit Graph

1 Commits

Author SHA1 Message Date
Sergei Shtylyov 1fa8a875df clk: renesas: Add r8a7745 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:13:30 +01:00