Added a support to set cpu affinity mask for each MSIX vector enabled
by the HBA. So that, running the irqbalancer will balance interrupts among
the cpus.
Change_set:
1. Added affinity_hint varable of type cpumask_var_t in adapter_reply_queue
structure. And allocated a memory for this varable by calling
alloc_cpumask_var.
2. Call the API irq_set_affinity_hint for each MSIx vector to affiniate it
with calculated cpus at driver inilization time.
3. While freeing the MSIX vector, call this same API to release the cpu
affinity mask for each MSIx vector by providing the NULL value in
cpumask argument.
4. then call the free_cpumask_var API to free the memory allocated in step 2.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Copyright, Trademark & Confidentiality legal statements throughout the
source code changed from LSI to Avago.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Change Set:
1. Extended the upper boundary restriction for the module parameter
max_sgl_entries. Earlier, the max_sgl_entries was capped at the
SCSI_MAX_SG_SEGMENTS kernel definition. With this change, the user
would be able to set the max_sgl_entries to any value which is
greater than SCSI_MAX_SG_SEGMENTS and less than the minimum of
SCSI_MAX_SG_CHAIN_SEGMENTS & hardware limit (Calculated using
IOCFacts's MaxChainDepth).
2. Added a print for the message log whenever the user sets the
max_sgl_entries to a value greater than SCSI_MAX_SG_SEGMENTS to
warn about the kernel definition overriding.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
This patch will log a message when driver receives "Temperature Threshold
exceeded" event from any temperature sensor.
The message will look similar to like:
mpt3sas0: Temperature Threshold flags a b c d exceeded for Sensor: x !!!
mpt3sas0: Current Temp In Celsius: y
where a b c d are threshold flags 0 1 2 3
Change_set:
1. Get the number of sensor count of this IOC by reading IO Unit page 8 at
driver initialization time.
2. Also unmask the Temperature Threshold Event at driver initialization
time
3. Whenever a MPI2_EVENT_TEMP_THRESHOLD event is received from the
firmware, then print the sensor number, the maximum threshold number it
has exceed and the current temperature of this sensor.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
The "issue_reset" can be used uninitialized. It should be set to false
at the start.
Also I cleaned up the types a little by using bool.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Up to now, Driver allocates a single contiguous block of memory
pool for all reply queues and passes down a single address in the
ReplyDescriptorPostQueueAddress field of the IOC Init Request
Message to the firmware.
When firmware receives this address, it will program each of the
Reply Descriptor Post Queue registers, as each reply queue has its
own register. Thus the firmware, starting from a base address it
determines the starting address of the subsequent reply queues
through some simple arithmetic calculations.
The size of this contiguous block of memory pool is directly proportional
to number of MSI-X vectors and the HBA queue depth. For example higher
MSIX vectors requires larger contiguous block of memory pool.
But some of the OS kernels are unable to allocate this larger
contiguous block of memory pool.
So, the proposal is to allocate memory independently for each
Reply Queue and pass down all of the addresses to the firmware.
Then the firmware will just take each address and program the value
into the correct register.
When HBAs with older firmware(i.e. without RDPQ capability) is used
with this new driver then the max_msix_vectors value would be set
to 8 by default.
Change set in v1:
1. Declared the _base_get_ioc_facts() functions at the beginning of the mpt3sas_base.c file
instead of moving all these functions before mpt3sas_base_map_resources() function
a. _base_wait_for_doorbell_int()
b. _base_wait_for_doorbell_ack()
c. _base_wait_for_doorbell_not_used()
d. _base_handshake_req_reply_wait()
e. _base_get_ioc_facts()
2. Initially set the consistent DMA mask to 32 bit and then change it to 64 bit mask
after allocating RDPQ pools by calling the function _base_change_consistent_dma_mask.
This is to ensure that all the upper 32 bits of RDPQ entries's base address to be same.
3. Reduced the redundancy between the RDPQ and non-RDPQ support in these following functions
a. _base_release_memory_pools()
b. _base_allocate_memory_pools()
c. _base_send_ioc_init()
d. _base_make_ioc_operational()
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Copyright in driver sources is updated for year the 2014.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
As result of deprecation of MSI-X/MSI enablement functions
pci_enable_msix() and pci_enable_msi_block() all drivers
using these two interfaces need to be updated to use the
new pci_enable_msi_range() or pci_enable_msi_exact()
and pci_enable_msix_range() or pci_enable_msix_exact()
interfaces.
Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Cc: Nagalakshmi Nandigama <Nagalakshmi.Nandigama@lsi.com>
Cc: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Cc: support@lsi.com
Cc: DL-MPTFusionLinux@lsi.com
Cc: linux-scsi@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Christoph Hellwig <hch@lst.de>
In _scsih_probe, delay the call to scsi_add_host until the host has been
fully set up.
Otherwise, the default .can_queue value of 1 causes scsi-mq to set the block
layer request queue size to its minimum size, resulting in awful performance.
In _scsih_probe error handling, call mpt3sas_base_detach rather than
scsi_remove_host to properly clean up in reverse order.
In _scsih_remove, call scsi_remove_host earlier to clean up in reverse order.
Signed-off-by: Robert Elliott <elliott@hp.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Nagalakshmi Nandigama <Nagalakshmi.Nandigama@avagotech.com>
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
On systems with a non power-of-two CPU count the existing MSI-X grouping
code failed to distribute interrupts correctly. Rework the code to
handle arbitrary processor counts.
Also remove the hardcoded upper limit on the number of processors so we
can boot on large systems.
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Acked-by: Sreekanth Reddy <Sreekanth.reddy@avagotech.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Race conditions are theoretically possible between the MPT PCI device
removal and the generic PCI bus rescan and device removal that can be
triggered via sysfs.
To avoid those race conditions make the MPT PCI code use
pci_stop_and_remove_bus_device_locked().
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Added a driver module parameter max_msix_vectors. Using this module parameter
the maximum number of MSI-X vectors could be set.
The number of MSI-X vectors used would be the minimum of MSI-X vectors
supported by the HBA, the number of CPU cores and the value set to
max_msix_vectors module parameter.
The default value of this module parameter is set to 8. The default value of
this parameter is set to 8 inorder to reduce the amount of memory required for
Reply Descriptor Post queue. This is because with the higher MSI-X vectors,
some times kernel is not able to allocate the requested amount of memory and
crash is observed. To overcome this problem, the default value is set to 8.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
If mpt3sas_base_map_resources takes an early error path then its
counterpart, mpt3sas_base_free_resources needs to be careful about
cleaning up:
1 - _base_mask_interrupts and _base_make_ioc_ready require memory
mapped I/O registers, make sure that this is true.
2 - _base_free_irq iterates over the adapter's reply_queue_list, so
move this list head initialization out of _base_enable_msix to
_scsih_probe so this will always be safe.
3 - check that the controller PCI device and its BARs have been
enabled before disabling them.
Signed-off-by: Joe Lawrence <joe.lawrence@stratus.com>
Acked-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Hardware timing requirements is updated in order to comply with firmware
requirement.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
The Copyright String in all mpt3sas files are changed to 2012-2013.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
The variable 'chain_flags' and 'phy_number' are initialized but never used
otherwise, So remove those unused variables.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
linux/version.h is not necessary as detected by checkversion.pl script.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: "Sreekanth Reddy" <Sreekanth.reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
These driver files are initially, substantially similar to mpt2sas but,
because mpt2sas is going into maintenance mode and mp3sas will become heavily
developed, we elected to keep the code bases separate.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Reviewed-by: Nagalakshmi Nandigama <Nagalakshmi.Nandigama@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Sreekanth Reddy