Commit Graph

9 Commits

Author SHA1 Message Date
John Crispin f1f0ceaada MIPS: Lantiq: Add etop board support
Register the etop platform device inside the machtype specific init code.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2356/
Patchwork: https://patchwork.linux-mips.org/patch/2370/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:43 +01:00
John Crispin 504d4721ee MIPS: Lantiq: Add ethernet driver
This patch adds the driver for the ETOP Packet Processing Engine (PPE32)
found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit
ethernet work. Support for all 8 dma channels, gbit and the embedded switch
found on the ar9/vr9 still needs to be implemented.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2357/
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:43 +01:00
John Crispin dfec1a827d MIPS: Lantiq: Add DMA support
This patch adds support for the DMA engine found inside the XWAY family of
SoCs. The engine has 5 ports and 20 channels.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2355/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:43 +01:00
John Crispin 935c500c37 MIPS: Lantiq: Add more gpio drivers
The XWAY family allows to extend the number of gpios by using shift
registers or latches. This patch adds the 2 drivers needed for this. The
extended gpios are output only.

[ralf@linux-mips.org: Fixed ltq_stp_probe section() attributes.]

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2258/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:42 +01:00
John Crispin 973c32eb7f MIPS: Lantiq: Add machtypes for lantiq eval kits
This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation
boards

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2255/
Patchwork: https://patchwork.linux-mips.org/patch/2361/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:42 +01:00
John Crispin a053ac1702 MIPS: Lantiq: Add mips_machine support
This patch adds support for Gabor's mips_machine patch.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2251/
Patchwork: https://patchwork.linux-mips.org/patch/2358/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:42 +01:00
John Crispin 24aff71fa8 MIPS: Lantiq: Add platform device support
This patch adds the wrappers for registering our platform devices.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2254/
Patchwork: https://patchwork.linux-mips.org/patch/2360/
Patchwork: https://patchwork.linux-mips.org/patch/2359/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:42 +01:00
John Crispin 8ec6d93508 MIPS: Lantiq: add SoC specific code for XWAY family
Add support for the Lantiq XWAY family of Mips24KEc SoCs.

* Danube (PSB50702)
* Twinpass (PSB4000)
* AR9 (PSB50802)
* Amazon SE (PSB5061)

The Amazon SE is a lightweight SoC and has no PCI as well as a different
clock. We split the code out into seperate files to handle this.

The GPIO pins on the SoCs are multi function and there are several bits
we can use to configure the pins. To be as compatible as possible to
GPIOLIB we add a function

int lq_gpio_request(unsigned int pin, unsigned int alt0,
        unsigned int alt1, unsigned int dir, const char *name);

which lets you configure the 2 "alternate function" bits. This way drivers like
PCI can make use of GPIOLIB without a cubersome wrapper.

The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was
taken from a 2.4.20 source tree and was never really changed by me since then.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2249/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:41 +01:00
John Crispin 171bb2f19e MIPS: Lantiq: Add initial support for Lantiq SoCs
Add initial support for Mips based SoCs made by Lantiq. This series will add
support for the XWAY family.

The series allows booting a minimal system using a initramfs or NOR. Missing
drivers and support for Amazon and GPON family will be provided in a later
series.

[Ralf: Remove some cargo cult programming and fixed formatting.]

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2252/
Patchwork: https://patchwork.linux-mips.org/patch/2371/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19 09:55:41 +01:00