The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
dual colour LED and an optical S/PDIF connector.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The datasheet provided by Allwinner requires oscillators with an accuracy
of 50ppm. Add it to our fixed clocks so that we can properly track the
accuracy chain.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
So far, the LOSC was generated through the RTC internal oscillator, which
was a pretty poor and inaccurate choice.
Now that the RTC properly exposes its internal mux between its oscillator
and the external oscillator, we can use it were relevant.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Lichee Pi Zero is a small-sized V3s board, which is
breadboard-compatible, and with a MicroUSB port with both OTG function
and power function.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As we have the pinctrl and clock support for the V3s SoC, it's now to
run a mainline Linux on it.
So add a .dtsi file for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
[Maxime: Removed the dependency on the CCU headers]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since v4.10-rc1, the following logs appears in loop :
[ 801.953836] usb usb6-port1: Cannot enable. Maybe the USB cable is bad?
[ 801.960455] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
[ 801.966611] usb usb6-port1: cannot disable (err = -32)
[ 806.083772] usb usb6-port1: Cannot enable. Maybe the USB cable is bad?
[ 806.090370] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
[ 806.096494] usb usb6-port1: cannot disable (err = -32)
After analysis, xhci try to set link in U3 and returns an error.
Using snps,dis_u3_susphy_quirk fix this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The register ARM_L2_OPTION (0x2608 in Exynos4 and Exynos5 PMU) was
defined twice. Both names were used in the Exynos542x code. Simplify
this.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The phyCORE-AM335x development kit is a combination of the
phyCORE-AM335x SoM and a PCM-953 carrier board. The features
of the PCM-953 are:
* ETH phy on carrier board: 1x RGMII
* 1x CAN
* Up to 4x UART
* USB0 (otg)
* USB1 (host)
* SD slot
* User gpio-keys
* User LEDs
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch moves pad retention control from S5PV210 machine code to
Exynos pin controller driver. This helps to avoid possible ordering
and logical dependencies between machine and pin control code. Till
now it worked fine only because sys_ops for machine code and pin
controller were called in registration order.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
For mach-s5pv210:
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch moves pad retention control from PMU driver to Exynos pin
controller driver. This helps to avoid possible ordering and logical
dependencies between machine, PMU and pin control code. Till now it
worked fine only because sys_ops for PMU and pin controller were called
in registration order.
This is also a preparation for adding new features to Exynos pin
controller driver, like runtime power management and suspending
individual pin controllers, which might be a part of some power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On the Arria10, because of hardware bug, watchdog0 cannot reliably trigger
a reset to the CPU. The workaround would be to use watchdog1 instead.
Also for watchdog1, there is a dependency on the bootloader to enable the
boot_clk source to be from the cb_intosc_hs_clk/2, versus from EOSC1. This
corresponds to the (SWCTRLBTCLKEN & SWCTRLBTCLKSEL) bits enabled in the
control register in the clock manager module of Arria10.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add a file to debugfs to read the in-kernel state of the vgic. We don't
do any locking of the entire VGIC state while traversing all the IRQs,
so if the VM is running the user/developer may not see a quiesced state,
but should take care to pause the VM using facilities in user space for
that purpose.
We also don't support LPIs yet, but they can be added easily if needed.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This corrects the pinmux for accessing the TPM over the I2C line. Thus,
it allows correctly probing the module, that previously failed with I2C
errors.
Signed-off-by: Jerome Coste <jerome.coste@etu.utc.fr>
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This corrects the pinmux for accessing the TPM over the I2C line. Thus,
it allows correctly probing the module, that previously failed with I2C
errors.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Depthcharge (the payload used with cros devices) will attempt to detect
boards using their revision. This includes all the known revisions for
the nyan-blaze board so that the dtb can be selected preferably.
Defining compatibly revisions allows depthcharge to select the kernel
via the revision it detects instead of using the default kernel. This
allows having a FIT image with multiple kernels for multiple devices.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Depthcharge (the payload used with cros devices) will attempt to detect
boards using their revision. This includes all the known revisions for
the nyan-big board so that the dtb can be selected preferably.
Defining compatibly revisions allows depthcharge to select the kernel
via the revision it detects instead of using the default kernel. This
allows having a FIT image with multiple kernels for multiple devices.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nyan boards come with an embedded controller that controls when to
enable and disable the charge. Thus, it should not be left up to the
kernel to handle that.
Using the ti,external-control property allows specifying this use-case.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This switches a few interrupt definitions that were using
GPIO_ACTIVE_HIGH as IRQ type, which is invalid.
This is mostly a cosmetic change, that doesn't affect any driver.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Card insertion and removal currently goes undetected. AFAIK there's no
way to generate interrupts on card changes in this slot, so use polling.
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Current U-Boot enables the display already. Marking the regulator as
enabled on boot fixes sporadic panel initialization failures.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Tested-by: Misha Komarovskiy <zombah@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Placement of attributes, such as __initdata, is standardized through the
checkpatch script. Fix up this instance to make checkpatch happy.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now with the new V1.1A HW card detect being implemented update resp.
compatibility information.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function
without any pull-up/down.
Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW.
Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka
not tristated and input driver enabled as well as it features some
magic properties even though the external loopback is disabled and the
internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's
SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is
now a not-connect on V1.1 HW in order to avoid any interference.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
These files were only including module.h for exception table
related functions. We've now separated that content out into its
own file "extable.h" so now move over to that and avoid all the
extra header content in module.h that we don't really need to compile
these files.
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Introduce a new architecture-specific get_arch_dma_ops() function
that takes a struct bus_type * argument. Add get_dma_ops() in
<linux/dma-mapping.h>.
Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Cc: x86@kernel.org
Signed-off-by: Doug Ledford <dledford@redhat.com>
Now that all set_dma_ops() implementations are identical (ignoring
BUG_ON() statements), remove the architecture specific definitions
and add a definition in <linux/dma-mapping.h>.
Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Chris Metcalf <cmetcalf@mellanox.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Paul Mackerras <paulus@samba.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Some but not all architectures provide set_dma_ops(). Move dma_ops
from struct dev_archdata into struct device such that it becomes
possible on all architectures to configure dma_ops per device.
Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Cc: x86@kernel.org
Signed-off-by: Doug Ledford <dledford@redhat.com>
The 'mpurate' option, historically used for specifying an initial
MPU rate at boot, no longer has any effect due to the supporting
code being removed as it was 'wrong and dangerous' [1].
This patch removes the remaining dead code associated with the
__setup macros to avoid confusion and reduce bloat.
[1] https://patchwork.kernel.org/patch/5954631/
Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The phyCORE-AM335x SoM has a RV4162 RTC populated which is supported
by the M41T80 driver. Enabled it so make the RTC support on the SoM
available.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The phyCORE-AM335x SoM with PCM-953 carrierboard has a
KSZ9021 phy mounted. To add support for this we need to enable
the micrell phy driver in the config.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable EXT4_FS to have rootfs in EXT[2-4].
Other changes are result of savedefconfig keeping minimal config (even
without enabling EXT4_FS, these would be present).
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 7f107887d1 ("ARM: dts: imx: Remove skeleton.dtsi") causes boot
issues when the bootloader does not create a 'chosen' node if such node
is not present in the dtb.
The reason for the boot failure is well explained by Javier Martinez
Canillas: "the decompressor relies on a pre-existing chosen node to be
available to insert the command line and merge other ATAGS info."
, so pass an empty 'chosen' node to fix the boot problem.
This issue has been seen in the kernelci reports with Barebox as
bootloader.
Also pass the 'memory' node in order to fix boot issues on the SolidRun
iMX6 platforms.
Fixes: 7f107887d1 ("ARM: dts: imx: Remove skeleton.dtsi")
Reported-by: kernelci.org bot <bot@kernelci.org>
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
DRA72 and DRA718 EVM boards has a pcf8575 gpio expander
which is used for the LCD/LEDs and USB vbus detection.
Add the node for the pcf8575.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add skeleton pdata-quirks for davinci.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: move changes to build pdata-quirks.c and call
to pdata_quirks_init() to this patch]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The GNU assembler for ARM version 2.22 or older fails to infer the
element size from the vmov instructions, and aborts the build in
the following way;
.../aes-neonbs-core.S: Assembler messages:
.../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1h[1],r10'
.../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1h[0],r9'
.../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1l[1],r8'
.../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1l[0],r7'
.../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2h[1],r10'
.../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2h[0],r9'
.../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2l[1],r8'
.../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2l[0],r7'
Fix this by setting the element size explicitly, by replacing vmov with
vmov.32.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Now that we have a driver for the GR8, we can convert our DT to it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have drivers for all of them, convert all the SoCs that share
the sun5i DTSI to the new CCU driver.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
GPIO4_11 is on pin 152(MX6DL_PAD_KEY_ROW2) and not on pin
151(MX6DL_PAD_KEY_ROW1).
I found the error while booting a mainline kernel on APF6S SoM and
noticed the following message:
[ 2.609337] imx6dl-pinctrl 20e0000.iomuxc: pin MX6DL_PAD_KEY_ROW1
already requested by 20a8000.gpio:105; cannot claim for 20a8000.gpio:107
[ 2.621884] imx6dl-pinctrl 20e0000.iomuxc: pin-151 (20a8000.gpio:107)
status -22
[ 2.629303] spi_imx 2008000.ecspi: Can't get CS GPIO 107
With this patch, the message is gone and spi_imx driver probes correctly.
Fixes: bb728d662b ("ARM: dts: add gpio-ranges property to iMX GPIO controllers")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Link the ARM GIC to the INTC-SYS module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fixed code indent tabs in respective imx6qdl dtsi files and
also add space on imx6qdl-icore-rqs.dtsi on usdhc bus-width nodes.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ZII Dev Rev C board has EEPROMs hanging the 88E6390 Ethernet switch
chips. Add an "eeprom-length" property to allow access from ethtool.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A bugfix added a new local variable that is only used inside of an #ifdef
section, and unused if CONFIG_PERF_EVENTS is disabled:
arch/arm/mach-imx/mmdc.c:63:25: warning: 'cpuhp_mmdc_state' defined but not used [-Wunused-variable]
This moves the variable down inside that same ifdef.
Fixes: a051f220d6 ("ARM/imx/mmcd: Fix broken cpu hotplug handling")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Apart from the already enabled Designware HDMI port, the Utilite Pro
has a second display pipeline which has the following shape:
IPU1 DI0 --> Parallel display --> tfp410 rgb24 to DVI encoder
--> HDMI connector.
Enable support for it.
In addition, since this pipeline is hardwired to IPU1, sever the link
between IPU1 and the SoC-internal Designware HDMI encoder forcing the
latter to be connected to IPU2 instead of IPU1. Otherwise, it is not
possible to drive both displays at high resolution due to the bandwidth
limitations of a single IPU.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable DMA on uart1 to get a more reliable console.
Cc: stable <stable@vger.kernel.org> #v4.3+
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The Pro4 SoC has 2 slots of SD controllers, so 2 pin-mux nodes
(SD and SD1) are needed. The other SoCs have only 1 SD slot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
ARM:
- Fix for timer setup on VHE machines
- Drop spurious warning when the timer races against the vcpu running
again
- Prevent a vgic deadlock when the initialization fails (for stable)
s390:
- Fix a kernel memory exposure (for stable)
x86:
- Fix exception injection when hypercall instruction cannot be patched
-----BEGIN PGP SIGNATURE-----
iQEcBAABCAAGBQJYglwIAAoJEED/6hsPKofoZp0H+gLLEeKP0Mu+olXiOWjB/KFp
WBDAR1872xIjvEcOl9l6AZgdmp2hk7KW1t+kJj5npgu237v6fHBO9ybqrAfhfU4l
PH23zOebL15HINcwCK6OcxOTiOtgae5Nui1cnLJBHDQgPTC/VmIE8NgV/qrMyo2r
Vth+K/cBLKiWG9JhyQvxmrfupNJUknLSH7CTnlO/fC8GEJzDfMpUl7B1Ui0TGK53
ExVgVLg3F28SErj9bUU8y4VJhMrwDAf2Kx2BNHqDbzXMzTdp0LrGRymFLl2/Gxez
zLtZDfGYYzEhPp1NuDydlxLb8ymnsQNB7K6Kau0w9JoAvOYwfUYfDt+GaTegwYM=
=dPtS
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
"ARM:
- Fix for timer setup on VHE machines
- Drop spurious warning when the timer races against the vcpu running
again
- Prevent a vgic deadlock when the initialization fails (for stable)
s390:
- Fix a kernel memory exposure (for stable)
x86:
- Fix exception injection when hypercall instruction cannot be
patched"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: s390: do not expose random data via facility bitmap
KVM: x86: fix fixing of hypercalls
KVM: arm/arm64: vgic: Fix deadlock on error handling
KVM: arm64: Access CNTHCTL_EL2 bit fields correctly on VHE systems
KVM: arm/arm64: Fix occasional warning from the timer work function
Allwinner V3s is a low-end single-core Cortex-A7 SoC, with 64MB
integrated DRAM, and several peripherals.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Hwmod core tries to reset and idles each IP that is registered with hwmod.
In case of earlycon, that specific uart IP cannot be reset or keep it in
idle state else earlycon hangs once hwmod resets that uart IP. So add support
to not reset uart that is being used as earlycon only if CONFIG_SERIAL_EARLYCON
is enabled.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add stdout-path property in /chosen node so that earlycon can be
used by just adding earlycon in bootargs.
Tested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add stdout-path property in /chosen node so that earlycon can be
used by just adding earlycon in bootargs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add stdout-path property in /chosen node so that earlycon can be
used by just adding earlycon in bootargs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add stdout-path property in /chosen node so that earlycon can be
used by just adding earlycon in bootargs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the ISL29023 ALS connected via the I2C bus.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the 16-Bit I/O Expander connected via the I2C bus.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the BQ32000 Real Time Clock connected to the I2C bus
and disable the AM335x Real Time Clock.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the 32Mb Serial Flash Memory connected to SPI0
and using CS1.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The UART1 is connected to the infrared (IR) receiver module, so enable it
to be able to comunicate with it.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
I2C1 is not used so remove it in order to avoid conflicts.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP36/37 families are similar, but there are a few features sections
that can help identify some of them. Let's add checks for 3630/3730,
OMAP3621, DM3725, OMAP3615/DM3715, OMAP3611, and AM3703 all based on
features similar to what was done for the OMAP34xx/35xx series
The checkpatch flags some warnings for braces, but I kept the coding style
to match the adjacent code for consistency.
I don't have an OMAP36xx to test, but this was tested on both a DM3730 and
AM3703.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the commit ca43ea345d ("ARM: OMAP2+: hwmod: Add a new
flag to handle SIDLE in SWSUP only in active"), UART IP needs the sidle
mode to be controlled in SW only while they are active. Once inactive,
the IP needs to be put back in HW control so they are also wakeup
capable. The flag HWMOD_SWSUP_SIDLE takes care of this. So add this flag
to all instances of UART.
With this change, 8250 UART now gives out proper RX Timeout interrupts
and is usable as console.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since the hip01 doesn't support cpu hotplug now, and doesn't implement
the hip01_cpu_die function, drop the declaration.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch enables RTC on stm32f429-disco with LSI as clock source because
X2 crystal for LSE is not fitted by default.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch include auxiliary clock definition (clocks which are not derived
from system clock.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch adds an external I2S clock in the DT.
The I2S clock could be derived from an external I2S clock or by I2S pll.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Enable analog to digital converter on stm32f429i-eval board.
It has on-board potentimeter wired to ADC3 in8 analog pin and
uses fixed regulator to provide reference voltage.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch adds USART3 pin configuration on PB10/PA11 pins
for STM32F469I-DISCO board.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch fix memory size to support 16MB of external SDRAM.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This enables the iio subsystem. This will be used by LEGO MINDSTORMS EV3,
which has an ADS7957 chip.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds a device tree definition file for LEGO MINDSTORMS EV3.
What is working:
* Pin muxing
* Pinconf
* GPIOs
* MicroSD card reader
* UART on input port 1
* Buttons
* LEDs
* Poweroff/reset
* Flash memory
* EEPROM
* USB host port
* USB peripheral port
What is not working/to be added later:
* Speaker - have patch submitted to get pwm-beeper working - maybe someday
it will have a real sound driver that uses PRU
* A/DC chip - have driver submitted and accepted - waiting for ack on
device tree bindings
* Display - waiting for "simple DRM" to be mainlined
* Bluetooth - needs new driver for sequencing power/enable/clock
* Input and output ports - need some sort of new phy or extcon driver as
well as PRU UART and PRU I2C drivers
* Battery indication - needs new power supply driver
Note on flash partitions:
These partitions are based on the official EV3 firmware from LEGO. It is
expected that most users of the mainline kernel on EV3 will be booting from
an SD card while retaining the official firmware in the flash memory.
Furthermore, the official firmware uses an ancient U-Boot (2009) that has
no device tree support. So, it makes sense to have this partition table in
the EV3 device tree file. In the unlikely case that anyone does create
their own firmware image with different partitioning, they can use a modern
U-Boot in their own firmware image that modifies the device tree with the
custom partitions.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We've been sitting on fixes for a while, and they keep trickling in at a low
rate. Nothing in here comes across as particularly scary or noteworthy, for
the most part it's a large collection of small DT tweaks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYgVpgAAoJEIwa5zzehBx3umkP/A2082k9R6srk+/bdeDf6F+w
YiiMJdu37jWb/W71gMlr95NC3zmk4c+U0eHj8iOdsuOYyzSZ6uUQcm8Etg7N2JwR
cupsySXvlRJ9Hq28SPe6vRnNFqGiDGmGrcfNlwnfHd/CausaJBdcocbyTsVt+omO
WGMDPy5miN8TIbYQiu6jF2sXkuuVHwXlQyBi52xW5w7Uy0iZDZdsW6GuziK0zpDH
k0QktKkVx/Q8Riy3b9Vj7kKwvaGXF2JBMsGpORhs4+JcdZl9u+GBJnmehpXmABTn
8mXEU5zu6gnBHMXxExaK/ZlFDk0yHNxGfapoRQwYecPeBZQGXWu9vyUa3/38npLr
egyMDzBgJJyHXbs7BXy6weiysn8adsNS3juhniL7mLuTp2hGZHNK6IcH2tV4Z/kD
hq/VTK/BzmKAY/GP3psoQXVavIUifh498ymCkgoZtUx8Eqq9ZrFA9hkm86F/9eOJ
vfGNTdVuPI51tdKrmqMXglI4iBc35oSyOQUlUL0DXVlKrzzaVPbQwnIZclgI+VGn
qos8l8vPxDzQ7lRgMzXsmq8D6pDSfUZQqvUr8gld/zNvd8+LsdmVYHdrvbIQu+sN
TsI0TyfU4JphSdCPtFKasu7aDBmwfB8npDXUcOazAyG8UyHZpikR9WmmIQ63BwRL
DYVre9JMhrfL6ZY2kaKC
=cc1U
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"We've been sitting on fixes for a while, and they keep trickling in at
a low rate. Nothing in here comes across as particularly scary or
noteworthy, for the most part it's a large collection of small DT
tweaks"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (24 commits)
ARM: dts: da850-evm: fix read access to SPI flash
ARM: dts: omap3: Fix Card Detect and Write Protect on Logic PD SOM-LV
ARM64: dts: meson-gxbb-odroidc2: Disable SCPI DVFS
ARM: dts: OMAP5 / DRA7: indicate that SATA port 0 is available.
ARM: dts: NSP: Fix DT ranges error
ARM: multi_v7_defconfig: set bcm47xx watchdog
ARM: multi_v7_defconfig: fix config typo
ARM: dts: dra72-evm-revc: fix typo in ethernet-phy node
soc: ti: wkup_m3_ipc: Fix error return code in wkup_m3_ipc_probe()
ARM: ux500: fix prcmu_is_cpu_in_wfi() calculation
ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmc
ARM: dts: sun8i: Support DTB build for NanoPi M1
ARM: dts: sun6i: hummingbird: Enable display engine again
ARM: dts: sun6i: Disable display pipeline by default
ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus" part 3
ARM: dts: imx6qdl-nitrogen6_som2: fix sgtl5000 pinctrl init
ARM: dts: imx6qdl-nitrogen6_max: fix sgtl5000 pinctrl init
ARM: OMAP1: DMA: Correct the number of logical channels
ARM: dts: am335x-icev2: Remove the duplicated pinmux setting
ARM: OMAP2+: Fix WL1283 Bluetooth Baud Rate
...
please pull the following changes:
- Rafal enables the UART by default on all BCM5301x, BCM4708, BCM4709 since
every device found out there has it enabled by default. He also fixes the
LED definitions for the Luxul XWR-3100 device, enables USB controllers and
their respective PHY devices, specifies the correct GPIO to power on USB
HUBs, adds the additional RAM bank for somes devices, and finally sets the
correct 5Ghz frequency limits on the Netgear R8000
- Jon does a number of Norsthar Plus SoC cleanups, fixes NAND partitions unit
addresses, adds QSPI support to a bunch of boards, adds Ethernet switch ports
to the BCM958625K reference board, enables 3rd Ethernet MAC instance to
relevant DTSes, enables Ethernet on the XMC board, and finally adds SD/MMC
support to the XMC board
- Boris adds the Video Encoder nodes to the Raspberry Pi DTS include files
ands enables it on the relevant boards
- Dan adds support for two new Luxul devices: XAP-1410 and XWR-1200, both
BCM47081 based SoCs
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYgBUvAAoJEIfQlpxEBwcED8sQAJxH/wTLvHkXxbc1sXeizGW9
FKxRnYR0gvUAm1skSttw8OADQzYcSa3frNh4sV3X9dV1SqzSzaRJP5hjBlzxIQdJ
72TJC8t7tFbjNBOG/fVqei8yAtgu/VjOP7Co8oLlON9EX1A2nsFgHQfOM7pJWdkR
mzaWQr/PI1+Jp3DFRVG/G503ummxN4SR6MG+37juW9ip446N9asT4e7eeRZkkGtD
uXtPn34sS3Pp2CN/4wFrG9Y6NRs4eVdaw+VNjelSRbhgBzFzSJVr255fHpazq5xw
UwUMsfYv1gBhvzMoHCyAohF7nTIll7rMqoPBsjawlbkaCV1UYkA0fG/fRZ7oDuU4
5BZoztqRzr0XRi95ssfuzb9A1aXa2Et15XAvcKL+ZwqSU6LNPe9alNV3TjQEoAFX
713owKbAiKA0ACtiRlOgRG9TlcE86u4XCh0IpDhLwsyVl02BzASLpX9x61Ztg2FS
HsZlXUDFL2e9lFrz9ECqvWcZGGDKZDovLWXWNUebe0L1LEoSB4+lQvMJ1kYGupP4
ceVROUhB5DiTHHxPrg2bpaYSSLA/GMvvA8A/peDPGxxh7vQMy9ZPT7ows4k/q4Gl
jsnUW6ukOUaiMRbwbh2cAqBVDxvz733FZhYils2Q/FgZBfiVBDOia6JQqfsBvHvY
jZ0kzHgxCg5gKuZ2+sZ4
=wFmP
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.11/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.11,
please pull the following changes:
- Rafal enables the UART by default on all BCM5301x, BCM4708, BCM4709 since
every device found out there has it enabled by default. He also fixes the
LED definitions for the Luxul XWR-3100 device, enables USB controllers and
their respective PHY devices, specifies the correct GPIO to power on USB
HUBs, adds the additional RAM bank for somes devices, and finally sets the
correct 5Ghz frequency limits on the Netgear R8000
- Jon does a number of Norsthar Plus SoC cleanups, fixes NAND partitions unit
addresses, adds QSPI support to a bunch of boards, adds Ethernet switch ports
to the BCM958625K reference board, enables 3rd Ethernet MAC instance to
relevant DTSes, enables Ethernet on the XMC board, and finally adds SD/MMC
support to the XMC board
- Boris adds the Video Encoder nodes to the Raspberry Pi DTS include files
ands enables it on the relevant boards
- Dan adds support for two new Luxul devices: XAP-1410 and XWR-1200, both
BCM47081 based SoCs
* tag 'arm-soc/for-4.11/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi boards
ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
ARM: dts: BCM5301X: Add DT for Luxul XWR-1200
ARM: dts: BCM5301X: Add DT for Luxul XAP-1410
ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000
ARM: dts: NSP: Add SD/MMC support
ARM: dts: NSP: Add Ethernet to NSP XMC
ARM: dts: NSP: Add and enable amac2
ARM: dts: NSP: Add BCM958625K switch ports
ARM: dts: NSP: Add QSPI support to missing boards
ARM: dts: NSP: Correct NAND partition unit address
ARM: dts: NSP: DT Clean-ups
ARM: dts: BCM53573: Specify USB ports of on-SoC controllers
ARM: dts: BCM5301X: Specify all RAM by including an extra block
ARM: dts: BCM5301X: Set GPIO enabling USB power on Netgear R7000
ARM: dts: BCM5301X: Specify USB controllers in DT
ARM: dts: BCM5301X: Fix LAN LED labels for Luxul XWR-3100
ARM: dts: BCM5301X: Enable UART by default for BCM4708(1), BCM4709(4) & BCM53012
Signed-off-by: Olof Johansson <olof@lixom.net>
Read access to the SPI flash are broken on da850-evm, i.e. the data
read is not what is actually programmed on the flash.
According to the datasheet for the M25P64 part present on the da850-evm,
if the SPI frequency is higher than 20MHz then the READ command is not
usable anymore and only the FAST_READ command can be used to read data.
This commit specifies in the DTS that we should use FAST_READ command
instead of the READ command.
Cc: stable@vger.kernel.org
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net:
dsa: Document new binding"). The legacy binding node is kept included, but is
marked disabled.
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Utilize the new DSA binding, introduced with commit 8c5ad1d617 ("net: dsa:
Document new binding"). The legacy binding node is kept included, but is marked
disabled.
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable DMA on usart3 to get a more reliable console. This is especially
useful for automation and kernelci were a kernel with PROVE_LOCKING enabled
is quite susceptible to character loss, resulting in tests failure.
Cc: stable <stable@vger.kernel.org> #v4.1+
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2E SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2L SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2H SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The Power Sleep Controller (PSC) module is responsible
for the power and clock management for each of the peripherals
present on the SoC. Represent this as a syscon node so that
multiple users can leverage it for various functionalities.
Signed-off-by: Suman Anna <s-anna@ti.com>
[afd@ti.com: add simple-mfd compatible]
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The Keystone 2 family of SoCs will use various Reset Controller
drivers for managing the resets of remote processor devices like
DSPs on the SoC, so select the ARCH_HAS_RESET_CONTROLLER option
by default to enable the Reset framework.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Fix the pa clock to point to the clkpa which has clock rate of 1/3 of PA
PLL clock and add clock names.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The serial IPs in Rockchip socs are based on Designware uarts and thus
bind against the snps,dw-apb-uart compatible.
On all newer socs we also carry around per-soc compatibles that allow
us to have more specific drivers in the future - if needed.
The cortex-a9 socs rk3066 and rk3188 that were added first don't have
those yet, so add them for completenes sake.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Adding it to the
arm dma-mapping.c so that the ARM32 DMA IOMMU mapper can make use of it.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The aemif driver can now access struct of_dev_auxdata (using platform
data).
Add the device id to the clock lookup table for the nand clock and
create a separate lookup table for aemif subnodes.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Enable the VEC IP on all RaspberryPi boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Luxul XWR-1200 in a dual-band router based on BCM47081. It uses serial
flash (for bootloader and NVRAM) and NAND flash (for firmware).
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Luxul XAP-1410 in a dual-band access point device based on BCM47081 with
serial flash. It has 3 LEDs and just one (reset) button.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets
two of them for 5 GHz band. Both seem the same and their firmwares
report the same set of channels. The problem is due to hardware / board
design there are extra limitations that should be respected.
First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be
used for U-NII-1. Using them in a different way may result in wireless
not working or in noticeably reduced performance. Basic version of this
info was provided by Broadcom employee, then it has been verified by me
using original vendor firmware (which has limitations hardcoded in UI).
This patch uses recently introduced ieee80211-freq-limit property to
describe these limitations at DT level.
Referencing PCIe devices in DT required specifying all related bridges.
Below you can see (a bit complex) PCI tree from R8000 that explains all
entries that I needed to put in DT.
0000:00:00.0 14e4:8012 Bridge Device
└─ 0000:01:00.0 14e4:aa52 Network Controller
0001:00:00.0 14e4:8012 Bridge Device
└─ 0001:01:00.0 10b5:8603 Bridge Device
├─ 0001:02:01.0 10b5:8603 Bridge Device
│ └─ 0001:03:00.0 14e4:aa52 Network Controller
├─ 0001:02:02.0 10b5:8603 Bridge Device
│ └─ 0001:04:00.0 14e4:aa52 Network Controller
├─ 0001:02:03.0 000d:0000 0x000000
├─ 0001:02:04.0 000d:0000 0x000000
├─ 0001:02:05.0 000d:0000 0x000000
├─ 0001:02:06.0 000d:0000 0x000000
├─ (...)
├─ 0001:02:1d.0 000d:0000 0x000000
├─ 0001:02:1e.0 000d:0000 0x000000
└─ 0001:02:1f.0 000d:0000 0x000000
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add SD/MMC support to the Broadcom NSP SVK and XMC.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable the ethernet in the NSP XMC (bcm958525xmc) device tree
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add and enable the third AMAC ethernet interface in the device trees for
the platforms where it is present. Also, enable amac1 on some of the
platforms where that was missing.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the layout of the switch ports found on the BCM958625K reference
board. The CPU port is hooked up to the AMAC0 Ethernet controller
adapter.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
QSPI device tree entries are present in bcm958625k, but missing from
bcm958522er, bcm958525er, bcm958525xmc, bcm958622hr, bcm958623hr,
bcm958625hr, and bcm988312hr. Duplicate the entry in bcm958625k for
all of those that are missing it (as they are identical).
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The NAND partition unit address does not match the other NSP device tree
files. This change makes them uniform.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The QSPI entry was added out of the sequental order that the rest of the
DTSI file is in. Move it to make it fit in properly. Also, some other
entries have been added in a non-alphabetical order in the DTS files,
making them different from the other NSP DTS files. Move the relevant
peices to make it match. Finally, remove errant new lines.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Broadcom OHCI and EHCI controllers always have 2 ports each on the root
hub. Describe them in DT to allow specifying extra info or referencing
port nodes.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The first 128 MiB of RAM can be accessed using an alias at address 0x0.
In theory we could access whole RAM using 0x80000000 - 0xbfffffff range
(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason
(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff
range can't be used. I reproduced this problem on:
1) Buffalo WZR-600DHP2 (BCM47081)
2) Netgear R6250 (BCM4708)
3) D-Link DIR-885L (BCM47094)
So it seems we're forced to access first 128 MiB using alias at 0x0 and
the rest using real base address + 128 MiB offset which is 0x88000000.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There is one GPIO controlling power for both USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There are 3 separated controllers, one per USB /standard/. With PHY
drivers in place they can be simply supported with generic drivers.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
They were named incorrectly most likely due to copy & paste mistake.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Every device tested so far got UART0 (at 0x18000300) working as serial
console. It's most likely part of reference design and all vendors use
it that way.
It seems to be easier to enable it by default and just disable it if we
ever see a device with different hardware design.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This introduces the first OpenPower Power9 BMC system, Romulus. Romulus is
based on the ast2500 SoC from Aspeed.
These commits also add newly upstreamed drivers to the Palmetto BMC and ast2500
eval board. We now have working network, ipmi bt, gpio and pinmux on all platforms.
ARM: dts: aspeed: Add Romulus BMC platform
ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platforms
ARM: dts: aspeed: Correct palmetto device tree
ARM: dts: aspeed: Reserve framebuffer memory
ARM: dts: aspeed-g5: Add gpio controller to devicetree
ARM: dts: aspeed-g5: Add syscon and pin controller nodes
ARM: dts: aspeed-g5: Add LPC Controller node
ARM: dts: aspeed-g5: Add SoC Display Controller node
ARM: dts: aspeed-g4: Add gpio controller to devicetree
ARM: dts: aspeed-g4: Add syscon and pin controller nodes
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYfpvhAAoJEGt2WQeBR3CeDxcQAKrPdsPz7guceN9j6I9JU9Ys
NBC0SHY0uavqidvRSOyXSbYp/uWEd+A9jAlaj+w9mfI9y+7gsmYOjtdAdY80L8RB
XLUZdKjwoSxIv80YLVnBfz+jPwQRPkzSihqgy+bFr+BLe5n9S/QRDJfOiUfu37X0
SM36ax1Tc6/LDaUa8tqrSE2IpCPa0h0ewvw9i2581zLznTWaY/JwJMqeJzl98+8P
Q4P8PJYUz/KmjTya4L+NSmJ2ng2TSWcsY7fz3a4hI5UZYsTKsppnEpFlADIWTTLI
65AfGuMahpXiHWr4v/YPVgpHwTlaVaTGrbyFrBznATkx+rud1wmihkMAmqLylgfo
5nui4yLZSaELB/Yc2I0lIoEZJiqLIOMKw2vuJUH7A6r+yDIMzpAYfkTOsfjAk//I
3HPVEsnEP+ZwhhDK2s9ki5B3EV0BOVxdMROSpKvcOhxEuebv6MioNU1mTuLFxWm9
UDqjuUsEK2LfzJqO20pnEtKOAUBlCYFvIJ5i6bSi+O7SZACA6++0WNIoomAWHFjY
ukm4dvjBq93tVr8NC7pbIxmk1WAmpI7BLWWkTNyukw3IuaF3SZar3+V23ODEOm0y
P3JfIFxwmqwsZXZWGMKD6krFB541h/J8ag0kydxZXHrvc1Cm+mFER3hyEEk0HYrS
ik2OWkXI90IeZHXkD6DD
=BeSl
-----END PGP SIGNATURE-----
Merge tag 'aspeed-4.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
Aspeed devicetree updates for 4.11
This introduces the first OpenPower Power9 BMC system, Romulus. Romulus is
based on the ast2500 SoC from Aspeed.
These commits also add newly upstreamed drivers to the Palmetto BMC and ast2500
eval board. We now have working network, ipmi bt, gpio and pinmux on all platforms.
* tag 'aspeed-4.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Romulus BMC platform
ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platforms
ARM: dts: aspeed: Correct palmetto device tree
ARM: dts: aspeed: Reserve framebuffer memory
ARM: dts: aspeed-g5: Add gpio controller to devicetree
ARM: dts: aspeed-g5: Add syscon and pin controller nodes
ARM: dts: aspeed-g5: Add LPC Controller node
ARM: dts: aspeed-g5: Add SoC Display Controller node
ARM: dts: aspeed-g4: Add gpio controller to devicetree
ARM: dts: aspeed-g4: Add syscon and pin controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
One commit that selects the newly upstreamed pinctrl driver for all
SoCs.
ARM: aspeed: Select pinctrl drivers
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYfprvAAoJEGt2WQeBR3CePVAP/RSVB7PzUqzDDYt7u6sdmjf/
UrmQtl5IO8Q71pHeNu8QFJom3cu7QDFxxZdFQM7/BqD/6f3mEXESi3bhQPGHaW33
LIKrGWahSRrPnjQhSq15MzZtxdTKGms/ZhCI6nSXVMEAtIOt6XSunHpFFLzkF1ZH
xnsBO8WHv3HBFcRovsGkrNOHBbmOwMY/uXUVKJ0ECvHmSjqy/mzvvl55G7rLea4j
H850rjzywwNZ7qvZtCK3G4F4r1j4nofxgglSR+iCE24K0MGzd9Rzs0w62K/GhXse
WYEasXeBafIKZlQlWQkPgNOxXXAdNuZ4ywPoxkNuw1MX72vwRIXFAkuSELGcjdjL
J3yZEhuKLxmyhcaXGxR99w24UgEaO4ebehIwS5Z2mR26Lcp1EeaN8X7+iSFlLUuE
ylSl7wQY2+ZPZ6wt6tp+F06Wz2wJgHYqqt9cotHiIvkhE1A7X2cX5wNJIH7vBWrJ
+nxBWz3zPa3osz23dU/sUWZPILbTfGUcOwUzFYHS89hP5z9i+Avzs3j3MOYkBvYf
czwfMAvh1oLIiMNeTUUOh1kFiJZOgaryrNOD5L0bjapFAIJiXWwIU2kzMQ7pdAES
iY4HgW7msQupPzGjZ2vyWW0pdGAvb1+TvwUGQ7IxcRSPEOo0v6gnmeUSZ7CIo0HK
6E1pbdC5Qhkj7ruSaxEs
=2mLE
-----END PGP SIGNATURE-----
Merge tag 'aspeed-4.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/soc
Apseed SoC updates for 4.11
One commit that selects the newly upstreamed pinctrl driver for all
SoCs.
* tag 'aspeed-4.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: aspeed: Select pinctrl drivers
Signed-off-by: Olof Johansson <olof@lixom.net>
Just the one commit that updates our defconfigs with network (ftgmac100
and ncsi), bt ipmi, gpio and ncsi.
ARM: configs: Update Aspeed with new drivers
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYfpo0AAoJEGt2WQeBR3Ce6WoQAKpz7FK++IVU77kx5OX1M16n
DR5MfrAFjufFpyDy1RBKeLcWvTJLgxzkEkNz/+UqLBy2KTpEnbIBPhRq+D/9GeWV
pdRzzm+jYyrbaYzZCVlyMxW92TD6fbgY2l60/Z/LGtzGSE5TeDjKkxGrWnxoFA1r
udFFwZZ1SC3A7tAy5YeGvbgD1Tkv6I/6FqUQ+Ze20v/03XraJxe3vYExFe3rR532
IJ5L9By0GLgdbHIxII1UKSpORiGzqJtum6ErO/7LypxXU9wlFChRrGzyQIKPuWrJ
chvCHtTXTujrzIjSxrBJvuZsHDlB4IkzRX80VArk1oCqHCojtvBpyPkLzg3c7H//
Ba+L++FoBKJNngJn0X5DFQhOQsq9NQqT+rm+JvCOL+3/VLBdH6Dt8Ic/QNwussrv
Y1Snb8h/jW9NbSs0q1AuwraraRgPUw/dD7BdnuEYkAMCn8u+aufp2/Xs47vALZ+B
gJJYW0P7SyWZd9d13Q/B6aO2c0z5V+8bnxf76pr6Jvu7j72sDVFAIyC4VM+yMV7P
AWuiOf9h9kTMofI/fN7CsNL7DJXLjfVTcpqHQzpb4OpVJ2WZuLVFBFkOr2M5F2UF
csDyO7gj4DgV9HK21lR5gpkm+AlS8Kg9PbB5vpOv02d3UT+ip+OLg3Oa77hOdCSB
FJIK9NjNEEdzb5tvjnIe
=307A
-----END PGP SIGNATURE-----
Merge tag 'aspeed-4.11-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/defconfig
Aspeed defconfig updates for 4.11
Just the one commit that updates our defconfigs with network (ftgmac100
and ncsi), bt ipmi, gpio and ncsi.
* tag 'aspeed-4.11-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: configs: Update Aspeed with new drivers
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add driver support for the Axentia TSE-850
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEl0I5XWmUIrwBfFMm2KKDO9oT4sIFAlh+dtsACgkQ2KKDO9oT
4sJPIA//Uxy22FHvrU91V8Wi3Kn78sqQf5TW/80N7GH/oqDdl10YCYFVcdXzJ+7v
h06bXYg3fBiEhjRXBemEyqv+OpkkB7avWC6utu2gi+QHTvB/Ugoor93QlDAP0e/b
ICjG83JEM2QToNWi7RY/dhxLP7vPAAGGTsp0cj9ekd70GWJvglAr5cMevoUsoItt
l7WzUJrBvrZEoMdRrvKEAXzIUU5EDZX2AKg7u3opZRQAmiRchU1FsI8mDnYpZ++d
RclWf1PTZiMtoVsC4OEMYTAMJbqChwpKjwBZzd8fee6HXxnAaHxIjNiMAA93S/Ys
Lvmn8rLTaACfyrfXKDvL3smX/GSw16rf+dAxL+9f1AaCpLxUxIGLrpHhbC/PnkpA
60USMMAf2R1kIWFGwfpIxH/m9MWyK3xcJWTCW19zZ26IoFk8xbkNMWcdRpkLiM99
eTuTdJg55M4Ccry9sSn2MzCxx25u8VmLHgiC7RAZ7QdhZfgDra+Qw/PT3kfN0Cvy
B3w1ChPFI5ypg9ZHvUbSYKZpg6fkl5PUxmHlDgUXAvYaXFeumhlDCq8E9uzPZn86
NVFbxlf5pKqTxenTxOsDeH9nibiDHNBiZWK0Ix2Z2lwWz99R7cofp3K1ajxkBOS4
DcFPsExLXHdAD3s4I9+mZ+PRbSc9UmGyuwUIG+in9um6HKMAjFA=
=fZjs
-----END PGP SIGNATURE-----
Merge tag 'at91-ab-4.11-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/defconfig
defconfig for 4.11:
- Add driver support for the Axentia TSE-850
* tag 'at91-ab-4.11-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: sama5_defconfig: add support for the Axentia TSE-850 board
Signed-off-by: Olof Johansson <olof@lixom.net>
omap1, and then a handful of trivial fixes for boards and devices to
work:
- Fixes TI wilink bluetooth strange platform data baud rate
- Remove duplicate pinmux line for am335x-icev2
- Fix omap1 dma regression
- Fix uninitialized return value for wkup_m3_ipc_probe()
- Fix Ethernet PHY binding typo for dra72-evm
- Fix init for omap5 and dra7 sata ports
- Fix mmc card detect pin for Logic PD SOM-LV
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlh+lYcRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMYFg//TvDU9XADwlzHt4IbP8fFilVcmB1R3LeI
+PYJvPiXqlN8T+CnQ1R2ZiI9GQoP8YLwF5UFcIsAVZMxg8l2XpJa0mjd1d/yK7o3
zuYcUx+rEGRqW75SDYqw5VPtjtNHrumjYjipaC2GFIu3Wr9UfFDxcKU8h5mcARQ4
JlyqO/Dn7/defQq0Yg2v5CcHjMz+5d/A9iAVF3kYelXLwX+wMnlQxv5H0FKLodz8
nZ14yR5hyANhGbVyyoapKQWj+uEh205FoBoZW8ws+VCRHsswepA3m05w53LaElBs
rCdA7HkRjdp3XkelXssclMdRpB42/LieouhBbtyaBNhaVPfUH6EBGcVB2cIbBmWU
6jauifjyvEXl0hni+85eB1A1sTIsofEcvhHBBIwlZ1tyeVoPEVT/3Ito+k4W2iQk
K4nSi/YuvLBBGKYUoFSovaEXj1uydG0PrNZ3cYGCstjwOvwbCuu2AMWP62jPlhD2
SDHqrEaojyRynvNi9Bus+LJGREf3dcnLCytEyErsQsRglkiOigr6bgGoSyDxkFuk
1HtYgArspeRB4IdOSX8PXP93K3sARoyxTWwu2f8HZxoqHraOjPZiwfZ3KS0MnZnh
bMIlCTx7YKOI4dBHrgDoLJZRH9P9Io9sCnaJ+Jkz4dXUOJEsf4QA0wjCFHhNQa7h
u4ZAQVlLgpU=
=VJaM
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.10-rc cycle. Mostly a DMA regression fix for
omap1, and then a handful of trivial fixes for boards and devices to
work:
- Fixes TI wilink bluetooth strange platform data baud rate
- Remove duplicate pinmux line for am335x-icev2
- Fix omap1 dma regression
- Fix uninitialized return value for wkup_m3_ipc_probe()
- Fix Ethernet PHY binding typo for dra72-evm
- Fix init for omap5 and dra7 sata ports
- Fix mmc card detect pin for Logic PD SOM-LV
* tag 'omap-for-v4.10/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3: Fix Card Detect and Write Protect on Logic PD SOM-LV
ARM: dts: OMAP5 / DRA7: indicate that SATA port 0 is available.
ARM: dts: dra72-evm-revc: fix typo in ethernet-phy node
soc: ti: wkup_m3_ipc: Fix error return code in wkup_m3_ipc_probe()
ARM: OMAP1: DMA: Correct the number of logical channels
ARM: dts: am335x-icev2: Remove the duplicated pinmux setting
ARM: OMAP2+: Fix WL1283 Bluetooth Baud Rate
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"A few ARM fixes:
- fix a crash while performing TLB maintanence on early ARM SMP cores
- blacklist Scorpion CPUs for hardware breakpoints
- ARMs asm/types.h has been included as part of the UAPI due to the
way the makefiles work, move it to uapi/asm/types.h to make it
official
- fix up ftrace syscall name matching"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8613/1: Fix the uaccess crash on PB11MPCore
MAINTAINERS: update rmk's entries
ARM: put types.h in uapi
ARM: 8634/1: hw_breakpoint: blacklist Scorpion CPUs
ARM: 8632/1: ftrace: fix syscall name matching
Support for Exynos4415 is going away because there are no internal nor
external users.
Since commit 46dcf0ff0d ("ARM: dts: exynos: Remove exynos4415.dtsi"),
the platform cannot be instantiated so remove also the mach code.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Kukjin Kim <kgene@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
When the header is not included implicitly, we get a build failure:
arch/arm/mach-pxa/idp.c:205:22: error: field 'cdev' has incomplete type
struct led_classdev cdev;
This adds an explicit #include.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The camera_supply_dummy_device definition is shared between a780 and a910,
but only provided when the first is enabled and fails to build for a
configuration with only a910:
arch/arm/mach-pxa/ezx.c:1097:3: error: 'camera_supply_dummy_device' undeclared here (not in a function)
This moves the definition into its own section.
Fixes: 6c1b417adc ("ARM: pxa: ezx: use the new pxa_camera platform_data")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
While the SinA31s does have a proper 5-pin mini USB OTG port, the ID
pin does not seem to work. The pin used in the schematics is always low,
regardless of the attached OTG cable or SoC internal pin bias settings.
The v1.5 board is missing bias resistors shown in the schematics for
earlier revisions, and the connections of the remaining one does not
match the schematics either.
In addition, VBUS for this port is disconnected from the board's 5V
power rail. The board features a pad to solder jumper pins to connect
VBUS to 5V manually.
Given the above and the fact that the board has 5 more USB host ports,
it makes more sense to have the OTG port work in peripheral mode.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This fixes commit ab8dd3aed0 ("ARM: DTS: Add minimal Support for
Logic PD DM3730 SOM-LV") where the Card Detect and Write Protect
pins were improperly configured.
Fixes: ab8dd3aed0 ("ARM: DTS: Add minimal Support for
Logic PD DM3730 SOM-LV")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Add support for the ethernet switch on the Turris Omnia board
- Clean up and improvement for ClearFog boards
- Correct license text which was mangled when switching to dual license
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWHkIIiMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71WLCAKCGlNI2NPYq
/54Ln14bXataT3uAVgCdF5DLhRKp24ifepK6hDF39drKdWk=
=zoka
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.11-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.11 (part 1)
- Add support for the ethernet switch on the Turris Omnia board
- Clean up and improvement for ClearFog boards
- Correct license text which was mangled when switching to dual license
* tag 'mvebu-dt-4.11-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: turris-omnia: add support for ethernet switch
ARM: dts: armada388-clearfog: move uart nodes
ARM: dts: armada388-clearfog: move ethernet related nodes
ARM: dts: armada388-clearfog: move I2C nodes
ARM: dts: armada388-clearfog: move device specific pinctrl nodes
ARM: dts: armada388-clearfog: add pro model DTS file
ARM: dts: armada388-clearfog: add base model DTS file
ARM: dts: armada388-clearfog: move rear button
ARM: dts: armada388-clearfog: move SPI CS1
ARM: dts: armada388-clearfog: move second PCIe port
ARM: dts: armada388-clearfog: move DSA switch
ARM: dts: armada388-clearfog: split clearfog DTS file
ARM: dts: armada388-clearfog: move sdhci pinctrl node to microsom
ARM: dts: armada388-clearfog: move SPI flash into microsom
ARM: dts: armada388-clearfog: fix SPI flash #size-cells
ARM: dts: mvebu: Correct license text
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Cleanup from old MACHs in s5pv210.
2. Enable IP_MULTICAST for libnss-mdns.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYeOlSAAoJEME3ZuaGi4PX27IP/jCfgY/2Hm1FHPeNq4R5FhzV
rzgsMPyAq8268I/HzGHQ65FIhg1kSQkCw1e6oZOvfUHTB/Tje+iuGS48vGbgupTR
DgsCiIsspAk0A0n4sfI1gRdbYM8bzyZ+mz3LzaOec7vM+9wIq4wpuR3m1R2sLyTR
4e0GaKVvjym9i4r4/ExftHx8aZLnxLPn1JJq075izQ0uB8yJLNoknnJzABM6Ab2Q
3/Ocu7/fYVEuzxTxjb91GriVc0yHuOzSR3N6eE3F4bd+VZ+kRiTA7m6ZlU6igd91
U5dxHdHG4E+vNVHQ09NsXska7Drs9JPSPqbiyJfXBIlM7znQZCmum9Qf/dudeU7W
fqgEJFfI8XtFSGrLqP+8UeXzIbfdkkKd7qlVv3OSAXL2K8ysuYd7OIp+xC5qrlp7
3QiXLjKy7s1NPAIRINmSVetrFoF7AmTa1vO6m+zsYNUQg1uGANMxthuzDe8ir8DO
5S2Chv4iNqPFke9RiTeclU/VA0rtdVIU36ShtuJMZCwnVjhUqrXzE2Hl/kWA4+Cw
ScGzIXWqDNFovmMmHnoc3CnWUyoFOo/YOnBqGL/Crgpih+MN5NeHVQ7SW0+UJQ1M
XXRPx4XzKIzJU9cb2HhXIxaPoXlLKs4nc3iMxWzXM6lfpxovF+1PjL64GYI9LLp8
xWeIX74WWlh5fbotyO6O
=3+O7
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/defconfig
Samsung defconfig update for v4.11:
1. Cleanup from old MACHs in s5pv210.
2. Enable IP_MULTICAST for libnss-mdns.
* tag 'samsung-defconfig-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: exynos_defconfig: Enable IP multicast
ARM: s5pv210_defconfig: Remove old MACHs
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Fixes for initial audio clocks configuration.
2. Enable sound on Odroid-X board.
3. Enable DMA for UART modules on Exynos5 SoCs.
4. Add CPU OPPs for Exynos4412 Prime (newer version of Exynos4412). This pulls
necessary change in the clocks.
5. Remove Exynos4212. We do not have any mainline boards with it. This will
simplify few bits later.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYeOsYAAoJEME3ZuaGi4PXuSMP/RFjn4liQ4qG/uE5j6+7HDSF
PC/1yBYyo0xzg8oaEJVz7Ay6ydqNqBAMhPfdJzWk1lzN+zQc2MwLynH1fNNJTWSY
6YtBhNzx5sgs1IRtqG8RvSpj67OlE6i98YJL64j4VjNdhcTrRBPSbm2TDeu82uzh
VY3RDsXkTeWNwiHRuDXRqZ3VLfZ/xGjuT7Ym0cEMjPeuETNHs6jYVfi5e1d1c631
Ln2MJj0dpLbf+eUqkvLjv45LIHr6DmQHhuHlfwNu9iY6EmDtS+m9BKBxMvGrWzSp
5fy/3MpQo6+DD0GocnbsQpqylKmI5sXX9ly0A4F2ZWMRkoULVHv/5UrP7V9puHyO
Rd6i9RrpPDzAm81KRorFbwJnl2uJlomR5yWSISWQ51p6HXP1mFi+78YacUgCgNM0
TDCXhuGp1ZbJmBtq1Eae3C6Ku9GEtq9WLNkphWzeqUc4miZRwQ9NGBtZhbbgoFOl
XvANJAfVcS6PDJyadKlD/bktz8cyNO+H3jMPzlFRqaGW/E0yX8BbG01kjJhmR2dZ
qAMJtWT55PPNBss/ml67qezEYBXw9xwyo9d0vPnTWE0XvCL/p++Q+BEojKB8zYuE
4NJrj01CjZmpa8Ej3zpi6MLbVaKto5TjNTe981jzyAUpGlt2fiAuGmn85lTP2a0c
4LKCFLMZ8HGDMRL1WTkl
=w/rg
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.11:
1. Fixes for initial audio clocks configuration.
2. Enable sound on Odroid-X board.
3. Enable DMA for UART modules on Exynos5 SoCs.
4. Add CPU OPPs for Exynos4412 Prime (newer version of Exynos4412). This pulls
necessary change in the clocks.
5. Remove Exynos4212. We do not have any mainline boards with it. This will
simplify few bits later.
* tag 'samsung-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: remove Exynos4212 support (dead code)
ARM: dts: exynos: Add CPU OPPs for Exynos4412 Prime
clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
ARM: dts: exynos: Enable DMA support for UART modules on Exynos5 SoCs
ARM: dts: exynos: Cleanup Odroid-X2 and enable sound on Odroid-X
ARM: dts: exynos: Fix initial audio clocks configuration on Exynos4 boards
ARM: dts: exynos: Correct clocks for Exynos4 I2S module
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Removal of unused platform data in S3C24XX and S3C64xx as follow up of
conversion to new DMA channel request API.
2. Adding const and __ro_after_init to various data in Samsung platforms.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYeOmQAAoJEME3ZuaGi4PX0CYP/0oQQEqmK+94d6cUtrbHTE74
0eTAg2HA9PqN26KkiLeEhfBv9SWtBATs62lltQsYdUg8VyZG0HxwBcvTeNnhnOpP
GvWl3ZoFzaMM26FZIVm+uGiL0hH3v6UxaGVVXWiQ73z4UpU/D6izB+EgmxNpFJvN
hPGGwD/phbgIyeBWPlW1QF6kU3pnyj0u/d1hwjVRkHwXP2dIU3vG65ghmA1UF3vP
6S0JMmHNCmtXUqBAnNxcmFS/RHpY6gXF/hQRuHRwS2IBjEHwf449rdAoz4qn3VtR
CndZZZooYtX8SJ+rUhJtOdHDL4NbJw/mjM4I1ZihU5XxnEuS695k4T/NFH84VhhA
zvrj9RzRggoUKJFgnlqrO7SZdKvaJ0oBEytBsfQoOSQX+15vxSGnXnNzUv3AaJeJ
0RG7NF1iHF1bfITOEsmpq0bKnLGxgLY3znuKn/Q8zBbsjDpmdlPjYA17Hb3zVIok
EyFmB5PZq1DhhWWnPjxlSwYK9Jjpt297X7LYP0mN/pK/KUhBj+8ozI/Xljds6HBx
tePYqjMkg5v9oRYW072kbQL2nO5lI2zMObCIL3Vq3plmONw0jCpIOL+cW8ftskbQ
LFunZq04TxKzEMoKxsE/oI4EYfrLIDVAgTaBjvEInhCNSUHJjIJYB/Zz9aT5MkOH
aNMA0sW2zAEb6PkRYWd0
=HMfi
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Samsung mach/soc update for v4.11. Mostly cleanups:
1. Removal of unused platform data in S3C24XX and S3C64xx as follow up of
conversion to new DMA channel request API.
2. Adding const and __ro_after_init to various data in Samsung platforms.
* tag 'samsung-soc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: s3c64xx: Constify wake_irqs
ARM: s3c24xx: Constify wake_irqs
ARM: SAMSUNG: Constify array of wake irqs passed to samsung_sync_wakemask
ARM: s3c64xx: Annotate external clock frequencies __ro_after_init
ARM: s3c24xx: Constify few integer tables
ARM: EXYNOS: Annotate iomem and pm_data pointers __ro_after_init
ARM: EXYNOS: Constify list of retention registers
ARM: s3c24xx: Drop unused struct s3c_audio_pdata entries
ARM: s3c64xx: Drop initialization of unused struct s3c_audio_pdata fields
Signed-off-by: Olof Johansson <olof@lixom.net>
- Adds FPGA manager bits
- Enable I2C on Cyclone5 and Arria5 devkits
- Adds LED support on C5/A5 devkits
- Enables CAN on C5 devkit
- Enables watchdog
- Add NAND on Arria10
- Add the LTC2977 Power Monitor on Arria10 devkit
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYdlGPAAoJEBmUBAuBoyj0lw0QAIbaW9pIooV/DLFcI0K4wjsq
CJhbH1f0f9KGhpKqCdr2J5zToHibb06O6xT+h6799oi1MxnbfGPLD/zjcJ3Jr+kw
2CQc8B9j5zSAeg4DpAMpPPzsUk2XJpIz2rNzI55KRuUYllvFlvQ9mAc1sfbVcPub
TBp653uFV3+XKTZz+OZ3zO86bcWGEh8bB0YVqzVArlnoA9PhiWQhV0Ee/cau2VO3
J2GgUmprLVWgOG86OI+WWqEI2Ywc8EAkOXo3DslqoA1zLA4C8ckph3hKiEhjEn+L
Bc4EagXbdalXtbqEIFYcKksW8ZrLX2rY9volGUEHFRBYPUmVH32bl5Q+cr/3gBPe
7TtEh6j9uiSvYtCkNalnVfBBGxLr5lalRDkBXiabFhBv2r3iFdpmfmvGhuNptjls
QNLqEkVVV3bRxSlmRlr7Jb5PdjlOt8lcqyF2jYxU4JlAD6zotEW3dVWLBG+i6awD
n3HUC3FH9DMCxsM5NxhngUYLI8ko7RNpISArApxdEplzxVO1B/+07kzi/JyEMmyI
4DVKUrivpSXUpwsK8GDvmWjXogK1q/ZCzX28zpwRS23a9syJ1f3qm/golyDzQPR4
97RBJWmBqt3Mb2/J8ZO0ybbBkUGFpC2B6HVs+88mHUWJrWU8CV1N7zVrZ7/UVZAf
8zMFRqb/m90Pc7jlNkZB
=hbau
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v4.11_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.11, part 1
- Adds FPGA manager bits
- Enable I2C on Cyclone5 and Arria5 devkits
- Adds LED support on C5/A5 devkits
- Enables CAN on C5 devkit
- Enables watchdog
- Add NAND on Arria10
- Add the LTC2977 Power Monitor on Arria10 devkit
* tag 'socfpga_dts_for_v4.11_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add missing compatible string for SDRAM controller
ARM: dts: socfpga: add fpga region support on Arria10
ARM: dts: socfpga: add base fpga region and fpga bridges
ARM: dts: socfpga: fpga manager data is 32 bits
ARM: dts: socfpga: Add NAND device tree for Arria10
ARM: dts: socfpga: add fpga-manager node for Arria10
ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkit
ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10
ARM: dts: socfpga: enable CAN on Cyclone5 devkit
ARM: dts: socfpga: Add Rohm DH2228FV DAC
ARM: dts: socfpga: set desired i2c clock on Cyclone5 and Arria5 devkits
ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits
Signed-off-by: Olof Johansson <olof@lixom.net>
- enables Marvell PHY support
- enable MTD(I2C EEPROM), and NAND support
- enable SPI, RTC and LED support
- enables OF CONFIGFS to support DTS overlays
- enables more FS options
- enables A10 hwmon support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYdlZIAAoJEBmUBAuBoyj0J4MP/1L6tUv43jN9vzFISGlXCmQ/
O23QsY6ZNbpvFxXsS4DBJ3eX8Mke9Efghcl0ngZtjz6W0erqTQF0ViSOuVMfm8v8
78mziOkAohZ6hOJTTLIkRE+P4+JWZonIGkimViL/ZwtQJVKCVdOF5Jjk0Tis+kCE
/7oSmRXbb9FMSIMBLzQpNqiWaGqubiVom20pAt14UEgUfy84LIkZiMqA8QWT4329
ZH56QdQMytdbpth1aAP1W1Q38IeC/Zgm0Y5H6+IKELOSpbXq1OU7tcGOK26Gqlkh
CTvpc1iUIBs3BJUWIAbLfruEVPL5vSVeLPd4QZeuL5iVV1kRndDVs6G0nQnnnVv6
8r/4nNJ/lpxVrS4nJSO6kI+xrp5tPxmWIyzocEomVgfv9mgy1OvzT3p1o6fExrl0
qTNdz7AUTI9rYJKEta+9Eyy0oMCvJ0XZhqaDiXapiSBie4C2PYiN8aVApPT3KcDT
lqGqiyVpERYUoxPfjULxJVYb/dcGc1K8zrPaAyv6lNybLRFbg+S7uPl7PEs8z/1w
u2xxK6/UJbWXnXIMxiBjEVeRLvyjKgWtuX+saqcofLzWnNI4vATnJzXfJ7UkAEJA
jYjh0sbdtdGeCmgz01J4zlnKjdyoHK2CPCWAiAFpNP8QAXk3QB7Hg5KTRpgMypJ7
73P3hXRYeAXhBR3MFm8+
=LMBa
-----END PGP SIGNATURE-----
Merge tag 'socfpga_defconfig_updates_for_v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/defconfig
SoCFPGA defconfig updates for v4.11
- enables Marvell PHY support
- enable MTD(I2C EEPROM), and NAND support
- enable SPI, RTC and LED support
- enables OF CONFIGFS to support DTS overlays
- enables more FS options
- enables A10 hwmon support
* tag 'socfpga_defconfig_updates_for_v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga_defconfig: update defconfig for SoCFPGA
Signed-off-by: Olof Johansson <olof@lixom.net>
pull the following:
- Jon fixes an invalid value for the "ranges" property of the bus nodes on NorthStar
Plus SoCs
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYet7TAAoJEIfQlpxEBwcEfjEP/3Vpx1g5YSAn28Z9SAyuSblS
df4nEbvFg3FwKM0SY3O3YneNaooKRt3O34Hj5SmXJR4S9ZcES/RIsmvtDVc/h0I/
QZes8mcDYdlw+Ti47k3uG/Et4yjRXQvS1i/9VNMgmWebS589omkWkaE3TKaOlQc1
YQLD1jAKEiTocE9yVNpE/RMeftkv7iCRyu2cYvd9YHpYsgohqHyBXCKoZds8Iezn
qUvhGSJNl6AEfZ83YAtCzUID4TNSvGeKTgItTMSkIYjKK0jBqu2KrAP5BbfKwCwR
Xu3cL+fxM7A7bX0cuypXCRxHj21+/8JHCi5u+RMWTKEfb8EqPXL+yxrSIXGBmWCR
E8D5ZKBzUoKdaZqHgVqhP9BmgOhMDkVEkhK5702O6HzUVgyfSHSEZFTkB3bWnkd4
IjeOOqkuDFont3sxeuu8BfKCkVySc31pQ33q976BhynpB8l7qdMmEDXh0R6xBXmN
nGS+HoyEGY86xxs+SmIxCTURHJs0QJ/jwmxdCdQN8uZqcgGtuPWpfK0I7RUhemik
IIdE7Uryo8NSypvIJFQOlm8qFEGh7/NujPihdPbXjtrY0A4HSwNrK68YDOtSs9NX
24uJ8HGrBPtiyP/BHCnJf5JowTrZAs3r+YSmXQqgl1dAYasYzCEZAROO4KaCe/E9
eOCieHq88mG9CuETg7Si
=ufJA
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.10/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoC Device Tree fixes for v4.10, please
pull the following:
- Jon fixes an invalid value for the "ranges" property of the bus nodes on NorthStar
Plus SoCs
* tag 'arm-soc/for-4.10/devicetree-fixes' of http://github.com/Broadcom/stblinux:
ARM: dts: NSP: Fix DT ranges error
Signed-off-by: Olof Johansson <olof@lixom.net>
SoCs, please pull the following changes:
- Valenting fixes two incorrect Kconfig symbols for BCM47xx: NVRAM and watchdog drivers
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYet4/AAoJEIfQlpxEBwcE+1EQAOmnLheosY8GRWf5uYDeYYxN
vZTlFDVbCKiQmq1JudSbKjQa60jrJC0L8nMQyo0L1cX83UycNKA6Y3d6epS2tBo8
8KIErIrJWG53gF0fs64K505hkbGmTxrzH9dXynfJJga72KjQwrpONHE6NsTv5yBP
eGqP1aDixFH0sFHiHH7dp2lz3objM3Nq/C3iwiHGnXmWCqz3i9x8+auKW0RuZ7up
L6yDiebxolsSHBDDzhoZesmT7IOIEfr4IfBxk3K0rE6ttgf0Q14Ok3gbY0uHCw2f
ZV4SawmPqvgRZyzd6s8gkC79uT93i96i+Cj5zYIczJxFxMZR833P+Mph0cvTHgQu
uxFKU9w6juKjeO+uELOSQsXrk+BBF1nNR3TcEfrT9UA6orOsCdd3isWJNWv16xI5
6aPSMfZacGTM4G4T4Vq5uQsPFpHXiWDwrz7KAFlXgX9ZX5fBlMwhy5IligYW53jl
MmukMeXbKptTO/p4P0s6AWygGvZZacm6jIuFLNEjNb82GKhl9Dkl7U5jQfbcUHkE
6MQ2cxoUhhhz1MfUsRe1vU+ajbBDdx/Ubi6AA1wg0hQCgSHY3/V+Zgd+ZqxORxqP
9nVe/yCcPbkILDVaTehUTxy80hnwBwnVwI78SayL7uG45r40416n2ZPtMNO13Gyt
069Xus6PS9RHRDehnYSC
=LqGx
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.10/defconfig-fixes' of http://github.com/Broadcom/stblinux into fixes
This pull request contains fixes to multi_v7_defconfig for Broadcom ARM-based
SoCs, please pull the following changes:
- Valenting fixes two incorrect Kconfig symbols for BCM47xx: NVRAM and watchdog drivers
* tag 'arm-soc/for-4.10/defconfig-fixes' of http://github.com/Broadcom/stblinux:
ARM: multi_v7_defconfig: set bcm47xx watchdog
ARM: multi_v7_defconfig: fix config typo
Signed-off-by: Olof Johansson <olof@lixom.net>
A few fixes here and there to enable the build of some DT leftover, prevent
display issues or setup a proper muxing.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYdR6RAAoJEBx+YmzsjxAgFyYP/iaPKm/rOModJv6lkLjovipj
SXFkEXzvumc3aV8z4gQLFe5ZUz9/pn+/szI1GIHyf7D7N8B2BED82Sbt2+IGyyTN
w6DRgHpYrqpG2JdfpIIGVoDiWgQDLXdhM7zMYXv9Jttku/6nvZCd/9jK0an0RDxB
PxUi+htHhyEb+NS8XHS/lXzM4EpcM87eLaIZ67PN6jZGFILJtVV/LL9kHE3kMECW
dDZE6QiuPcje5c4a4ry2NNBceYnnf6MTCtxaSySAvz7u+lqyy9T/MSKIApG7LVq4
lQuXjPkuwzJN+bEA8PyHB1xTxjXW6PozrivqBBLITc70Keyn+gx9QRcev7fGa1cg
mPI0ecC4DtlSR69IS1HMD2r9ZPChHA7kKAOW15Y/3YX2JOwtnMM7muvvNM/XsqRE
qXl61LNY+5Qc7RFVnn21/jcOUA9GNqXlYzhWA47WEjDIXQ0IPwoWAzOF4T112RUD
+m0Of0Xb8jMEMLdkbhSyskavZ8lwvkyIeTQ+TNhTJVxiarxb1RFec57NcGj9wApf
9zym7V/OyEcUw8/c/hXoGeAjhcUkKu2V07CSRzhKEhZ5FvzwVSc8XWoaZ129stgh
JV56tmgLGp3uSYd8dZgQJx96S1gCxY+fk4Cv252wP/NYzoKmDH/lDC0TcJ3/U6Vi
5YmxYsmroCc/bJYgShjn
=6kp8
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.10
A few fixes here and there to enable the build of some DT leftover, prevent
display issues or setup a proper muxing.
* tag 'sunxi-fixes-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmc
ARM: dts: sun8i: Support DTB build for NanoPi M1
ARM: dts: sun6i: hummingbird: Enable display engine again
ARM: dts: sun6i: Disable display pipeline by default
Signed-off-by: Olof Johansson <olof@lixom.net>
- A couple of Nitrogen6 device tree fixes for audio codec probe
failure, which is caused by that pinctrl setting for codec clock
was not in the correct device node.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYdJEnAAoJEFBXWFqHsHzOSn4H/i21NWVegzZVjm1wmkPR/ddr
OSih7TUd7HsdFx/8S8u66L9mpmQTHRlBAxPLZFuTwvt3NtPtvJpbteDCkfbYMQg6
jxbiew8MbSRY/v+vTNVemiiIIzc5yMi9U2PFTHmg1cHsDd6mIe4nlxA+sXsZQ2Yi
jHTbkL7mF441I4yqVIw8yXauIZKCSPOW5mDk/nKCd4Nk51KZmT9kFDz34ohNC7cc
UckUPC/1qoWo2idt5Uh+DxG7RdyywQaGujxIucwfQhOzDxpDMmcD+pXtUqdQygRq
ykFC82Y4yg5IDtBkncK4d6yG7L1pptTBPUT2LV/xqfUG6FWXMbNMSXI53jY/UqA=
=Ds9k
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.10, 2nd round:
- A couple of Nitrogen6 device tree fixes for audio codec probe
failure, which is caused by that pinctrl setting for codec clock
was not in the correct device node.
* tag 'imx-fixes-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6qdl-nitrogen6_som2: fix sgtl5000 pinctrl init
ARM: dts: imx6qdl-nitrogen6_max: fix sgtl5000 pinctrl init
Signed-off-by: Olof Johansson <olof@lixom.net>
The following patch was sketched by Russell in response to my
crashes on the PB11MPCore after the patch for software-based
priviledged no access support for ARMv8.1. See this thread:
http://marc.info/?l=linux-arm-kernel&m=144051749807214&w=2
I am unsure what is going on, I suspect everyone involved in
the discussion is. I just want to repost this to get the
discussion restarted, as I still have to apply this patch
with every kernel iteration to get my PB11MPCore Realview
running.
Testing by Neil Armstrong on the Oxnas NAS has revealed that
this bug exist also on that widely deployed hardware, so
we are probably currently regressing all ARM11MPCore systems.
Cc: Russell King <linux@armlinux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Fixes: a5e090acbf ("ARM: software-based priviledged-no-access support")
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch enables RTC on stm32f429-disco with LSI as clock source because
X2 crystal for LSE is not fitted by default.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This driver is no longer necessary since it was merged into stmmac.
Acked-by: Lars Persson <larper@axis.com>
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This default-enables the devices found on the APQ8060 DragonBoard
in the qcom_defconfig:
- EBI2 bus
- SMSC911x ethernet
- LEDs class and PM8058 LEDs driver, trigger and heartbeat
trigger (so we get heartbeat on the board by default)
- IIO framework, including the HRTimer trigger, KXSD9
accelerometer, MPU3050 gyroscope, AK8975 magnetometer and
BMP085 pressure sensor
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch enables thermal sensors and QFPROM support for qcom platforms.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch enables configs required to get SATA functionality working on
IFC6410 board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
IFC6410 board has PCIE based ATL1C ethernet controller, so enable related configs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Enable support for clocks, controlled by the RPM processor on
Qualcomm platforms.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial set of CoreSight components found on Qualcomm apq8064 based
platforms, including the IFC6410 board.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the MPU-3050 gyroscope and the KXSD9 accelerometer to
the Qualcomm APQ8060 Dragonboard. The KXSD9 is mounted beyond the
MPU-3050 and appear as a subdevice beyond it. We set up the
required GPIO and interrupt lines to make the devices work.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Some nodes are referencing the pm8058_gpio as IRQ parent, but
the HW IRQ offset they are supplying is actually that for the
parent to that controller: the PM8058 itself. Since that is the
proper parent, reference it directly.
We can switch this to the pm8058_gpio and the proper offset
once we have fixed the SSBI GPIO driver to properly deal with
the hierarchical IRQ domain and get proper local offset
translation.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The name "pmicintc" is ambiguous: there is a second power
management IC named PM8901 on these systems, and it is also
an interrupt controller. To make things clear, just name the
node alias "pm8058", this in unambigous and has all information
we need.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch enables 1.8v regulator on LS expansion, which should be
always on according to 96boards spec.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch moves hdmi pinctrl defination from board file to soc level
pinctrl file. If not this pinctrl setup will be duplicated across all
the apq8064 based board files.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the missing properties for pm8921 smps2.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add nodes for the Riva PIL, IRIS RF module, BT and WiFI services exposed
by the Riva firmware and the related memory reserve.
Also provides pinctrl nodes for devices enabling the riva-pil.
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The ipq board has these rates as 25MHz, and not 19.2 and 27. I
copy/pasted from other boards that have those rates but forgot
to fix the rates here.
Fixes: 30fc4212d5 ("arm: dts: qcom: Add more board clocks")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
sources for msm8974, this isn't actually a reserved region.
Instead it's marked as "unused" for reserved regions. Let's
remove it so we get back a good chunk of memory.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the necessary nodes for USB gadget on MSM8974 and enable these for
Honami.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
AHCI provides the register PORTS_IMPL to let the software know which port
is supported. The register must be initialized by the bootloader. However
in some cases u-boot doesn't properly initialize this value (if it is not
compiled with SATA support for example or if the SATA initialization fails).
The DTS entry "ports-implemented" can be used to override the value in
PORTS_IMPL.
Without this patch the SATA will not work in the following two cases:
* if there has been a failure to initialize SATA in u-boot.
* if ahci_platform module has been removed and re-inserted. The reason is
that the content of PORTS_IMPL is lost after the module is removed.
I suspect that it's because the controller is reset by the hwmod.
Cc: <stable@vger.kernel.org> # v4.6+
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
[tony@atomide.com: updated comments with what goes wrong]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Due to the way kbuild works, this header was unintentionally exported
back in 2013 when it was created, despite it not being in a uapi/
directory. This is very non-intuitive behaviour by Kbuild.
However, we've had this include exported to userland for almost four
years, and searching google for "ARM types.h __UINTPTR_TYPE__" gives
no hint that anyone has complained about it. So, let's make it
officially exported in this state.
Signed-off-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add mt2701 nand device node, include nfi and bch ecc.
Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the dtsi node of iommu and smi for mt2701.
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch updates my email address as I no longer have access to the old
one.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch rearrange MT2701 DT nodes to keep them in ascending order.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
[mb: fix pio unit address and order]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
TI DA8xx/OMAPL13x/AM17xx/AM18xx SoCs have extra UART registers beyond
the standard 8250 registers, so we need a new compatible string to
indicate this. Also, at least one of these registers uses the full 32
bits, so we need to specify reg-io-width in addition to reg-shift.
"ns16550a" is left in the compatible specification since it does work
as long as the bootloader configures the SoC UART power management
registers.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Current KVM world switch code is unintentionally setting wrong bits to
CNTHCTL_EL2 when E2H == 1, which may allow guest OS to access physical
timer. Bit positions of CNTHCTL_EL2 are changing depending on
HCR_EL2.E2H bit. EL1PCEN and EL1PCTEN are 1st and 0th bits when E2H is
not set, but they are 11th and 10th bits respectively when E2H is set.
In fact, on VHE we only need to set those bits once, not for every world
switch. This is because the host kernel runs in EL2 with HCR_EL2.TGE ==
1, which makes those bits have no effect for the host kernel execution.
So we just set those bits once for guests, and that's it.
Signed-off-by: Jintack Lim <jintack@cs.columbia.edu>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The ARMv8-M architecture introduces 'tt' and 'ttt' instructions,
which means we can no longer use 'tt' as a register alias on recent
versions of binutils for ARM. So replace the alias with 'ttab'.
Fixes: 81edb42629 ("crypto: arm/aes - replace scalar AES cipher")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This replaces the unwieldy generated implementation of bit-sliced AES
in CBC/CTR/XTS modes that originated in the OpenSSL project with a
new version that is heavily based on the OpenSSL implementation, but
has a number of advantages over the old version:
- it does not rely on the scalar AES cipher that also originated in the
OpenSSL project and contains redundant lookup tables and key schedule
generation routines (which we already have in crypto/aes_generic.)
- it uses the same expanded key schedule for encryption and decryption,
reducing the size of the per-key data structure by 1696 bytes
- it adds an implementation of AES in ECB mode, which can be wrapped by
other generic chaining mode implementations
- it moves the handling of corner cases that are non critical to performance
to the glue layer written in C
- it was written directly in assembler rather than generated from a Perl
script
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The range size for axi is 0x2 bytes too small, as the QSPI needs
0x11c408 + 0x004 (which is 0x0011c40c, not 0x0011c40a). No errors have
been observed with this shortcoming, but fixing it for correctness.
Fixes: 329f98c197 ("ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes")
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
FDT harcoded partition table does not match that one in historical
TI's 2.6.37 kernel and non legacy kernels even use different ECC scheme,
yet noone complained, so remove it altogether.
Also, UBI volumes instead of partitions are used since u-boot-2016.09.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to errata i880 description the speed of Ethernet port 1 on AM572x
SoCs rev 1.1 should be limited to 10/100Mbps, because RGMII2 Switching
Characteristics are not compatible with 1000 Mbps operation [1].
The issue is fixed with Rev 2.0 silicon.
Hence, rework Beagle-X15 and Begale-X15-revb1 to use phy-handle instead of
phy_id and apply corresponding limitation to the Ethernet Phy 1.
[1] http://www.ti.com/lit/er/sprz429j/sprz429j.pdf
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As the bootloader passes the NAND and the SPI flash partition tables
there is no need to keep them in the kernel device tree.
Removed them.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
TI DRA72-EVM Rev C has two DP83867 ethernet phys which support IRQ
generation in case of phy/link status changes. The INT/PWDN lines from both
DP83867 phys are wired to DRA7 gpio6.16, so reflect the same in DT.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix a typo in impedance setting for ethernet-phy@3
Fixes: b76db38cd8 ("ARM: dts: dra72-evm-revc: add phy impedance settings")
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This replaces the scalar AES cipher that originates in the OpenSSL project
with a new implementation that is ~15% (*) faster (on modern cores), and
reuses the lookup tables and the key schedule generation routines from the
generic C implementation (which is usually compiled in anyway due to
networking and other subsystems depending on it).
Note that the bit sliced NEON code for AES still depends on the scalar cipher
that this patch replaces, so it is not removed entirely yet.
* On Cortex-A57, the performance increases from 17.0 to 14.9 cycles per byte
for 128-bit keys.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This is a straight port to ARM/NEON of the x86 SSE3 implementation
of the ChaCha20 stream cipher. It uses the new skcipher walksize
attribute to process the input in strides of 4x the block size.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Rename dmu_reserved to delta_reserved
Rename st231_dmu to st231_delta
Update the delta_reserved memory region start address
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The clock parent was lower than child clock which is not correct.
In some use case, it leads to division by zero.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Inline the wakeup_secondary() static function, and keep the
backupram remapping around: it is reused when resuming from
suspend so no point in remapping it every time.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This function clearly never worked and always returns true,
as pointed out by gcc-7:
arch/arm/mach-ux500/pm.c: In function 'prcmu_is_cpu_in_wfi':
arch/arm/mach-ux500/pm.c:137:212: error: ?:
using integer constants in boolean context, the expression
will always evaluate to 'true' [-Werror=int-in-bool-context]
With the added braces, the condition actually makes sense.
Fixes: 34fe6f107e ("mfd : Check if the other db8500 core is in WFI")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Previously, the sun8i tablets used everything declared in AXP221 DTSI
while they have an AXP223 PMIC.
This corrects that so the sun8i tablets can get some features the AXP223
has (at the moment, ability to have 100mA as maximal current on VBUS
power supply).
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Previously, the Allwinner Parrot R16 used everything declared in AXP221
DTSI while it has an AXP223 PMIC.
This corrects that so the Allwinner Parrot R16 can get some features the
AXP223 has (at the moment, ability to have 100mA as maximal current on
VBUS power supply).
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Previously, the Sinlinx SinA33 used everything declared in AXP221 DTSI
while it has an AXP223 PMIC.
This corrects that so the Sinlinx SinA33 can get some features the
AXP223 has (at the moment, ability to have 100mA as maximal current on
VBUS power supply).
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Previously, the Olimex A33-OlinuXino used everything declared in AXP221
DTSI while it has an AXP223 PMIC.
This corrects that so the Olimex A33-OlinuXino can get some features the
AXP223 has (at the moment, ability to have 100mA as maximal current on
VBUS power supply).
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP223 shares most of its logic with the AXP221 but it has some
differences for the VBUS driver.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As sti-hda is only available on STiH410-B2120,
disable it in STiH410.dtsi and enable it at board level.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
There are no Exynos4212 based boards in mainline, so there is no need to
keep additional files for SoCs, which are never used. This patch removes
support for Exynos4212 SoCs and moves previously shared Exynos4412
definitions to a single file to simplify future maintenance.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
On APQ8060, the kernel crashes in arch_hw_breakpoint_init, taking an
undefined instruction trap within write_wb_reg. This is because Scorpion
CPUs erroneously appear to set DBGPRSR.SPD when WFI is issued, even if
the core is not powered down. When DBGPRSR.SPD is set, breakpoint and
watchpoint registers are treated as undefined.
It's possible to trigger similar crashes later on from userspace, by
requesting the kernel to install a breakpoint or watchpoint, as we can
go idle at any point between the reset of the debug registers and their
later use. This has always been the case.
Given that this has always been broken, no-one has complained until now,
and there is no clear workaround, disable hardware breakpoints and
watchpoints on Scorpion to avoid these issues.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM has a few system calls (most notably mmap) for which the names of
the functions which are referenced in the syscall table do not match the
names of the syscall tracepoints. As a consequence of this, these
tracepoints are not made available. Implement
arch_syscall_match_sym_name to fix this and allow tracing even these
system calls.
Signed-off-by: Rabin Vincent <rabinv@axis.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Banana Pro has an AMPAK AP6181 WiFi+Bluetooth module. The WiFi part
is a BCM43362 IC connected to MMC3 of the A20 SoC via SDIO. The IC also
takes a power enable signal via GPIO.
This commit adds a device-tree node to power it up, so the mmc subsys
can scan it, and enables the mmc controller which is connected to it.
As the wifi enable pin of the AP6181 module is not really a regulator,
switch the mmc3 node to the mmc-pwrseq framework for controlling it.
This more accurately reflectes how the hardware actually works.
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the S/PDIF transmitter that is present on the Mele I7.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orange Pi PC routes the LINEOUT pins to the audio out jack on the
board. The onboard microphone is routed to MIC1, with MBIAS providing
power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we support the audio codec found on the Allwinner H3 SoC, add
device nodes for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A23 Q8 tablets have an internal mono speaker w/ external amp
which has a shutdown control tied to a GPIO pin. Both the speaker
amp and the headphone jack are tied to the HP output pins. While
the speaker is mono, the headset jack is stereo. Unfortunately
the driver does not support automatic switching of this.
In addition, the headset is DC coupled, or "direct drive" enabled.
The headset's microphone is tied to MIC2 with HBIAS providing power.
A separate internal microphone is tied to MIC1 with MBIAS providing
power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have a device tree binding and driver for the A23's
internal audio codec, add a device node for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the A23/A33, the internal codec's analog path controls are located in
the PRCM node.
Add a sub-device node to the PRCM for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Marcus Cooper