Original gpt per clk parent is from ipg_per clk which
may be scaled when system enter low bus mode, as ipg
clk will be lower in low bus mode, to keep system clk
NOT drift, select gpt per clk parent from OSC which
is at fixed freq always.
On i.mx6qdl, add a osc_per clk source for i.mx6q
TO > 1.0 and all i.MX6dl SoC.
On i.mx6sx, just make gpt per clk from OSC.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The GW52xx baseboard supports CANbus so we enable it, configure its pinmux
and CAN_STBY gpio.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Follow the conventions for pinctrl:
- grouping pinctrl in logical alphabatized groups
- remove any pinctrl not being used by a driver or needed by user
- move iomuxc to bottom of file for readability
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Follow the convention of configuring padconf for all pins and not leaving
any 0x80000000 to leave them un-configured.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Use the gpio contants defined in bindings for active high/low
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Remove aliases that are either not used by bootloader or are provided via
included dtsi files.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The general device-tree rule is to not include nodes that do not have a driver
or bindings in a dts/dtsi. Remove the place-holder nodes from the Gateworks
Ventana boards until a time that a driver with proper bindings exists.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This alias is used by U-Boot to enable/disable the regulator depending
on baseboard type.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The spi-mxs driver does not allow full duplex SPI transfers. The
spi-gpio driver may be used as an alternative if this is required.
Make the choice between those drivers easier for the end user by
providing settings for both drivers.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The labels on the spidev nodes are not used and not required, so
remove them. The TX28 supports 3 chipselects on the SPI
interface. Make all those chipselects available to the user.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Baud clock is used for bit clock generation in master mode. Ipg clock
is peripheral clock and peripheral access clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Baud clock is used for bit clock generation in master mode. Ipg clock
is peripheral clock and peripheral access clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Passing '0x80000000' to the pin configuration means that kernel will skip the
IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the
bootloader.
Instead of relying on the bootloader setup, let's configure it in the kernel to
have predictable settings.
'0x1b0b0' is the default POR value for all these pins and has also been verified
that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL
registers, so no functional change has been made.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the wa
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@02220000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The lcdif node has a property named "display" and also a child node
called "display", which causes the following warning:
device-tree: Duplicate name in lcdif@80030000, renamed to "display#1"
Rename the child node name in order to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
imx6sx has the same LCDIF controller IP as in mx28, so add the proper
compatible strings.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Fixes "imx6q-pcie 1ffc000.pcie: missing *config* reg space"
error exposed by new versions of the designware pcie driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds support for the i.MX1 APF9328 from Armadeus.
This change is intended to further remove non-DT support for this board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add the IOMUX setting for the IR input, rather than relying on the
boot loader.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
HummingBoard after rev 2.0 and the production one starting rev 3.0 uses
gpio 3,5 (EIM_DA5 pad) as the gpio infra red receiver input.
Since the original Carrier1 board is obsolete and we are retiring it,
update the DT file for this. This will mean IR reception will not
work on Carrier1 with this DT file.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Initial patch from Rabeeh, but with the electrical properties added.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The i.MX53 has a Cortex-A8 Performance Monitor Unit.
Add it to the dtsi.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds the battery backed real time clock connected to I2C1
to the device tree.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds simple-card support to the i.MX SoCs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds support for the Freescale (Motorola) i.MX1 ADS board.
This change is intended to further remove non-DT support for this board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add USB support for Freescale Vybrid tower. The USB hosts over-current
protection signal is not connected to the PHY's over- current
protection, hence we need to disable it.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add USB support for Colibri VF61 modules. The Colibri standard pinout
defines a pin for USB over-current. However, due to lack of pinmux
options, the USB hosts over-current protection signal of the Colibri
standard could not be connected to the PHY's over-current protection.
Hence we need to disable the over-current functionality of the USB
controller.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add device tree node for usbmisc which controls the non-core USB
registers. This is required to use the property to disable the over-
current detection.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This adds USB PHY and USB controller nodes. Vybrid SoCs have two
independent USB cores which each supports DR (dual role). However,
real OTG is not supported since the OTG ID pin is not available.
The PHYs are located within the anadig register range, hence we need
to change the length of the anadig registers.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
[ukl: rebase from ancient kernel version]
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The preloaded script addresses on imx25 and imx35 are different, so
imx25 is not compatible with imx35-sdma unless a custom firmware is
loaded.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds basic devicetree template for i.MX1 based SoCs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Everything in the PCI specification assumes devices to be
enumerable on startup. This is only possible if they have
power available.
A future improvement may allow this regulator to be switched
off for D3hot and D3cold power states, but there is a lot
of work to do the pcie host controller side for this to work.
To keep things simple always enable the regulator for now.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The Colibri VF61 is a module which needs a carrier board to actually
run. Different carrier board have different hardware support, hence
we should reflect this in the device tree files. This patch adds the
Colibri Evaluation Board, which supports almost all peripherals
defined in the Colibri standard.
Also align the compatible naming, file splitting and file naming with
the scheme which was choosen for the Tegra based modules.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The interrupt controller used the generic compatible property only.
Add the SoC-specific one, to make it future proof.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Armada 370 RD has a GPIO controlled LED connected on MPP32, so
this commit adds the relevant hardware description to Armada 370 RD
Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1410429419-29820-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 370 RD platform has a GPIO-controlled fan on MPP8, so this
commit adds the relevant hardware description to Armada 370 RD Device
Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1410429419-29820-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Commit 356649ab6d ("ARM: dts: rockchip: unuse the slot-node and deprecate
the supports-highspeed for dw-mmc") removed the slots but not the #xx-cells
properties describing the subnodes. Do this now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the controller node, pinctrl settings for the customizable pins
and sort the controllers like on rk3288 as emmc, sdmmc, sdio for
handling convenience.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This enables both the otg and host port and adds the vbus regulators
on the Radxa Rock board. As we don't have phy support yet, the vbus
regulators are added in always-on mode.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This is a remnant from the first i2c driver iteration that seems to have
been forgotten and thus made its way into the dtsi. Remove it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The sub-mailbox devices are added to the Mailbox DT nodes on
OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5
family of SoCs. This data represents the same mailboxes that
used to be represented in hwmod attribute data previously.
The node name is chosen based on the .name field of
omap_mbox_dev_info structure used in the hwmod data.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds dma support in both sdcc1 and sdcc3 device node.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds support to SD card controller using generic pl180 mmci driver.
This patch also adds temporary fixed regulator to get it going till the actual
regulator is mainlined.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add the mmcc node so that we can probe and use the multimedia
clocks on apq8064.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds DT support to configure GPIO_78 as function ps_hold
on apq8064.
CC: Rob Herring <robh+dt@kernel.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds device tree nodes to support pinctrl for apq8064 SOC
CC: Rob Herring <robh+dt@kernel.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch adds the TLMM node for the APQ8084 platform.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add basic support for the IFC6540 single-board computer boards, that are
based on the APQ8084 SoC. This patch adds the initial device tree and the
neccessary nodes required for enabling the serial port and eMMC.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add the PMIC and the sub-devices that are currently supported in
the kernel to the DT.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add the PMIC and the sub-devices that are currently supported in
the kernel to the DT.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
We should be able to talk to the PMIC at 400kHz. No need to talk at
the slow 100kHz.
As measured by ftrace (with a bunch of extra patches, since cpufreq
for rk808 hasn't landed yet):
before this change: cpu0_set_target() => ~500us
after this change: cpu0_set_target() => ~300us
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by Addy Ke <addy.ke@rock-chips.com>
Tested-by Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lkml.kernel.org/r/1410167960-554-4-git-send-email-p.zabel@pengutronix.de
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Switch the Armada SoC SPI port device tree binding to use the new improved
armada-370-spi compatible name. This allows for a wider range of baud rates
to be used.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1410147029-30067-1-git-send-email-gerg@uclinux.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit
adds the description of this generator to the Device Tree describing
this SoC.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link: https://lkml.kernel.org/r/1409645719-20003-4-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUCIKhAAoJEBmUBAuBoyj0MJUQAIPVfnuSzBlNru29jf0qJ4wp
XKcHm/TWm17/ZFTpA/m2UwTpvPSztK+JSYWH2xM6Ks6bQhbhyLKe6SZHaYbeHVRr
xPuUU2idHjSXKg/MqlKWZIABj+jyoP3f7xvHvXalmj48ZAZtJoCrXdmMjG1lTA69
jbS1FM6EcNORXxPVc8KdGeFvlj47LOFVXv0Em4huWb1U6tqurgs4RVwkhYdTCmfj
DG59pf4SK+4P3r4GZSBtm47CKbIFfNEzdz7wy5Iq+RvJ5/hBmhbDp6TB9EgWL1Mo
xnsMuvASE4FQq5aefWDR4+d/Arrhovp8DNiRmPNWA/tWlx0AfMJ7rnaPvk3/RnkY
YqHoE5CGWbbtK7L+9NQt6ENW0fJDSc6006k0Uzyfty4mIi4YAEhqQ7rvxLWfH+TK
6iyZUOfWT+0hLPX8XhCvIQYUqvkq9EYm5DrENxYW2U6ePU5jjYuZ1mdoTkiKMFTe
9SQCTYrdGsRMJ+I7qyiHFR931cJoWe8hA7HSZ3iYGvjFReWwfNQ8e9J1rVu++J5Y
qopDz/E6jptlx6/aDPI4wtU/5P3NDH/olVmhrahy9XJITJ22474AlhzVMOp8pIrY
jnypiuX36z5sai2U/2eD4ltZh8hChDEZEM7bMsH+wlP4jnLxcep4oSlzh6HsOMu1
nPxXHMfUOsnfuZwUuzmm
=/AYx
-----END PGP SIGNATURE-----
Merge tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next into next/dt
Pull "arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries" From Dinh Nguyen:
5 of the 6 patches are DTS updates and the 1 patch is updating
the MAINTAINERS entry with my new email address.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next:
arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.
ARM: dts: socfpga: memreserve first 4KB for future system use
ARM: dts: socfpga: Add SD card detect
ARM: dts: socfpga: remove extra alias in the ArriaV devkit
ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
MAINTAINERS: update entries for ARM/SOCFPGA platform
Mark rxd as wakeupcapable for 115200n8 no hardware-flow control
configuration. If h/w flow control is being used, then rts/cts
appropriately should be used.
Signed-off-by: Nishanth Menon <nm@ti.com>
We've had deeper idle states working on omaps for few years now,
but only in the legacy mode. When booted with device tree, the
wake-up events did not have a chance to work until commit
3e6cee1786 ("pinctrl: single: Add support for wake-up interrupts")
that recently got merged. In addition to that we also needed
commit 79d9701559 ("of/irq: create interrupts-extended property")
that's now also merged.
Note that there's no longer need to specify the wake-up bit in
the pinctrl settings, the request_irq on the wake-up pin takes
care of that.
Signed-off-by: Nishanth Menon <nm@ti.com>
Now that ti,am437-padconf is available, switch over to that compatible
property. Retain pinctrl-single for legacy support.
While at it, mark the pinctrl as interrupt controller so that it can
be used with interrupts-extended property for wakeup events.
Signed-off-by: Nishanth Menon <nm@ti.com>
Now that ti,dra7-padconf is available, switch over to that compatible
property. Retain pinctrl-single for legacy support.
While at it, mark pinctrl as interrupt controller so that it can be used
with interrupts-extended property for wakeup events.
Signed-off-by: Nishanth Menon <nm@ti.com>
Now that ti,omap5-padconf is available, switch over to that compatible
property. Retain pinctrl-single for legacy support.
While at it, mark pinctrl as interrupt controller so that it can be
used with interrupts-extended property for wakeup events.
Signed-off-by: Nishanth Menon <nm@ti.com>
This adds initial support. For now, regulators are always on and we
don't specify the input supply for all of the regulators.
Signed-off-by: huang lin <hl@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
It's convenient (and less confusing to people reading logs) if the
eMMC port on rk3288 is consistenly marked with mmc0 and the sdmmc port
on rk3288 is consistently marked with mmc1. Add the appropriate
aliases.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds basic SPI nodes to the base rk3288 device tree file.
A few notes:
* It's assumed that most users of the SPI ports are using chip select
0. Thus the default pinctrl for the ports enables chip select 0
(but not chip select 1 on ports that have it). If a board wants to
use chip select 1 or wants a GPIO chip select the board should
override the pinctrl (just like boards can override UART pinctrl if
they have hardware flow control).
* Since SPI DMA support appears broken and the SPI works fine without
DMA we don't include the DMA references. That can come in a later
change.
Signed-off-by: huang lin <hl@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
USB host1 port is the host A port nearby the otg port.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
rk3288 has two kind of usb controller, this add the dwc2 controller
for otg and host1.
Controller can works with usb PHY default setting and Vbus on.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add regulator-name properties for the regulators that don't have them,
allowing the kernel to display the name from the schematic rather than
the name of the regulator on the PMIC in order to improve diagnostics.
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CM-T54 CoM can be used with various custom baseboards, other
than SB-T54 (supplied with SBC-T54 single board computer).
Update model property of SBC-T54 DT to clarify this.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The RFBI node for OMAP DSS was left out when adding the rest of the DSS
nodes, because it was not clear how to set up the clocks for the RFBI.
However, it seems that if there is a HWMOD for a device, we also need a
DT node for it. Otherwise, at boot, we get:
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2542 _init+0x464/0x4e0()
omap_hwmod: dss_rfbi: doesn't have mpu register target base
Now that v3.17-rc3 contains a fix 8fd46439e1 ("ARM: dts:
omap54xx-clocks: Fix the l3 and l4 clock rates") for the L3 ICLK
required by the RFBI, let's add the RFBI node to get rid of the
warning.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[tony@atomide.com: updated description per comments from Nishant]
Signed-off-by: Tony Lindgren <tony@atomide.com>
These baseboards are equipped with the Technexion TAO35030 SOM. So
they include this dtsi. The common parts are extracted into an "common"
dtsi file. The main difference between both boards is, that the *lcd
has DSS support enabled for the LCD.
Some HEAD acoustics specific features are:
- LED handling
- Special FPGA/DSP audio driver (not included in this series)
- powerdown GPIO
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Zhangfei Gao