Modified the gpio clock-names in GPIO nodes so mango dts could
adapt to Designware gpio controller driver, then gpio bus clock
and gpio debounce clock would be enabled.
I also force enable the gpio interrupt clock in sophgo clock
system so that the gpio interrupt trigger could take effect.
Signed-off-by: chunzhi.lin <chunzhi.lin@sophgo.com>
[sophgo] - Fix riscv go1.22 issue on Milk-v Pioneer
https://www.reddit.com/r/RISCV/s/ip18lqfmWB
commit 8eb060e101 ("arch/riscv: add Zihintpause support") broke
building with CONFIG_CC_OPTIMIZE_FOR_SIZE enabled (gcc 11.1.0):
CC arch/riscv/kernel/vdso/vgettimeofday.o
In file included from <command-line>:
./arch/riscv/include/asm/jump_label.h: In function 'cpu_relax':
././include/linux/compiler_types.h:285:33: warning: 'asm' operand 0 probably does not match constraints
285 | #define asm_volatile_goto(x...) asm goto(x)
| ^~~
./arch/riscv/include/asm/jump_label.h:41:9: note: in expansion of macro 'asm_volatile_goto'
41 | asm_volatile_goto(
| ^~~~~~~~~~~~~~~~~
././include/linux/compiler_types.h:285:33: error: impossible constraint in 'asm'
285 | #define asm_volatile_goto(x...) asm goto(x)
| ^~~
./arch/riscv/include/asm/jump_label.h:41:9: note: in expansion of macro 'asm_volatile_goto'
41 | asm_volatile_goto(
| ^~~~~~~~~~~~~~~~~
make[1]: *** [scripts/Makefile.build:249: arch/riscv/kernel/vdso/vgettimeofday.o] Error 1
make: *** [arch/riscv/Makefile:128: vdso_prepare] Error 2
Having a static branch in cpu_relax() is problematic because that
function is widely inlined, including in some quite complex functions
like in the VDSO. A quick measurement shows this static branch is
responsible by itself for around 40% of the jump table.
Drop the static branch, which ends up being the same number of
instructions anyway. If Zihintpause is supported, we trade the nop from
the static branch for a div. If Zihintpause is unsupported, we trade the
jump from the static branch for (what gets interpreted as) a nop.
Fixes: 8eb060e101 ("arch/riscv: add Zihintpause support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
RISC-V uses kernel_fpu_begin()/kernel_fpu_end() like several other
architectures. Enabling hardware FP requires overriding the ISA string
for the relevant compilation units.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Since it is not possible to incrementally add/remove extensions from the
compiler's ISA string by appending arguments, any code that wants to
modify the ISA string must recreate the whole thing. To support this,
factor out the logic for generating the -march argument so it can be
reused where needed.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
This is needed to support recent hardware in the amdgpu DRM driver. The
FPU code in that driver is not performance-critical, so only provide the
minimal support.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
The variable for hiding v0p7 needs to be set BEFORE the ISA set
initialzation, so use early_param instead of __setup .
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
The clint-mtimer nodes of CPU0 do not work after entering the kernel when
enabling the config SOPHGO_MULTI_CHIP_CLOCK_SYNC. Re-enable them to keep the
sbi_ecall_time work in the pre-OS phase.
Signed-off-by: jingyu.li01 <jingyu.li01@sophgo.com>
SG2042 is now on upstreaminng, and on master, ARCH_FOO is replacing
SOC_FOO. Introduce this in advance for easy rebase with upstream code.
Just a straightforward string replacement in this change.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
These are loop counters which is inherently unsigned. Therefore make
them unsigned. Moreover it also fixes alloc-size-larger-than
error with gcc-13, where malloc can be called with (-1) due to tmp_len
being an int type.
Fixes
| cpumap.c:366:20: error: argument 1 range [18446744065119617024, 18446744073709551612] exceeds maximum object size 9223372036854775807 [-Werror=alloc-size-larger-than=]
| 366 | tmp_cpus = malloc(tmp_len * sizeof(struct perf_cpu));
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Upstream-Status: Submitted [https://lore.kernel.org/linux-perf-users/20230123211310.127532-1-raj.khem@gmail.com/T/#u]
When doing DMA page preparation, both the VA and the PA are easily
accessible from struct page.
Use the alternative macro variant that takes both VA and PA as
parameters, thus in case the ISA extension used support PA directly, the
overhead for re-converting VA to PA can be omitted.
Suggested-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
DMA synchorization is done on PA and the VA is calculated from the PA.
Use the alternative macro variant that takes both VA and PA as
parameters, thus in case the ISA extension used support PA directly, the
overhead for re-converting VA to PA can be omitted.
Suggested-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Guo Ren <guoren@kernel.org>
The standardized Zicbom extension supports only VA, however there's some
vendor extensions (e.g. XtheadCmo) that can handle cache management
operations on PA directly, bypassing the TLB lookup.
Add a CMO alternatives macro variant that come with both VA and PA
supplied, and the code can be patched to use either the VA or the PA at
runtime. In this case the codepath is now patched to use VA for Zicbom
and PA for XtheadCmo.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Guo Ren <guoren@kernel.org>
chunzhi.lin