hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
966,529 Commits 9 Branches 1 Tag 4.7 GiB
Commit Graph

6 Commits

Author SHA1 Message Date
Sai Krishna Potthuri 552f388bbe reset: reset-zynqmp: Added support for Versal platform 
Updated the reset driver to support Versal platform.
As part of adding Versal support
- Added Versal specific compatible string.
- Reset Id and number of resets are different for Versal and ZynqMP,
hence taken care of these two based on compatible string.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2020-09-23 14:25:31 +02:00
Rajan Vaja 1b413581fe firmware: xilinx: Remove eemi ops for reset_get_status 
Use direct function call instead of using eemi ops for
reset_get_status.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Link: https://lore.kernel.org/r/1587761887-4279-14-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2020-04-28 15:45:08 +02:00
Rajan Vaja cf23ec3531 firmware: xilinx: Remove eemi ops for reset_assert 
Use direct function call instead of using eemi ops for
reset_assert.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Link: https://lore.kernel.org/r/1587761887-4279-13-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2020-04-28 15:45:08 +02:00
Philipp Zabel c1b065b4f2 reset: zynqmp: Make reset_control_ops const 
The zynqmp_reset_ops structure is never modified. Make it const.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2019-10-22 14:39:01 +02:00
Rajan Vaja 3d03137864 drivers: Defer probe if firmware is not ready 
Driver needs ZynqMP firmware interface to call EEMI
APIs. In case firmware is not ready, dependent drivers
should wait until the firmware is ready.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2019-03-18 13:45:27 +01:00
Nava kishore Manne 62f0d7dc3b reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. 
Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC.
The zynqmp reset-controller has the ability to reset lines
connected to different blocks and peripheral in the Soc.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2019-01-29 14:08:40 +01:00