We cannot list all the possible chips used in different board revisions,
just use the generic "jedec,spi-nor" compatible instead. This also
fixes dtbs_check error:
['jedec,spi-nor', 's25fl256s1', 's25fl512s'] is too long
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This fixes dtbs-check error from simple-bus schema:
soc: thermal-zones: {'type': 'object'} is not allowed for {'cpu-thermal': ..... }
From schema: /home/leo/.local/lib/python3.8/site-packages/dtschema/schemas/simple-bus.yaml
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Property "postion" is not documented in the mma8452 binding. Remove it
to resolve the error in "make dtbs_check"
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The FPGA is not really a bus but more like an MFD device. Change the
compatible string from "simple-bus" to "simple-mfd". This also fix a
node name issue with simple-bus schema.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the #power-domain-cells for power-controller node as required by the
schema.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix the following error from "make dtbs_check"
memory: False schema does not allow ...
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is no regulator bus in hardware. So move the regulator nodes out
and remove the regulators simple-bus. This also make the dts align with
the simple-bus schema.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Disable the bus in the SoC dtsi file to be enabled only in board dts
files. Also breakup long values in the ifc node to fix dtbs_check.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Align the compatible strings with the board binding defined in schema
file.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the missing node for qspi flash.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Although the ordering of DMA channels was not relevant in the txt binding,
it is defined as ordered in the converted yaml schema. Update the dts
to match the order.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The property is optional and not used in matching the clock in driver.
Remove it to avoid dtbs_check issues.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make use of the i2c bus recovery feature and enable it on PHYTEC
phyCORE-based modules and boards.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This force-converts the per-device battery node into the standard
properties using "simple-battery" for the HREF machines and the
corresponding Samsung battery for the mobile phones.
This is fine to do since the battery data in the DTS files has never
been deployed or used. In commit a1149ae975
"ARM: ux500: Disable Power Supply and Battery Management by default"
it was turned off and has not been switched back on since. In
the meantime standardized bindings for batteries have appeared
making the old AB8500 battery bindings obsolete.
The battery node which is now in the middle of an included file
is obviously a per-device piece of information so push this down
to each board. The HREF machines all have the same battery and can
share a single node in the HREF dtsi file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5.15, please pull the following:
- Stefan fixes the VEC (video encoder) bus address for 2711, fixes the
MDIO bus controller #address-cells/#size-cells inversion and the SDIO
regulator voltage ranges
- Nicolas fixes DTC warnings for the PCIe host bridge and its child
USB device
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Merge tag 'arm-soc/for-5.15/devicetree' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.15, please pull the following:
- Stefan fixes the VEC (video encoder) bus address for 2711, fixes the
MDIO bus controller #address-cells/#size-cells inversion and the SDIO
regulator voltage ranges
- Nicolas fixes DTC warnings for the PCIe host bridge and its child
USB device
* tag 'arm-soc/for-5.15/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711-rpi-4-b: Fix usb's unit address
ARM: dts: bcm2711-rpi-4-b: Fix pcie0's unit address formatting
ARM: dts: bcm2711-rpi-4-b: fix sd_io_1v8_reg regulator states
ARM: dts: bcm2711: fix MDIO #address- and #size-cells
ARM: dts: bcm283x: Fix VEC address for BCM2711
Link: https://lore.kernel.org/r/20211012213841.1872021-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the device tree for a Netgear GS110EMX switch featuring 8 Gigabit
ports and 2 Multi-Gig ports (100M/1G/2.5G/5G/10G). An 88E6390X switch
sits at its core connecting to two 88X3310P 10G PHYs. The control plane
is handled by an 88F6811 Armada 381 SoC.
The following functionality is tested:
- 8 gigabit Ethernet ports connecting via 88E6390X to the 88F6811
- serial console UART
- 128 MB commercial grade DDR3L SDRAM
- 16 MB serial SPI NOR flash
The two 88X3310P 10G PHYs while detected during boot seem neither to
detect any link nor pass any traffic.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
dtbs_check currently complains that:
arch/arm/boot/dts/bcm2711-rpi-4-b.dts:220.10-231.4: Warning
(pci_device_reg): /scb/pcie@7d500000/pci@1,0: PCI unit address format
error, expected "0,0"
Unsurprisingly pci@0,0 is the right address, as illustrated by its reg
property:
&pcie0 {
pci@0,0 {
/*
* As defined in the IEEE Std 1275-1994 document,
* reg is a five-cell address encoded as (phys.hi
* phys.mid phys.lo size.hi size.lo). phys.hi
* should contain the device's BDF as 0b00000000
* bbbbbbbb dddddfff 00000000. The other cells
* should be zero.
*/
reg = <0 0 0 0 0>;
};
};
The device is clearly 0. So fix it.
Also add a missing 'device_type = "pci"'.
Fixes: 258f92d2f8 ("ARM: dts: bcm2711: Add reset controller to xHCI node")
Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210831125843.1233488-1-nsaenzju@redhat.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The TYAN S7106 is a server platform with an ASPEED AST2500 BMC.
Signed-off-by: Oskar Senft <osk@google.com>
Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210909004920.1634322-1-osk@google.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add the power-config-full-load described in:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#power-config-full-load
The power-config-full-load gpio is designed to be used to specify how
many power supplies the system should have, in rainier it is 2 or 4. If
enough power supplies fail so that the system no longer has redundancy
(no longer n+1), the hardware will signal to the Onboard Chip Controller
that the system may be oversubscribed, and performance may need to be
reduced so the system can maintain it's powered on state.
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211005192226.213539-1-anoo@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This contains various cleanup patches to 32-bit ARM Tegra device trees
and enables USB OTG mode on the Nexus 7.
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Merge tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.16-rc1
This contains various cleanup patches to 32-bit ARM Tegra device trees
and enables USB OTG mode on the Nexus 7.
* tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove useless usb-ehci compatible string
ARM: tegra: Remove unused backlight-boot-off property
ARM: tegra: nexus7: Enable USB OTG mode
ARM: tegra: Add new properties to USB PHY device-tree nodes
ARM: tegra: Update Broadcom Bluetooth device-tree nodes
ARM: tegra: acer-a500: Correct compatible of ak8975 magnetometer
Link: https://lore.kernel.org/r/20211008201132.1678814-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Addition of a new variant in the sama5d2 family: the sama5d29 with
significant updates being CAN and Ethernet controllers;
- Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were
maintained up to this moment, separately, in OpenWrt tree;
- Two more boards gained I2C bus recovery support;
- Tse850 updated with one Ethernet fix;
- Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support.
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Merge tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT #1 for 5.16:
- Addition of a new variant in the sama5d2 family: the sama5d29 with
significant updates being CAN and Ethernet controllers;
- Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were
maintained up to this moment, separately, in OpenWrt tree;
- Two more boards gained I2C bus recovery support;
- Tse850 updated with one Ethernet fix;
- Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support.
* tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: dts: sama5d29: Add dtsi file for sama5d29
ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support
ARM: dts: at91: tse850: the emac<->phy interface is rmii
ARM: dts: at91: add Exegin Q5xR5 board
dt-bindings: ARM: at91: document exegin q5xr5 board
dt-bindings: add vendor prefix for exegin
ARM: dts: at91: add CalAmp LMU5000 board
dt-bindings: ARM: at91: document CalAmp LMU5000 board
dt-bindings: add vendor prefix for calamp
ARM: dts: at91: at91sam9260: add pinctrl label
ARM: dts: at91-sama5d27_som1_ek: Added I2C bus recovery support
ARM: dts: at91: sama7g5ek: enable ADC on the board
ARM: dts: at91: sama7g5: add node for the ADC
ARM: dts: at91: sama5d27_wlsom1: add wifi device
Link: https://lore.kernel.org/r/20211011123438.16562-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
gpmc,mux-add-data is not boolean.
Fixes the below errors flagged by dtbs_check.
"ethernet@4,0:gpmc,mux-add-data: True is not of type 'array'"
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
gpmc,cycle2cycle-{same|diff}csen are boolean properties. Fix them
to prevent dtbs_check errors.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On SPEAr3xx, ethernet driver is not compatible with the SPEAr600
one.
Indeed, SPEAr3xx uses an earlier version of this IP (v3.40) and
needs some driver tuning compare to SPEAr600.
The v3.40 IP support was added to stmmac driver and this patch
fixes this issue and use the correct compatible string for
SPEAr3xx
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Input pin that indicates that the BMC is configured to boot with security
protections enforced.
Pulled up by default (secure). Placing the jumper will pull the pin down
(bypass security).
When in the secure boot state, it makes the EEPROM at 0x50 on bus 14
read only.
Link: https://lore.kernel.org/r/20210923074606.283393-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
authentication fail on each socket.
Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.
Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Nguyen <thang@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20210917082945.19111-1-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Few regression fixes for omaps for the v5.15-rc cycle. There is a fix
for boot time hangs that can happen on some am335x devices that started
when the pruss devicetree nodes were added. The other fixes are less
critical:
- Fix compiler warning for sysc_init_soc() that got recently introduced
- Fix external abort for am335x pruss as otherwise some am335x will hang
- Use CLKDM_NOAUTO quirk also for dra7 dcan1
- Fix older NAND device node regression for omap3-sdp
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Merge tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.15
Few regression fixes for omaps for the v5.15-rc cycle. There is a fix
for boot time hangs that can happen on some am335x devices that started
when the pruss devicetree nodes were added. The other fixes are less
critical:
- Fix compiler warning for sysc_init_soc() that got recently introduced
- Fix external abort for am335x pruss as otherwise some am335x will hang
- Use CLKDM_NOAUTO quirk also for dra7 dcan1
- Fix older NAND device node regression for omap3-sdp
* tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3430-sdp: Fix NAND device node
bus: ti-sysc: Use CLKDM_NOAUTO for dra7 dcan1 for errata i893
soc: ti: omap-prm: Fix external abort for am335x pruss
bus: ti-sysc: Add break in switch statement in sysc_init_soc()
Link: https://lore.kernel.org/r/pull-1633609552-789682@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There's no such thing as a generic USB EHCI controller. The EHCI
controllers found on Tegra SoCs are instantiations that need Tegra-
specific glue to work properly, so drop the generic compatible string
and keep only the Tegra-specific ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
- A couple of fixes from Haibo Chen to update SPI NOR TX bus width for
i.MX6 and i.MX8 boards. This becomes necessary because spi-nor driver
starts using the setting in DT.
- Mark buck2 always-on for i.MX8MM Kontron-n801x-som board to avoid the
core supply being turned off unexpectedly.
- Fix eSDHC2 device tree settings for LS1028A SoC.
- Disable GIC CPU interface before calling stby-poweroff sequence to fix
power-off failure on i.MX6.
- Fix M2_RST# GPIO pinmux on i.MX8M venice-gw7902 boards.
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Merge tag 'imx-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.15, round 2:
- A couple of fixes from Haibo Chen to update SPI NOR TX bus width for
i.MX6 and i.MX8 boards. This becomes necessary because spi-nor driver
starts using the setting in DT.
- Mark buck2 always-on for i.MX8MM Kontron-n801x-som board to avoid the
core supply being turned off unexpectedly.
- Fix eSDHC2 device tree settings for LS1028A SoC.
- Disable GIC CPU interface before calling stby-poweroff sequence to fix
power-off failure on i.MX6.
- Fix M2_RST# GPIO pinmux on i.MX8M venice-gw7902 boards.
* tag 'imx-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8m*-venice-gw7902: fix M2_RST# gpio
ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence
arm64: dts: ls1028a: fix eSDHC2 node
arm64: dts: imx8mm-kontron-n801x-som: do not allow to switch off buck2
arm64: dts: imx8: change the spi-nor tx
ARM: dts: imx: change the spi-nor tx
Link: https://lore.kernel.org/r/20211006125734.GA10197@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds the matching carrier for Raspberry Pi Compute Module 4.
Instead of xHCI USB host controller there is just a USB 2.0 interface
connected to the DWC2 controller from the BCM2711. As a result
there is a free PCIe Gen 2 socket. Also there are 2 full-size HDMI 2.0
connectors.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-10-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The Raspberry Pi Compute Module 4 (CM4) are SoMs which contain the
following:
* BCM2711 quad core processor
* up to 8 GB RAM
* up to 32 GB eMMC
* a GPIO expander
* Gigabit PHY BCM54210PE
* Wifi/BT module with internal and external antenna
The eMMC and the Wifi/BT module are optional.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-9-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
A Wifi/BT chip is quite common for the Raspberry Pi boards. So move those
definitions into a separate dtsi in order to avoid copy & paste. This
change was inspired by a vendor tree patch from Phil Elwell.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-7-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
DT schema check complains at sd_io_1v8_reg about the following:
[1800000, 1, 3300000, 0] is too long
Additional items are not allowed (3300000, 0 were unexpected)
So fix the states definition.
Fixes: 7dbe8c62ce ("ARM: dts: Add minimal Raspberry Pi 4 support")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-3-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The values of #address-cells and #size-cells are swapped. Fix this
and avoid the following DT schema warnings for mdio@e14:
#address-cells:0:0: 1 was expected
#size-cells:0:0: 0 was expected
Fixes: be8af7a9e3 ("ARM: dts: bcm2711-rpi-4: Enable GENET support")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1628334401-6577-2-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
The VEC has a different address (0x7ec13000) on the BCM2711 (used in
e.g. Raspberry Pi 4) compared to BCM283x (e.g. Pi 3 and earlier). This
was erroneously not taken account for.
Definition of the VEC in the devicetrees had to be moved from
bcm283x.dtsi to bcm2711.dtsi and bcm2835-common.dtsi to allow for this
differentiation.
Fixes: 7894bdc622 ("ARM: boot: dts: bcm2711: Add BCM2711 VEC compatible")
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1626980528-3835-1-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
BB2D is a Vivante GC 2D Accelerator.
This adds the node to the dts file within a target module node.
Crossbar index number is used for interrupt mapping.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix typo in pinctrl. It did only work because the bootloader
seems to have initialized it.
Fixes: ee32711195 ("ARM: dts: omap3-gta04: Define and use bma180 irq pin")
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add mandatory supply properties. The supply is always on, so it is just
a syntax issue, no functional change.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add mandatory supply properties. The supply is always on, so it is just
a syntax issue, no functional change.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Replace depreciated nodenames, fix label name to match scheme.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hyphens should be used in label names. make dtbs_check complains
about that since it does not match the corresponding pattern
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch the compatible for the am33xx_pinmux pin controller node from
pinctrl-single to pinconf-single. The only change between these two
compatibles is that PCS_HAS_PINCONF will be true. This then allows
pinconf properties to be utilized.
The purpose of this change is to allow the PocketBeagle to use:
pinctrl-single,bias-pullup
pinctrl-single,bias-pulldown
This dts already defines these properites for gpio pins in the default
pinctrl state but it has no effect unless PCS_HAS_PINCONF is set.
The bias properties can then be modified on the corresponding gpio lines
through the gpiod uapi. The mapping between the pins and gpio lines is
defined by gpio-ranges under the gpio controller nodes in am33xx-l4.dtsi
Signed-off-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Nand is on CS1 so reg properties first field should be 1 not 0.
Fixes: 44e4716499 ("ARM: dts: omap3: Fix NAND device nodes")
Cc: stable@vger.kernel.org # v4.6+
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- I2C EEPROM support on the RZA2MEVB development board,
- DMA, USB2.0, and audio support for the RZ/G2L SoC,
- USB2.0, I2C, audio, ADC, and CANFD support for the RZ/G2L SMARC EVK
development board,
- Support for more R-Car Gen3e SoCs (H3e, M3e, M3Ne(-2G), D3e, E3e,
H3Ne),
- PWM support for the R-Car M3-W+ and V3U SoCs,
- IPMMU support for SDHI on the R-Car V3U SoC,
- Switches support for the Falcon development board,
- Improve Ethernet PHY descriptions to fix reset handling after kexec,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.16
- I2C EEPROM support on the RZA2MEVB development board,
- DMA, USB2.0, and audio support for the RZ/G2L SoC,
- USB2.0, I2C, audio, ADC, and CANFD support for the RZ/G2L SMARC EVK
development board,
- Support for more R-Car Gen3e SoCs (H3e, M3e, M3Ne(-2G), D3e, E3e,
H3Ne),
- PWM support for the R-Car M3-W+ and V3U SoCs,
- IPMMU support for SDHI on the R-Car V3U SoC,
- Switches support for the Falcon development board,
- Improve Ethernet PHY descriptions to fix reset handling after kexec,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (45 commits)
arm64: dts: renesas: rcar-gen3: Add missing Ethernet PHY resets
ARM: dts: rzg1: Add missing Ethernet PHY resets
ARM: dts: r-mobile: Add missing Ethernet PHY resets
arm64: dts: renesas: Add compatible properties to RTL8211E Ethernet PHYs
arm64: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
arm64: dts: renesas: Add compatible properties to AR8031 Ethernet PHYs
ARM: dts: renesas: Add compatible properties to uPD6061x Ethernet PHYs
ARM: dts: renesas: Add compatible properties to RTL8201FL Ethernet PHYs
ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
ARM: dts: renesas: Add compatible properties to KSZ8081 Ethernet PHYs
ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYs
arm64: dts: renesas: beacon: Fix Ethernet PHY mode
ARM: dts: renesas: Fix SMSC Ethernet compatible values
arm64: dts: renesas: rzg2l-smarc: Enable CANFD
arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform
arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI
arm64: dts: renesas: r8a779a0: falcon-cpu: Add SW47-SW49 support
arm64: dts: renesas: rzg2l-smarc: Add Mic routing
arm64: dts: renesas: rzg2l-smarc: Enable audio
...
Link: https://lore.kernel.org/r/cover.1633081147.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Revert cc8870bf4c to fix the regression on i.MX6 that suspend
support becomes broken.
- Add `qca,clk-out-frequency` property to fix Ethernet support on
imx6qdl-pico board.
- Re-enable FB support in imx_v6_v7_defconfig. It gets lost due to
f611b1e762 ("drm: Avoid circular dependencies for CONFIG_FB").
- Fix LP5562 LED support on imx6dl-yapp4 board.
- Add missing pinctrl-names for panel on M53Menlo board.
- Fix USB host power regulator polarity on M53Menlo board.
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Merge tag 'imx-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.15:
- Revert cc8870bf4c to fix the regression on i.MX6 that suspend
support becomes broken.
- Add `qca,clk-out-frequency` property to fix Ethernet support on
imx6qdl-pico board.
- Re-enable FB support in imx_v6_v7_defconfig. It gets lost due to
f611b1e762 ("drm: Avoid circular dependencies for CONFIG_FB").
- Fix LP5562 LED support on imx6dl-yapp4 board.
- Add missing pinctrl-names for panel on M53Menlo board.
- Fix USB host power regulator polarity on M53Menlo board.
* tag 'imx-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: enable fb
ARM: dts: imx6qdl-pico: Fix Ethernet support
ARM: dts: imx: Fix USB host power regulator polarity on M53Menlo
ARM: dts: imx: Add missing pinctrl-names for panel on M53Menlo
Revert "ARM: imx6q: drop of_platform_default_populate() from init_machine"
ARM: dts: imx6dl-yapp4: Fix lp5562 LED driver probe
Link: https://lore.kernel.org/r/20210923063356.GK13480@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bunch of DTS fixes to resolve addressing issues with some of the device
nodes, dropping unused/undocumented properties in various nodes, and
aligning node names with dtschema.
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Merge tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes
Juno/Vexpress fixes for v5.15
Bunch of DTS fixes to resolve addressing issues with some of the device
nodes, dropping unused/undocumented properties in various nodes, and
aligning node names with dtschema.
* tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes
arm: dts: vexpress-v2p-ca9: Fix the SMB unit-address
arm: dts: vexpress: Drop unused properties from motherboard node
arm64: dts: arm: drop unused interrupt-names in MHU
ARM: dts: arm: align watchdog and mmc node names with dtschema
arm64: dts: arm: align watchdog and mmc node names with dtschema
arm64: dts: fvp: Remove panel timings
Link: https://lore.kernel.org/r/20210927105249.3583380-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This corrects the use of depricated chipid and clock names, for which
support was finally dropped from the driver. It also ensures that the
DSI PLL is fed by the correct clock, now that it's being migrated to not
rely on global clock names.
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Merge tag 'qcom-dts-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm DTS fixes for v5.15
This corrects the use of depricated chipid and clock names, for which
support was finally dropped from the driver. It also ensures that the
DSI PLL is fed by the correct clock, now that it's being migrated to not
rely on global clock names.
* tag 'qcom-dts-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: apq8064: update Adreno clock names
ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference
ARM: dts: qcom: apq8064: use compatible which contains chipid
Link: https://lore.kernel.org/r/20210930025526.1146-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a label for the touchscreen to allow a custom baseboard to
disable this node if needed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The STMPE811 ADC on the Apalis SoM board can be used as a provider
of ADC capabilities to other devices, for example, when a custom
baseboard has an SN74LV4051 analog mux.
Pass the 'io-channel-cells' parameter to indicate such possibility.
While at it, also pass a label for the adc device, so that it can
be referenced in the custom baseboard.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is recommended not to use underscore in node names.
Change it to dash.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make operating point definitions comply with binding
specifications.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Make operating point definitions comply with binding
specifications.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only led-X or led are allowed according to bindings definition.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds a devicetree for the Tolino Vision 5 Ebook reader. It is
based on boards called ¨e70k02¨. It is equipped with an imx6sl SoC.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds a devicetree for the Kobo Libra H2O Ebook reader. It is based on
boards called e70k02. It is equipped with an imx6sll SoC.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Netronix board E70K02 can be found some several Ebook-Readers,
at least the Kobo Libra H2O and the Tolino Vision 5. The board
is equipped with different SoCs requiring different pinmuxes.
For now the following peripherals are included:
- LED
- Power Key
- Cover (gpio via hall sensor)
- RC5T619 PMIC
- Backlight via lm3630a
- Wifi sdio chip detection (mmc-powerseq and stuff)
It is based on vendor kernel but heavily reworked due to many
changed bindings.
Known limitations: cold colored backlight does not work due to
incompatible hard coded overvoltage setting in the driver.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the partition layout also used by the bootloader.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SPI-NOR flash on the SoM was missing from the device tree.
The TQMa7 as a designated QSPI_RESET# pin, however depending on the
hardware configuration the pin may be unconnected, or be used for a
different purpose. With this in mind, we mux the pin as a pullup and
define an input hog for it, but keep it a separate pin group, so that it
is easy for dependent Device Trees to modify the configuration.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
"TQ-Systems" is written with a dash.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MPL3115A2 I2C pressure sensor driver does not take a VCC regulator.
The bindings are so far trivial, but the datasheet does not have a VCC
pin.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a device tree for a Colibri iMX6ULL 1GB which has a eMMC instead of
the raw NAND used on other SKUs.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Nexus 7 has OTG-cable microUSB port, enable OTG mode. USB peripheral
devices now can be connected to Nexus 7 using OTG adapter, switching
USB port into host mode.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add new properties to USB PHYs needed for enabling USB OTG mode.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The host-wakeup GPIO is now marked as deprecated in the broadcom-bluetooth
device-tree binding, it's replaced with the host-wakeup interrupt. Update
Tegra device-trees to the recent version of the Bluetooth binding.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The "ak,ak8975" compatible is not recognized by dt-bindings, it's
deprecated. Use supported "asahi-kasei,ak8975" compatible.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Thierry Reding <treding@nvidia.com>
With commit c709135e57 ("pinctrl: at91-pio4: add support for slew-rate")
and commit cbde6c823b ("pinctrl: at91-pio4: Fix slew rate disablement")
the slew-rate is enabled by default for each configured pin. The datasheet
specifies at chapter "Output Driver AC Characteristics" that HSIO
drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate
setting but are rather calibrated against an external 1% resistor mounted
on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal
frequency and the external load, it is possible to adjust their target
output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled
at the moment in device tree).
Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com
Datasheet chapter "EMAC Timings" specifies that while in 3.3V domain
GMAC's MDIO pins should be configured with slew-rate enabled, while the
data + signaling pins should be configured with slew-rate disabled when
GMAC works in RGMII or RMII modes. The pin controller for SAMA7G5 sets
the slew-rate as enabled for all pins. Adapt the device tree to comply
with these.
Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-2-claudiu.beznea@microchip.com
SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The
1.35V for DDR3L rail at run-time is selected by the proper configuration
on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended
the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of
configuration registers to provide proper voltages on its rail. Run-time
configuration registers could be configured differently than suspend
configuration register for MCP16502 (VSEL2 affects only run-time
configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK
switches to self-refresh. Even on self-refresh it needs to be powered by
a 1.35V rail. Thus, make sure the PMIC is configured properly when system
is suspended.
Fixes: 7540629e2f (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
Before commit 0e30f47232 ("mtd: spi-nor: add support for DTR protocol"),
for all PP command, it only support 1-1-1 mode, no matter the tx setting
in dts. But after the upper commit, the logic change. It will choose
the best mode(fastest mode) which flash device and spi-nor host controller
both support.
Though the spi-nor device on imx6sx-sdb/imx6ul(l/z)-14x14-evk board
do not support PP-1-4-4/PP-1-1-4, but if tx is 4 in dts file, it will also
impact the read mode selection. For the spi-nor device on the upper mentioned
boards, they support read 1-4-4 mode and read 1-1-4 mode according to the
device internal sfdp register. But qspi host controller do not support
read 1-4-4 mode. so need to set the tx to 1, let the common code finally
select read 1-1-4 mode, PP-1-1-1 mode.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Fixes: 0e30f47232 ("mtd: spi-nor: add support for DTR protocol")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The S5M8767 PMIC does not require anymore a safe DVS voltage, if the DVS
GPIO is not enabled. Although previously bindings required providing
this safe DVS voltage, but since commit 04f9f068a6 ("regulator:
s5m8767: Modify parsing method of the voltage table of buck2/3/4") this
was ignored.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210928084949.27939-12-krzysztof.kozlowski@canonical.com
Add compatible values to Ethernet PHY subnodes representing Renesas
uPD60610 or uPD60611 PHYs on RZ/A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/335a1dfea905369da683e122e41e08ca1c5f90f7.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing Realtek
RTL8201FL PHYs on RZ/A2 boards. This allows software to identify the
PHY model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/a23eca16869457684b0300379233e335b4e2047e.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/247dc2074dae149af07b6d014985ad30eb362eda.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/ce8ae6b199fa244315a008ae31891a808ca1948d.1631174218.git.geert+renesas@glider.be
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ8041 PHYs on RZ/G1 and R-Car Gen2 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/f9e26625924f90eff34fe6f6f02b15fa272c5d80.1631174218.git.geert+renesas@glider.be
According to schematics, and confirmed by ID_REV register contents, the
Ethernet controllers on various development board are not SMSC LAN9220,
but different variants:
- KZM-A9-Dual and KZM-A9-GT: LAN9221,
- Bock-W and Marzen: LAN89218AQ.
Update the compatible values accordingly.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/59c142176f795b3541c935df43ab11cecd77cc61.1631173813.git.geert+renesas@glider.be
Commit 078fb7aa6a ("arm: dts: vexpress: Fix addressing issues with
'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress
boards. The problem is #address-cells size changed, but interrupt-map
was not updated. This results in the timer interrupt (and all the
other motherboard interrupts) not getting mapped.
As the 'interrupt-map' properties are all just duplicates across boards,
just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi.
Strictly speaking, 'interrupt-map' is dependent on the parent
interrupt controller, but it's not likely we'll ever have a different
parent than GICv2 on these old platforms. If there was one,
'interrupt-map' can still be overridden.
Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org
Fixes: 078fb7aa6a ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes")
Cc: Guillaume Tucker <guillaume.tucker@collabora.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Reported-by: Reported-by: "kernelci.org bot" <bot@kernelci.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The core functions of string.c are those that may be implemented by
per-architecture functions, or overloaded by FORTIFY_SOURCE. As a
result, it needs to be built with __NO_FORTIFY. Without this, macros
will collide with function declarations. This was accidentally working
due to -ffreestanding (on some architectures). Make this deterministic
by explicitly setting __NO_FORTIFY and move all the helper functions
into string_helpers.c so that they gain the fortification coverage they
had been missing.
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: Andy Lavr <andy.lavr@gmail.com>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Commit bbc4d71d63 ("net: phy: realtek: fix rtl8211e rx/tx delay
config") sets the RX/TX delay according to the phy-mode property in the
device tree. For the A20-olinuxino-lime2 board this is "rgmii", which is the
wrong setting.
Following the example of a900cac375 ("ARM: dts: sun7i: a20: bananapro:
Fix ethernet phy-mode") the phy-mode is changed to "rgmii-id" which gets
the Ethernet working again on this board.
Signed-off-by: Bastien Roucariès <rouca@debian.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210916081721.237137-1-rouca@debian.org
The SSI 1328 is a NAS box running a SL3516 SoC.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The edimax NS2502 is a NAS box running a SL3516 SoC.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently, it is no longer possible to retrieve a DHCP address
on the imx6qdl-pico board.
This issue has been exposed by commit f5d9aa79df ("ARM: imx6q:
remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs").
Fix it by describing the qca,clk-out-frequency property as suggested
by the commit above.
Fixes: 98670a0bb0 ("ARM: dts: imx6qdl: Add imx6qdl-pico support")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The micro-SD card doesn't feature a write-protect pin. Set the
corresponding property in the devicetree to handle this behavior
correctly and suppress driver warnings.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MIC2025 switch input signal nEN is active low, describe it as such
in the DT. The previous change to this regulator polarity was incorrectly
influenced by broken quirks in gpiolib-of.c, which is now long fixed. So
fix this regulator polarity setting here once and for all.
Fixes: 3c3601cd6a ("ARM: dts: imx53: Update USB configuration on M53Menlo")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The panel already contains pinctrl-0 phandle, but it is missing
the default pinctrl-names property, so the pin configuration is
ignored. Fill in the missing pinctrl-names property, so the pin
configuration is applied.
Fixes: d81765d693 ("ARM: dts: imx53: Update LCD panel node on M53Menlo")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- ranges property should be grouped by region, with no functional
changes. Otherwise, schema dtbs_check would report the following errors.
"linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
[[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'boolean'
True was expected
[[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'null'
[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640] is too long
From schema: linux-imx/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml"
- refer to commit 281f1f99cf ("PCI: dwc: Detect number of iATU windows").
The num-viewport is not required anymore, remove them totally.
- dt_binding_check complains "compatible: ['fsl,imx6qp-pcie', 'snps,dw-pcie']
is too long", remove "snps,dw-pcie" from the compatible string.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the ADC nodes to the AST2600 devicetree. Enable ADC1 for Rainier and
Everest systems and add an iio-hwmon node for the 7th channel to report
the battery voltage.
Tested on Rainier:
~# cat /sys/class/hwmon/hwmon11/in1_input
1347
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210916210045.31769-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
The following warning is seen when the SPI GPIO driver probes:
gpio-expander@0 enforce active low on chipselect handle
The reason for this warning is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since the reg property was added to each channel node in commit
b86d3d21cd ("ARM: dts: imx6dl-yapp4: Add reg property to the lp5562
channel node") it is possible to skip unused channels.
Remove the actually unused white LED channel.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since the LED multicolor framework support was added in commit
92a81562e6 ("leds: lp55xx: Add multicolor framework support to lp55xx")
LEDs on this platform stopped working.
Author of the framework attempted to accommodate this DT to the
framework in commit b86d3d21cd ("ARM: dts: imx6dl-yapp4: Add reg property
to the lp5562 channel node") but that is not sufficient. A color property
is now required even if the multicolor framework is not used, otherwise
the driver probe fails:
lp5562: probe of 1-0030 failed with error -22
Add the color property to fix this.
Fixes: 92a81562e6 ("leds: lp55xx: Add multicolor framework support to lp55xx")
Cc: <stable@vger.kernel.org>
Cc: linux-leds@vger.kernel.org
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The MAC-Address of the MR32's sole ethernet port is
located in offset 0x66 of the attached AT24C64 eeprom.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
the switch identifies itself as a BCM53012 (rev 5)...
This patch has been tested & verified on OpenWrt's
snapshot with Linux 5.10 (didn't test any older kernels).
The MR32 is able to "talk to the network" as before with
OpenWrt's SWITCHDEV b53 driver.
| b53-srab-switch 18007000.ethernet-switch: found switch: BCM53012, rev 5
| libphy: dsa slave smi: probed
| b53-srab-switch 18007000.ethernet-switch poe (uninitialized):
| PHY [dsa-0.0:00] driver [Generic PHY] (irq=POLL)
| b53-srab-switch 18007000.ethernet-switch: Using legacy PHYLIB callbacks.
| Please migrate to PHYLINK!
| DSA: tree 0 setup
Reported-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM53573 family SoC have Ethernet switch connected to the first Ethernet
controller (accessible over MDIO).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
To match the new dts binding. Remove "subsys",unused
interrupt and slot node.Add "interrupt-names",
"linux,pci-domain" and pciecfg node.
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Link: https://lore.kernel.org/r/20210823032800.1660-7-chuanjia.liu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The partitions on the eMMC will not even appear sometimes, in the
datasheet for the Samsung KLMxGxxE4x we find that the power-on time
for a 4GB eMMC of this type is 300 ms and nowadays the block stack
is so fast so we are stressing it, and we need to specify that we
need this delay in the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
A new dtsi file for sama5d29 SoC is added which basically inherits the sama5d2
dtsi with the mac controller compatible property updated.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210812140758.28273-1-Hari.PrasathGE@microchip.com
This went unnoticed until commit 7897b071ac ("net: macb: convert
to phylink") which tickled the problem. The sama5d3 emac has never
been capable of rgmii, and it all just happened to work before that
commit.
Fixes: 21dd0ece34 ("ARM: dts: at91: add devicetree for the Axentia TSE-850")
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/ea781f5e-422f-6cbf-3cf4-d5a7bac9392d@axentia.se
With the conversion of rockchip,rk-timer.yaml the clock-names order
was set to "pclk", "timer", but nothing was fixed in the ARM dts section
of the mainline kernel, so the swap timer clock-names that don't fit.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points property expects values in
a uint32-matrix with 2 items, so fix the notifications by adding
angle brackets.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v1.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828091233.19992-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points-v2 property expects the nodename to have
the '^opp-table(-[a-z0-9]+)?$' format, so rename all Rockchip ARM dts
opp-table node names.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v2.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828094512.26862-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rv1108 gmac node is checked with rockchip-dwmac.yaml,
snps,dwmac.yaml and ethernet-controller.yaml.
The nodename should have a pattern: "^ethernet(@.*)?$",
so change to nodename.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828114240.12231-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The MK808 has a button inside the cover for the boot loader to do
some action. Add the adc-keys node to the rk3066a-mk808.dts file.
The rk3066 has a higher maximum DC supply voltage for the analog part of
SAR-ADC VDDA_SARADC of 2.75V then other Rockchip SoCs.
For the "rockchip,saradc" node is a vref-supply property required,
so add a regulator for it as well.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828092755.24560-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
MT7623 has an musb controller that is compatible with the one from MT2701.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210830155903.13907-2-mans0n@gorani.run
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
According to YAML validation, and for a future patchset putting this
xo_board reference clock to use as VCO reference parent, add the missing
clock to dsi_phy0.
Fixes: 5a9fc531f6 ("ARM: dts: msm8974: add display support")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210830175739.143401-1-marijn.suijten@somainline.org
APQ8064 was last user of gpu-pwrlevels inside mainline tree, so convert
it now.
Tested on Nexus 7 2013, no functional changes.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-3-david@ixit.cz
The legacy clock names (including the _clk suffix) was dropped from the
driver, so update the dts accordingly).
Tested on Nexus 7 2013, no functional changes.
Signed-off-by: David Heidelberg <david@ixit.cz>
[bjorn: Updated commit message]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-2-david@ixit.cz
The 'motherboard-bus' node in Arm Ltd boards fails schema checks as
'simple-bus' child nodes must have a unit-address. The 'ranges' handling is
also wrong (or at least strange) as the mapping of SMC chip selects should
be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus'
node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges'
should be moved down a level. The latter change is more simple, so let's do
that. As the 'ranges' value doesn't vary for a given motherboard instance,
we can move 'ranges' into the motherboard dtsi files.
Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Add Exegin Q5xR5. The base device tree is from OpenWrt tree and with
the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.
[osk: original author of patch in OpenWrt]
[claudiu.beznea: use "&<label> {" syntax, sorted nodes in alphabetical
order, adapted flash to new support in kernel 5.14, use proper
compatibles according to kernel 5.14, use macros instead of
hardcoded numbers for pinctrl phandles and for all pinctrl references,
add pinctrl-names, pinctrl-X where necessaray]
Signed-off-by: Owen Kirby <osk@exegin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-8-claudiu.beznea@microchip.com
Add CalAmp LMU5000 board. The base device tree is from OpenWrt tree and
with the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.
[porter.adam: original author of patch in OpenWrt]
[claudiu.beznea: fixed compilation warnings, use &<lable> syntax,
sorted nodes in alphabetical order, adapted flash to new support
in kernel 5.14, use proper compatibles according to kernel 5.14,
use macros instead of hard coded numbers for pinctrl phandles and
for all pinctrl references, add pinctrl-names, pinctrl-X where
necessary]
Signed-off-by: Adam Porter <porter.adam@gmail.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-5-claudiu.beznea@microchip.com
The ADC controller on the board is fed by a 2.5V reference voltage.
By default the channels #14 and #15 are dedicated to analog input
(marked AN on the board), on the connectors mikrobus1 and mikrobus2.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210901123013.329792-11-eugen.hristev@microchip.com
SAMA5D27 WLSOM1 boards has a WILC3000 device soldered. Add proper
device tree nodes for this.
[eugen.hristev: original author of this code]
[claudiu.beznea: adapt such that make dtbs_check is happy, remove status
for wifi_pwrseq and wifi nodes]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[nicolas.ferre: original author of this code]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20210825094055.642941-1-claudiu.beznea@microchip.com