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9 Commits

Author SHA1 Message Date
Linus Torvalds 1849f800fb ARM: Device-tree updates
Device-tree continues to see lots of updates. The majority of patches
 here are smaller changes for new hardware on existing platforms, and
 there are a few larger changes worth pointing out.
 
 New machines:
 
 - The new Action Semi S500 platform is added along with initial
   support for the LeMaker Guitar board.
 
 - STM32 gains support for three new boards: stm32h743-disco,
   stm32f746-disco, and stm32f769-disco, along with new device
   support for the existing stm32f429 boards.
 
 - Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H
   with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module
   plus board.
 
 - On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
   wireless router.
 
 - For NXP i.MX, we gain support for the Gateworks Ventana GW5600
   and the Technexion Pico i.MX7D single-board computers.
 
 - The BeagleBone Blue is added for OMAP, it's the latest variation
   of the popular Beaglebone Black single-board computer.
 
 - The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards
   are added, these are the latest variations of a seemingly endless
   supply of similar single-board computers.
 
 Other updates:
 
 - Linus Walleij improves support for the "Faraday" based SoC platforms
   from various SoC makers (Moxart, Aspeed, Gemini)
 
 - The ARM Mali GPU is now describe on Rockchips SoCs
 
 - Mediatek MT7623 is extended significantly, making it much
   more useful.
 
 - Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
   Allwinner, Qualcomm, iMX
 
 - For Amlogic, the clock support is extended a lot on meson8b.
 
 - We now build the devicetree file for the Raspberry Pi 3 on 32-bit
   ARM, in addition to the existing ARM64 support, to help users
   wanting to run a 32-bit system on it.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
 "Device-tree continues to see lots of updates. The majority of patches
  here are smaller changes for new hardware on existing platforms, and
  there are a few larger changes worth pointing out.

  New machines:

   - The new Action Semi S500 platform is added along with initial
     support for the LeMaker Guitar board.

   - STM32 gains support for three new boards: stm32h743-disco,
     stm32f746-disco, and stm32f769-disco, along with new device support
     for the existing stm32f429 boards.

   - Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with
     10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus
     board.

   - On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
     wireless router.

   - For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and
     the Technexion Pico i.MX7D single-board computers.

   - The BeagleBone Blue is added for OMAP, it's the latest variation of
     the popular Beaglebone Black single-board computer.

   - The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are
     added, these are the latest variations of a seemingly endless
     supply of similar single-board computers.

  Other updates:

   - Linus Walleij improves support for the "Faraday" based SoC
     platforms from various SoC makers (Moxart, Aspeed, Gemini)

   - The ARM Mali GPU is now describe on Rockchips SoCs

   - Mediatek MT7623 is extended significantly, making it much more
     useful.

   - Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
     Allwinner, Qualcomm, iMX

   - For Amlogic, the clock support is extended a lot on meson8b.

   - We now build the devicetree file for the Raspberry Pi 3 on 32-bit
     ARM, in addition to the existing ARM64 support, to help users
     wanting to run a 32-bit system on it"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (345 commits)
  ARM: dts: socfpga: set the i2c frequency
  ARM: dts: socfpga: Add second ethernet alias to VINING FPGA
  ARM: dts: socfpga: Drop LED node from VINING FPGA
  ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA
  ARM: dts: socfpga: Enable QSPI support on VINING FPGA
  ARM: dts: socfpga: Fix the ethernet clock phandle
  ARM: pxa: Use - instead of @ for DT OPP entries
  ARM: dts: owl-s500: Add SPS node
  ARM: dts: owl-s500: Set CPU enable-method
  dt-bindings: arm: cpus: Add S500 enable-method
  ARM: dts: Add Actions Semi S500 and LeMaker Guitar
  dt-bindings: arm: Document Actions Semi S900
  dt-bindings: timer: Document Owl timer
  ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
  dt-bindings: arm: Document Actions Semi S500
  dt-bindings: Add vendor prefix for Actions Semi
  ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
  ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
  ARM: dts: armada-385-linksys: fixup button node names
  ARM: dts: armada-385-linksys: group pins in pinctrl
  ...
2017-07-04 14:37:25 -07:00
Corentin Labbe 0eba511a3c arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000
speed.

This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree.
SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:05:03 +02:00
Corentin Labbe d91d3daf5d arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
This patch add the dt node for the syscon register present on the
Allwinner H3/H5

Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock..

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:05:01 +02:00
Chen-Yu Tsai 98d87eb566 ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Now that the R_CCU device tree binding headers have been merged, we
can convert the raw number references in the device trees to use the
defined macros.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:04:58 +02:00
Chen-Yu Tsai 77125a701a ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-03 10:04:48 +08:00
Icenowy Zheng a27b49b8af ARM: sunxi: h3/h5: fix the compatible of R_CCU
The R_CCU of H3/H5 currently wrongly used A64 R_CCU compatible.

Fix it by changing it to the correct H3 compatible.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-14 08:33:17 +02:00
Icenowy Zheng d7bb5b9661 ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu
Now we have driver for the PRCM CCU, switch to use it instead of
old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi .

The mux 3 of R_CCU is still the internal oscillator, which is said to be
16MHz plus minus 30%, and get a measured value of 15MHz~16MHz on my two
H3 boards and one H5 board.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04 17:45:24 +02:00
Icenowy Zheng da89e1d5cb ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
or MUSB controller.

Add device nodes for these controllers.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 13:43:21 +02:00
Andre Przywara 0127216f22 arm: sun8i: h3: split Allwinner H3 .dtsi
The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the
Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller
updated. So we should really share almost the whole .dtsi.
In preparation for that move the peripheral parts of the existing
sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi.
The actual sun8i-h3.dtsi then includes that and defines the H3 specific
parts on top of it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Icenowy: also split out mmc and gic, as well as pio and ccu's
 compatible, and make drop of skeleton into a seperated patch]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 13:40:53 +02:00