Commit Graph

17 Commits

Author SHA1 Message Date
Ralf Baechle 41c594ab65 [MIPS] MT: Improved multithreading support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:28 +02:00
Ralf Baechle 15c4f67ab8 [MIPS] Provide access functions for c0_badvaddr.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:13 +02:00
Ralf Baechle 264879576c MIPS: DSP: Put mask field into the right place.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:05 +00:00
Ralf Baechle 340ee4b98c Virtual SMP support for the 34K.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:10 +01:00
Ralf Baechle 0952e2905c Fix parenthesis in macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:08 +01:00
Pete Popov bdf21b18b4 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:54 +01:00
Ralf Baechle 8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller
options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:51 +01:00
Ralf Baechle 699dbc90e8 Macros to access the register of processors using the new MIPS
Multithreading ASE, also know as MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
new file mode 100644
2005-10-29 19:31:51 +01:00
Ralf Baechle 7a0fc58cd9 A few more macros to access MIPS R2 architecture registers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:49 +01:00
Ralf Baechle e20368d5df Get the thing to compile again ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:28 +01:00
Maciej W. Rozycki c6ad7b7d3c Use macros for the RM7k cp0.config bits instead of magic numbers.
Minor clean-ups.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:28 +01:00
Ralf Baechle 478489dd2c Remove dead code which was causing warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:19 +01:00
Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:17 +01:00
Ralf Baechle 4194318c39 Cleanup decoding of MIPSxx config registers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:12 +01:00
Thiemo Seufer ba5187dbb4 Better interface to run uncached cache setup code.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:11 +01:00
Ralf Baechle 0efe27617e Provide functions to access cop0 config4-7 registers
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:25 +01:00
Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00