Remove the mailbox attribute data, irq info and hwmod addr space
data that are used for creating the legacy-style mailbox devices,
there is no need for these as the support for legacy-mode for this
IP is being dropped.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The legacy-style device creation logic for hwspinlock
has been removed after the DT-support was added to the
driver. The hwmod addr space for spinlock is therefore
no longer needed, so remove it.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The legacy-style device creation logic for hwspinlock
has been removed after the DT-support was added to the
driver. The hwmod addr space for spinlock is therefore
no longer needed, so remove it.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
GPMC address information is provided by device tree. No longer need
to include this information within hwmod.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
[paul@pwsan.com: fixed chip names in subject line]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
There are some differences of mobile storage host between exynos3250
and exnos5250. For example, exynos3250 supports the HS400 mode, but
exynos5250 doesn't support it.
Since exynos3250 can perform the similar function with exynos5420
compatible, this patch changes the compatible from exynos5250 to
exynos5420 for mshc.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Include asm-generic/msi.h to support CONFIG_GENERIC_MSI_IRQ_DOMAIN.
This fixes a compilation error:
include/linux/msi.h:123:21: fatal error: asm/msi.h: No such file or directory
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
- Add a few low power mode related devices and touch controller for
i.MX6UL.
- Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
and eMMC5.0.
- i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
LCD, touch and wifi support, add new boards Nitrogen6_Lite and
Nitrogen6_Max.
- Enable touch screen and NAND Flash controller for a few Vybrid
devices.
- Some random and small updates on LS1021A and MXS support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWJQUPAAoJEFBXWFqHsHzOo+cH/irx+abVdFV97q6M0VwFsQ3/
Tf4/CsdiTjM5ZDrKZEtXzP8BZl+ZO4tQXLspP+wVceQ+PVUiVvdAHu0l68iuJRrA
+Bj9VrLIzMDf7FVpzbZHZD3kd1NALGh/5i0TerkuZMNl1KH57HyGjLnjKH43n7uz
mFPeZFAQMwSjEnRJj/6217Itqi+LurARJsnXQs6uhQ7feSsA88HU3EQ8QsiZqiAu
MULAJBYaE09shlokuXIKx67t8outdb8C0Uue64nt42y8NR0m5eVVG7NJoF+23T6C
CRX5zveYa7D2QXTkihvjdRpazhLiPnwV3RCVejLOZMk0G14hD9U39jkTp+9ws1w=
=kPBq
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree changes for 4.4:
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
- Add a few low power mode related devices and touch controller for
i.MX6UL.
- Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
and eMMC5.0.
- i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
LCD, touch and wifi support, add new boards Nitrogen6_Lite and
Nitrogen6_Max.
- Enable touch screen and NAND Flash controller for a few Vybrid
devices.
- Some random and small updates on LS1021A and MXS support.
* tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
ARM: dts: ls1021a: Add quirk for Erratum A009116
ARM: imx6sx-sdb: Fix typo in regulator enable GPIO property
ARM: dts: imx6: phyFLEX: fix typo in "pinctrl-names"
ARM: dts: imx6: change the core clock of spdif
ARM: dts: vf-colibri: enable NAND flash controller
ARM: dts: vf610twr: add NAND flash controller peripherial
ARM: dts: imx: add Boundary Devices Nitrogen6_Lite board
ARM: dts: imx: add Boundary Devices Nitrogen6_Max board
ARM: dts: imx6dl-nitrogen6x: change manufacturer to Boundary Devices
ARM: dts: imx6q-nitrogen6x: change manufacturer to Boundary Devices
of: Add Boundary Devices Inc. vendor prefix
ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
ARM: dts: imx6qdl-nitrogen6x: relicense under GPLv2/X11
ARM: dts: imx6qdl-nitrogen6x: add wifi wl1271 support
ARM: dts: imx6dql-nitrogen6x: add touchscreen support
ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
ARM: dts: imx6qdl-nitrogen6x: add Okaya LCD panel
ARM: dts: vf500-colibri: Add device tree node for touchscreen support
ARM: dts: i.MX35: fix cpu compatible value
ARM: dts: i.MX31: fix cpu compatible value
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable suspend and cpufreq support for i.MX6UL
- Add platform level ENET initialization support for i.MX7D
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWJP9yAAoJEFBXWFqHsHzOJvQH/3sncCMvFmOXX1hBJzb4BzE6
4Ke4AC39v1TuviNkVZooMiVlW5uf4tvyvyv47GjF88yRsHJmvt1s0T7502v4+dib
Ak6dj58uqdC4yj6RF5eZBwqHV4s3nZbESYt4Dr17rka/HqhvhH7yxFpWBzPWqLUb
YK5nlyBe8r9Mrsgr8mkFEKHmzgMhOTlomkUk3f5BL7TjrRCA+b5Czed/P0hZ7OVx
cIqALqMregcqmvH21bA6feSs1NARLfcBraWH4/YxSRFrXng8XCb1bGF6P8U78bSz
aQ6VZFWEInJBNKfQR+5N5+yfPnm25AIAHdqv1cyIODBPbFy7t5hyyzdmtEmNskM=
=naPW
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
The i.MX SoC updates for 4.4:
- Enable suspend and cpufreq support for i.MX6UL
- Add platform level ENET initialization support for i.MX7D
* tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: add cpufreq device for imx6ul
ARM: imx: add enet init for i.MX7D platform
ARM: imx7d: add imx7d iomux-gpr field define
ARM: imx: add suspend/resume support for i.mx6ul
Signed-off-by: Olof Johansson <olof@lixom.net>
The regualtor-compatible binding is deprecated, instead the node name
is used.
Mediatek timer driver supports as well mt8127, mt8135 and mt8173. Add
these SOCs to the bindings list.
Power domains venc and venc_lt need clocks two extra clocks to access
their registers. We update the bindings documentation about this.
Update SMP bindings documentation by adding support for mt6589 and mt81xx SOCs.
Update mt8127.dtsi and mt8135.dtsi to enable SMP support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWI4nIAAoJELQ5Ylss8dNDznQQAK9O/IgeKz069P+UT/HxnflC
K21RbkMX5KKej8QS23yqYxZVz+c2HyZLpYF5sAl/k9p5oMsm1EvfNVfDC7acWmfM
CY65ZgNOPixi9Yrd29qgN0IMtTzsQtMnS7dhiKloyZr9sszuRw0SHeAQOOjGFv2H
rZ+N7fbH3RH6vDeWIurVY8bNppu3FJNeIFm6xbotiXcQvsXX8hJjoN6E8BI7Rzg+
i/p80IEmGRFvxHebZjrRCgVFIdqIfo0M02kxNVc4erH+Z7mLOmHZuYXIg7S3825M
E5W+mJd6fqNh62qbPZUi2/0Y9TAsOPiIpxU+QDp2cBO37nse2/MeWPhJyg6DfCO/
RuC0Y+tJx1fxF+5+/7lkXeWqsvzo5twJTGcLu+D0pPSTVb5Gy0P9671QMJPBknf+
6zy4qqjSYNpsIz+OqbwlZHeQJEuDjt/DEVWqFmvW3DoUr5O8hRjHpFa4lJ6F084u
tvSkSOuiJKtO1htAZLeVmMQOYylAPxpxKTc1AqIcLIiBkgkNKhz7v43vtdwETNIv
8qkJVNKGF8WNDdskM2/GamlC2hTabw8kMoPxeYtqzZz5BYBALeOND0TvclEMecnh
nDzdTwlhJDdHOlT5hQ7ur9UecakFQSMzQnoJ35LbjU+lVKXOyFIphXuBAmlX7Fvi
hgbvHY7WClquwgKJ+PUF
=Lj7i
-----END PGP SIGNATURE-----
Merge tag 'v4.3-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Delete regulator-compatible usage in mt8135-evbp1.dts.
The regualtor-compatible binding is deprecated, instead the node name
is used.
Mediatek timer driver supports as well mt8127, mt8135 and mt8173. Add
these SOCs to the bindings list.
Power domains venc and venc_lt need clocks two extra clocks to access
their registers. We update the bindings documentation about this.
Update SMP bindings documentation by adding support for mt6589 and mt81xx SOCs.
Update mt8127.dtsi and mt8135.dtsi to enable SMP support.
* tag 'v4.3-next-dts' of https://github.com/mbgg/linux-mediatek:
ARM: dts: mt8127: enable basic SMP bringup for mt8127
ARM: dts: mt8135: enable basic SMP bringup for mt8135
devicetree: bindings: add new SMP enable method Mediatek SoC
dt-bindings: soc: Add clocks for Mediatek SCPSYS unit
dt-bindings: add more MediaTek SoC to mtk-timer binding
ARM: dts: mt8135-evbp1: remove regulator-compatible usage
Signed-off-by: Olof Johansson <olof@lixom.net>
This fixes the corner-case where the pmic is initialized by the bootloader, but
not the pmic watchdog.
Add support for active wakeup to the scpsys. This allows to keep the power of
a scpsys domain during suspend state.
With version v4.3 new subsystem clocks are added to the clock dirver. In late
init the kernel turns off all unused clocks. This can provoke a hang if
the kernel tries to access the venc and venc_lt power domain registers.
Add the necessary parent clocks for this power domains to
the scpsys so that no random hang happens.
The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
As there is no opensource bootloader in the near future for this architectures
we enable the arch timer at kernel boot. We need the arch timer for SMP boot.
Add support for SMP on mt6589, mt8127 and mt8135.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWI4fcAAoJELQ5Ylss8dNDANYP/1hhCHTT3ssT0eURn+gGJX/e
f5J0dgX9KfJK7Ds0fznD6iMMHgp+EgK7WXI6vsO0VcbvokfS2KowS3NbeRKTnbTS
gmPOWvbFooHVIhzTom3serxyc9AgpnAG7WaRNxVD0CgaufeOlgbFtmOIdxze2cdE
S1ucq3JWJcpiCUaI3S9zRc3kkY9W/wpTEKNY98S4K3blKnWWT0sHSQxSGjoKy3wk
f1qhVjX82FeFizVSf5Ca6iqyXSFiO9gXQWvfVnS2kZE+gO/sh4df8tg8psxVqfqK
//3INxXhqkgkN4O3W+y3nUfSAQ5fElknnhiHaxAsl0PXFGMHROT3xtNR21syVkDh
dge/Eu34KyROPj68UbE2MnqnQbbSl2KbHsapT4ls8LiDWJPisjhhOmWL459eIS5X
+ycQniAxOpTgSIjYJnBwCBesru8OdfGNWRqm+SpGHyrClNtJt66/pK4AWEN2fgX4
eI8CeZ13uiuiQNmROOKRmTzSoG7ZBQMFK4g5Cy1Dl5bkGiJaednv6HnZoWqPZ4PG
isiOdsmiPsGB5GgvTpue996Nfc2kfHx2emr8+kxM8wejRWQJqmwLwTkX9bZ3dpFQ
7RGK46qN34tbJH/bgrck99Zgfg7OxChTQqVL0oTEjCCABK41clDFbguJiCV8SENw
uxtnI++cVFcUwxv7Qz0t
=iuHl
-----END PGP SIGNATURE-----
Merge tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc
Do the initial setting of the pmic wrap interrupt before requesting the interrupt.
This fixes the corner-case where the pmic is initialized by the bootloader, but
not the pmic watchdog.
Add support for active wakeup to the scpsys. This allows to keep the power of
a scpsys domain during suspend state.
With version v4.3 new subsystem clocks are added to the clock dirver. In late
init the kernel turns off all unused clocks. This can provoke a hang if
the kernel tries to access the venc and venc_lt power domain registers.
Add the necessary parent clocks for this power domains to
the scpsys so that no random hang happens.
The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
As there is no opensource bootloader in the near future for this architectures
we enable the arch timer at kernel boot. We need the arch timer for SMP boot.
Add support for SMP on mt6589, mt8127 and mt8135.
* tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: add smp bringup code
ARM: mediatek: enable gpt6 on boot up to make arch timer working
soc: mediatek: Fix random hang up issue while kernel init
soc: mediatek: add scpsys support active_wakeup
soc: mediatek: Move the initial setting of pmic wrap interrupt before requesting irq.
Signed-off-by: Olof Johansson <olof@lixom.net>
A bunch of defconfig changes to enable support for new drivers.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWIn+gAAoJEBx+YmzsjxAgquQP/20gRC/wzuxJPQkiN9NIrkWg
CTfDzr6Tbm1/Wu8HhfBAEPHLrRLQ9pSL+tQ8pYUOzS/1b/Jjs45qARqaJfhmfmAX
jz0Kp/VyqZ7vg81nutfp/QGK0EMst2izeKkmkI55WKVMJy+xZ3e7J9ED7XRJg7V5
+RU8P+/nCzFVc1gboYf2qa4rE+EW49E2jNV2MBpkU2TA8vqzyF7w/Ye5Rv20Q8Zo
kGpIxbDg9ua0Ak8TVgSX8ocq+wlqD5OyOIixTJ0X+MovHKGl0gDZ4Pj43XrZuGEj
0Wl3AIn69e0cVYatTWIvBT+LkntIVihfgsZsZg+QdcNfumxeJkYs4p56JCRaM2zf
JdqpRTjq/ueZ3WkwItK07mAoVshKrK5+IcAR8zhbOAWACQ9N1lHMIODnNIvLWveq
0R8eymRQN5yyYJ22o5Jc+EellWGmbLKC89QYnQPs8um2TlhTB4whlswa6UMi4DZP
1zWCixjGEuKTJIGRf+vdKQVJZrMEXVSWO9/TM6j2z0dPa6gOGu1Jfp9H2kZseXZ9
XfBr8CPiawkPpz4nQNxNgv4zYhRPRj1TltDsExpVUjjkQsNOMQpS6+l86uWEilaT
xW3R3FJ5h7kIhdR+FEi1/t1SZKlQbrniLZ+lMdxefFbMO9d7NBkNyPztL9fbI4Nv
bF8RmqZPK06kkYPVvBAq
=g7fp
-----END PGP SIGNATURE-----
Merge tag 'sunxi-defconfig-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig
Allwinner defconfig changes for 4.4
A bunch of defconfig changes to enable support for new drivers.
* tag 'sunxi-defconfig-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi_defconfig: enable MODULE_UNLOAD
can: Allwinner A10/A20 CAN Controller support - Defconfig
can: Allwinner A10/A20 CAN Controller support - Defconfig
ARM: sunxi_defconfig: Enable LRADC keys (KEYBOARD_SUN4I_LRADC)
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Allwinner R8 SoC used in the CHIP.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWInwoAAoJEBx+YmzsjxAgrsAQAIS7IN6NqaQRMv/H8pOGMqWH
tn2jCqQBavzIRJ8WK/ny+umkM1t7WC9kNVvU/hMO3LoFhjXRXDWZSBaIQv4dnGFM
o7Iw09A9pci4VDvUqnyUiLcYq2azhdKbjMSwVsWx92zWx3j2L+iG6d3FJrDDyNBT
eXDjsvuhQVxE653a9hon1aFFH28wbJhPvpzf31m0J96o4fmizvmyZvIB2cc8BBmy
qLnbhxCkG2FxDkM8vAXfpDF7ypDEzn/rG3/mHXX+tjDY3Fk+53WzAfIqBhnSPJzN
Zrv2ffn2K/n28rjUMSfSkThKGMTWriyKgNy+OosDrEUpX/FsU55BX5oNSDlDS9N5
0cK4dmHUwf1YIes5dum5XoeJd9Tq3vyJUsD7/+OhuMLTSyGxmjAZD6tu3ldmZ9pC
7Fwa8ZTr2YagmNwXdvxq6DbcLTEuNZH+7ztr/prhBn5DQfvPWTX+r4cKYjG9SApX
XVJ5UZb+zkTVPAUSVKJOdiiKmuiibkNAL4isMPj3KKqYIXdsMysgVmsDyr3b00B1
0K5zrDU0mjZHohfNJ3ppjilcLtq/iimH3UAgGa77vGYF3BPosf8kq96BbqL+s5Hx
CMbnA4FRpFdSvWXi1qiPwnN9BzU82OPVRti4o6OdY8BJlSg0dTp7ngnuIrz7HT5/
UWtveTP1w/ePlnlaY4NE
=o6P8
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Allwinner core changes for 4.4
Add support for the Allwinner R8 SoC used in the CHIP.
* tag 'sunxi-core-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Add R8 support
Signed-off-by: Olof Johansson <olof@lixom.net>
More DT patches for 4.4, mostly with new boards coming in (CHIP, BananaPi
M2, pcduino2), further consolidation for the q8-based designs and a bunch
of random patches enhancing support for existing boards
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWInnmAAoJEBx+YmzsjxAg6u8P/AvVaiwT4/XrwD1G4ms47+kq
gRFLJ5xqWWnY0285Uaf4A33fU60dIJwYz4qbAiHdCOWZ+/bQy1lVNiB1o+RdKjIh
zJHYbpKKREArwoanw9JogwpeSBVU5QnsoHeEHxPfYWHBnluU8cfKeS6Xgd1CQz1G
oV00i4H0HjBNbEJCbZnyGPbZoeFbzkpFJ8Pb26W2Xv6bG4dwH7uI/Kzq672G+Uop
uPa908Gwvid/HFNI4pQKgg1JGk6F08zM1pO9HwHdF3bxUs6Jl7IDnxhv7Q1BpbYo
u6vNs7YP8SzUoTAlaEDwdCLUtH0S/PZs+ZkAMo43JAztFXHmf72HDId+XTznqQkZ
nEk5p6yUAykSAGlXf3nj2ET6jlitjUqkhk909YpcowAlTloEjbdbijabixZgDfql
jqF8WNSc3ilYrqTl+3TGsP+GupTQdl0S7XFyBgCTAQFhOTFPf6UognWJfWEmnHuR
/lTRjPTt84DZ0o1zCHLfzpHFCE/jP+lGDmLc7aOQLxVZuUK4KsIjyilNGIcJgLKv
dQNNHQKAi15KMLuLzhnxfmcCBTr0FxIgvlZEW/BeQ5O+LIbAYw0wPRyxiPuYdHTf
Ro3z6Osex0YFSmjyGiKH3NaqbEAHfmPJB/SoGsbcmWcRSX+yPLYs/6wB3P3vgfmO
Jd2TnpNnEGGaX6oUuPoG
=vcTX
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Allwinner DT changes for 4.4, round 2
More DT patches for 4.4, mostly with new boards coming in (CHIP, BananaPi
M2, pcduino2), further consolidation for the q8-based designs and a bunch
of random patches enhancing support for existing boards
* tag 'sunxi-dt-for-4.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (27 commits)
ARM: dts: sun6i: Add a dts file for the Sinovoip BPI-M2 board
ARM: dts: sun6i: Add mmc2_pins_a pinmux setting to sun6i-a31.dtsi
ARM: dts: sunxi: Fix interrupt-cells for [r]pio on A23/A31/A33/A80
ARM: dts: sun8i: Add NMI interrupt controller node
ARM: dts: sun6i: hummingbird: Enable AXP221 DC5LDO regulator as "vdd-cpus"
ARM: dts: sun6i: hummingbird: Use axp22x.dtsi for AXP221 regulators
ARM: dts: sun6i: hummingbird: Fix VDD-CPU and VDD-GPU regulator names
ARM: dts: sun7i: Add regulator configuration for pcDuino v3 Nano
ARM: dts: sun6i: Turn on gmac on Colombus
ARM: dts: sun8i: Make et-q8-v1.6.dts a symlink to q8-tablet.dts
ARM: dts: sun8i: Make ippo-q8h-v*.dts a symlink to q8-tablet.dts
ARM: dts: sun8i: Add sun8i-a23-q8-tablet.dts file
ARM: dts: sun5i: Add backlight node to sun5i-q8-common.dtsi
ARM: dts: sunxi: Enable PWM controller on Q8 format tablets
ARM: dts: sun5i: Add PWM channel 0 pinmux setting for A13/A10s
ARM: dts: sun5i: Add PWM controller node for A13 / A10s
ARM: sun5i: Add C.H.I.P DTS
ARM: dts: sunxi: Add dtsi for AXP22x PMIC
ARM: dts: sun7i: Correct USB regulators on pcDuino v3 Nano
ARM: sun5i: dt: Add UART3 CTS and RTS pins
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Update the v7 defconfig witth usefull config for the Seagate NAS
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYiY+EACgkQCwYYjhRyO9WANACfdPTeOBofTpIFChzcNlg823Su
BIYAn1XQ+oxXKt/mmh0xWRJGcIEKQJPP
=+DPM
-----END PGP SIGNATURE-----
Merge tag 'mvebu-config-4.4-1' of git://git.infradead.org/linux-mvebu into next/defconfig
mvebu config for 4.4 (part 1)
Update the v7 defconfig witth usefull config for the Seagate NAS
* tag 'mvebu-config-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: enable options for Seagate NAS in mvebu_v7_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
This cycle is bigger than usual :
- magician was greatly enhanced (new IPs discovered, ...)
- almost all legacy board files have been updated to the
new PWM API (mostly for backlight control)
- some minor fixes in raumfeld, z2 and mioa701
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWIUerAAoJEAP2et0duMsSXJMP/1kwWNgYQ31/cfiOthod6pR3
HTNSGbtA6bSAflb1/TQ79+PvAVa0JOBF9Hl22+EwSwsc/e005sMgxcw+bsOraSF4
5Xf8jCTL6kjbusCFJER7WRo1/io5IU/rXTjmH5+XbfaKx9DsJqifvMosCukm+84b
7hGZ5lQRNVMkDd4RmrBi6C0OBVrhnpH7bzCrTFvKTKGpIs/EPvuyZz5LJT8Qyvcg
oDGneKAB+Xj0NoKnXB1kJgCufx6zYH7sQf6aG9Riul0shFvN3qC0QrOTpj/CO40y
bQzrObvIL87n8YtaqsDbl9tGcs1MhuQIf5Z8xhzVs2qXF3K4Yd4zhMM9gqzpxVXc
gIlQ/a+eaLfMNBFwB55ER/cDxzglCpxsYZi6uCVejapY+dm0l2noZMeeT5RvinHf
xuVQyBZrl/IOIiZWed7/ZcGsZzS9AtkLu4FvhZO9y7HNkBdNO9QTpxR+LADkAz8F
dnvXiSiiESmOsvDsawsgFYcz5GrltxPSGYNGVKpbsq4F5w3t3aNn9znrX6mwFEo1
tVS1xxt5+v90O4bMv1xTWLLugJJi+YD0naosZxUNuQ6jeCks+EzZ1RMXxWkOdD9x
F5Trh2xYDnr8wOqhVVkGDTwZeEwaHkxIiVK/CBUswOvS4VpyjT1gMuYk7PmXSnrE
z8/k/nV2zQ6aFKohGai2
=wWU6
-----END PGP SIGNATURE-----
Merge tag 'pxa-for-4.4' of https://github.com/rjarzmik/linux into next/cleanup
This is the pxa changes for v4.4 cycle.
This cycle is bigger than usual :
- magician was greatly enhanced (new IPs discovered, ...)
- almost all legacy board files have been updated to the
new PWM API (mostly for backlight control)
- some minor fixes in raumfeld, z2 and mioa701
* tag 'pxa-for-4.4' of https://github.com/rjarzmik/linux: (44 commits)
ARM: pxa: remove incorrect __init annotation on pxa27x_set_pwrmode
ARM: pxa: raumfeld: make some variables static
ARM: pxa: magician: Remove pdata for pasic3-leds
ARM: pxa: magician: Add support for PXA27x UDC
ARM: pxa: magician: Add support for MAX1587A Vcore regulator
ARM: pxa: magician: Change comments to be more informative
ARM: pxa: magician: Move platform_add_devices() to the end of magician_init()
ARM: pxa: magician: Add missing regulator for PWM backlight
ARM: pxa: magician: Add debug message for backlight brightness function
ARM: pxa: magician: Remove definition of the STUART port
ARM: pxa: magician: Fix wrongly enabled USB host ports
ARM: pxa: magician: Fix support for Intel Strata NOR Flash
ARM: pxa: magician: Fix redundant GPIO request for pxaficp_ir
ARM: pxa: magician: Fix platform data for both PXA27x I2C controllers
ARM: pxa: magician: Fix and add charging detection functions
ARM: pxa: magician: Optimize Samsung LCD refresh to 50Hz
ARM: pxa: magician: Rename charger cable detection EGPIOs
ARM: pxa: magician: Optimize powerup delays for Samsung LCD
ARM: pxa: magician: Rename abstract LCD GPIOs
ARM: pxa: magician: Add new discovered EGPIO pins
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The broken-idle option can be activated from the coherency-fabric DT
node. This property allows to disable the idle capability, when the
hardware doesn't support it, like the Seagate Personal Cloud boards.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Call disable_percpu_irq on CPU_DYING and enable_percpu_irq when the cpu
is coming up.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Julien Grall <julien.grall@citrix.com>
Build cpu_hotplug for ARM and ARM64 guests.
Rename arch_(un)register_cpu to xen_(un)register_cpu and provide an
empty implementation on ARM and ARM64. On x86 just call
arch_(un)register_cpu as we are already doing.
Initialize cpu_hotplug on ARM.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Swiotlb is used on ARM64 to support DMA on platform where devices are
not protected by an SMMU. Furthermore it's only enabled for DOM0.
While Xen is always using 4KB page granularity in the stage-2 page table,
Linux ARM64 may either use 4KB or 64KB. This means that a Linux page
can be spanned accross multiple Xen page.
The Swiotlb code has to validate that the buffer used for DMA is
physically contiguous in the memory. As a Linux page can't be shared
between local memory and foreign page by design (the balloon code always
removing entirely a Linux page), the changes in the code are very
minimal because we only need to check the first Xen PFN.
Note that it may be possible to optimize the function
check_page_physically_contiguous to avoid looping over every Xen PFN
for local memory. Although I will let this optimization for a follow-up.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
With 64KB page granularity support, the frame number will be different.
It will be easier to modify the behavior in a single place rather than
in each caller.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
The hypercall interface is always using 4KB page granularity. This is
requiring to use xen page definition macro when we deal with hypercall.
Note that pfn_to_gfn is working with a Xen pfn (i.e 4KB). We may want to
rename pfn_gfn to make this explicit.
We also allocate a 64KB page for the shared page even though only the
first 4KB is used. I don't think this is really important for now as it
helps to have the pointer 4KB aligned (XENMEM_add_to_physmap is taking a
Xen PFN).
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
The Xen interface is using 4KB page granularity. This means that each
grant is 4KB.
The current implementation allocates a Linux page per grant. On Linux
using 64KB page granularity, only the first 4KB of the page will be
used.
We could decrease the memory wasted by sharing the page with multiple
grant. It will require some care with the {Set,Clear}ForeignPage macro.
Note that no changes has been made in the x86 code because both Linux
and Xen will only use 4KB page granularity.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
They are not used in common code expect in one place in balloon.c which is
only compiled when Linux is using PV MMU. It's not the case on ARM.
Rather than worrying how to handle the 64KB case, drop them.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Most of the changes this time are for incorrect device nodes in various
ways, on on imx, berlin, exynos, ux500, uniphier, omap and meson.
Chen-Yu Tsai now co-maintains mach-sunxi (Allwinner).
Other bug fixes include
* a partial revert of a broken tegra gpio patch
* irq affinity for arm ccn
* suspend on one Armada 385 machine
* enable ZONE_DMA to avoid an OMAP crash for over 2GB RAM
* turning on a regulator on beagleboard-x15 for HDMI
* making the omap gpmc debug code visible
* setup of orion network switch
* a rare build regression for pxa
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVikCQmCrR//JCVInAQJFyw//e7DkURra1xRIHx2gh2oE3w13FSM492w9
iCshJLDjRjRJ37S8m9ipjr7MCR6l4jzaB/TUJIjhS7eyRr9oIvuWRb5+sPMiUop6
y5vd4vlmhcD2sE5vmG+GLlFLozPcMNSxsq95DjirxiCuCkbKzkeaHpTwjKf08DdI
FFIYTsDhsKiVqh2L92y9y8ZqS6l76Z2llWt97FV8WG8/y3FX9T/kM5uC9TrS5tb8
GggGk2Pm/LZas5CPH+yc9ihQ1lbdkCkPbZNwlYjutmm0axiIC1BojmYZSrsR6obd
8Phwc7DkSbnPM8qAfvxmeyxvF2Th/ArNnVcrrEoavltGg6t3WPFgjiGXmXBU/IOw
B+UwxzS1LmNdJMTOttVkr/XJR28mNqg9yMbwR5DKkzqbs2dxUVJbZV1DX9sbYPfx
7JYdfkh/Tw2G+xeZEz157w16xPBxVK7toGIrVCPRpPXSANvF6P/QzPpJ09Wo4Fjp
LVD2HTDmye2lNyLK5qq1Q1kIzueb7Jktf70XJZNk1p/8r9xUOhjaVHqAyfDtNZNe
lLQtscQtx6BG2cv1bDaNaznFIzfJ9y1c+4odCILzi28V2Ji2qQ4SQ74jjVeAhsUc
5Lm58P9a8YY++gmwwgh1a6l45zB/3d+/UTdD08F3lz6Jt0gKSZhSxni3QkvfAibd
NB4FSTL0gLo=
=3g0Z
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Most of the changes this time are for incorrect device nodes in
various ways, on on imx, berlin, exynos, ux500, uniphier, omap and
meson.
Chen-Yu Tsai now co-maintains mach-sunxi (Allwinner).
Other bug fixes include
- a partial revert of a broken tegra gpio patch
- irq affinity for arm ccn
- suspend on one Armada 385 machine
- enable ZONE_DMA to avoid an OMAP crash for over 2GB RAM
- turning on a regulator on beagleboard-x15 for HDMI
- making the omap gpmc debug code visible
- setup of orion network switch
- a rare build regression for pxa"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
ARM: OMAP2+: Fix imprecise external abort caused by bogus SRAM init
thermal: exynos: Fix register read in TMU
ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory
ARM: tegra: Comment out gpio-ranges properties
ARM: dts: uniphier: fix IRQ number for devices on PH1-LD6b ref board
drivers/perf: arm_pmu: avoid CPU device_node reference leak
bus: arm-ccn: Fix irq affinity setting on CPU migration
bus: arm-ccn: Handle correctly no-more-cpus case
ARM: mvebu: correct a385-db-ap compatible string
ARM: meson6: DTS: Fix wrong reg mapping and IRQ numbers
MAINTAINERS: Update Allwinner entry and add new maintainer
ARM: ux500: modify initial levelshifter status
ARM: pxa: fix pxa3xx DFI lockup hack
Documentation: ARM: List new omap MMC requirements
memory: omap-gpmc: dump "before" state before first modification
memory: omap-gpmc: Fix unselectable debug option for GPMC
ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on
ARM: dts: Fix audio card detection on Peach boards
ARM: EXYNOS: Fix double of_node_put() when parsing child power domains
ARM: orion: Fix DSA platform device after mvmdio conversion
...
This will give us the ability to set the pixel and HDMI state machine
clocks for the VC4 KMS driver, change the CPU frequency, and
potentially gate clocks in the future (once we also write a power
domain driver). It also gives the uart an explicit clock reference,
so that we don't need to change the physical addresses of the old
fixed clk_bcm2835.c clocks for Raspberry Pi 2 port.
Two clocks get their frequencies updated as a result of this. One is
uart's apb_pclk, which was previously accidentally grabbing the fixed
uart0_pclk due to the apb_pclk not having clk_register_clkdev()
called. The uart doesn't seem to do anything with apb_pclk other than
make sure it's on, so that appears safe (also, as far as I can see,
the apb clock is actually the same as the VPU clock). The other is
EMMC, which according to the docs was supposed to be in the 50-100Mhz
range, but it turns out the firmware needed to change to running it at
the 250Mhz core clock speed to avoid a bug in clock domain crossing.
Additionally, anything using BCM2835_CLOCK_VPU will now have a correct
clock rate if the user configures the boot-time core clock speed using
config.txt.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
The MSI Primo81 is an A31s based tablet, with 1G RAM, 16G NAND,
768x1024 IPS LCD display, mono speaker, 0.3 MP front camera, 2.0 MP
rear camera, 3500 mAh battery, gt911 touchscreen, mma8452 accelerometer
and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons
(both volume buttons are also connected to the UBOOT_SEL pin). The
external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB
OTG and 3.5mm headphone jack.
USB OTG is enabled in host only mode. AXP221 USB power supply and
GPIO support are required for full USB OTG support.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Karsten Merker <merker@debian.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some boards, such as tablets, have regulators providing power to parts
of the display pipeline, like signal converters and LCD panels.
Add labels to the simplefb device nodes so that we can reference them
in the board dts files to add regulator supply properties.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This pull request is large with a total of 136 non-merge
commits. Because of its size, we will only describe the big things in
broad terms.
Many will be happy to know that dwc3 is now almost twice as fast after
some profiling and speed improvements. Also in dwc3, John Youn from
Synopsys added support for their new DWC USB3.1 IP Core and the HAPS
platform which can be used to validate it.
A series of patches from Robert Baldyga cleaned up uses of
ep->driver_data as a flag for "claimed endpoint" in favor of the new
ep->claimed flag.
Sudip Mukherjee fixed a ton of really old problems on the amd5536udc
driver. That should make a few people happy.
Heikki Krogerus worked on converting dwc3 to the unified device property
interface.
Together with these, there's a ton of non-critical fixes, typos and
stuff like that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWJoq5AAoJEIaOsuA1yqREOlkQAJTndRGxhcZR5rLzjyRDDags
pYoXJAqaneq5G8BwKY+2AQlPaUr87UEHUOo8pk4S31mdFHlp/d/6YIXLpdlYbEcW
ixGhtxZnUhyvWM0HYGgyoDGQP9YJXy5/MR2lEJhmsqcH/Q0dih5VrDGyJ3BxEboZ
2jXy7iou5fs5nHsR4fpdUH+ER//oKgHopRbbt+mmCwZbRJbuukA0KVDMHO8ix6cy
tG/8zbnv5RY3O4a0lJAST8LNmtpxfF9yUCs83b6muhLgO9GXUGYb+I8DjPJMbwag
klOy8Z1bG5e4ymh6383ZG7wDITf82N5cy5huoyunQHVjYg1L8vDHa9aF72e+yR/3
blb9OYALbKPV072HMwOfH+M9cvcCVDGytbJQIgMot9mjpP6GPhgbGtxb+RWNy2j8
Z2kEaxd3BUXvWiRbvyvn7uQuT/cAF4StrTnQrsbFSt0fKAUkQnGdK7XxYfGGql97
p3u2x2D7YSkurywMWyXjuBsm/mXsImAfTJvoWndyOIHU2PNAzIDM4k9TWaYNNAKA
ilZSuSC/JVnMPEH/J/QpytxMM5wbiGyJOyI4bc4MiAXgCkG3qm8vi0PMZM8x0rEu
q778B+50alg9U7/G75dt0WQP+kqDjn+iUB7i/YUC9sq/Dhlmpp48KvJU+zaco+7I
QsxGXmlgeA7yXX8ywy71
=jPoY
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.4 merge window
This pull request is large with a total of 136 non-merge
commits. Because of its size, we will only describe the big things in
broad terms.
Many will be happy to know that dwc3 is now almost twice as fast after
some profiling and speed improvements. Also in dwc3, John Youn from
Synopsys added support for their new DWC USB3.1 IP Core and the HAPS
platform which can be used to validate it.
A series of patches from Robert Baldyga cleaned up uses of
ep->driver_data as a flag for "claimed endpoint" in favor of the new
ep->claimed flag.
Sudip Mukherjee fixed a ton of really old problems on the amd5536udc
driver. That should make a few people happy.
Heikki Krogerus worked on converting dwc3 to the unified device property
interface.
Together with these, there's a ton of non-critical fixes, typos and
stuff like that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
The ARM architecture only saves the exit class to the HSR (ESR_EL2 for
arm64) on synchronous exceptions, not on asynchronous exceptions like an
IRQ. However, we only report the exception class on kvm_exit, which is
confusing because an IRQ looks like it exited at some PC with the same
reason as the previous exit. Add a lookup table for the exception index
and prepend the kvm_exit tracepoint text with the exception type to
clarify this situation.
Also resolve the exception class (EC) to a human-friendly text version
so the trace output becomes immediately usable for debugging this code.
Cc: Wei Huang <wei@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
We introduce kvm_arm_halt_guest and resume functions. They
will be used for IRQ forward state change.
Halt is synchronous and prevents the guest from being re-entered.
We use the same mechanism put in place for PSCI former pause,
now renamed power_off. A new flag is introduced in arch vcpu state,
pause, only meant to be used by those functions.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
In case a vcpu off PSCI call is called just after we executed the
vcpu_sleep check, we can enter the guest although power_off
is set. Let's check the power_off state in the critical section,
just before entering the guest.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reported-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
kvm_arch_vcpu_runnable now also checks whether the power_off
flag is set.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The kvm_vcpu_arch pause field is renamed into power_off to prepare
for the introduction of a new pause field. Also vcpu_pause is renamed
into vcpu_sleep since we will sleep until both power_off and pause are
false.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
vhost drivers provide guest VMs with better I/O performance and lower
CPU utilization. This patch allows users to select vhost devices under
KVM configuration menu on ARM. This makes vhost support on arm/arm64
on a par with other architectures (e.g. x86, ppc).
Signed-off-by: Wei Huang <wei@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The arch timer currently uses edge-triggered semantics in the sense that
the line is never sampled by the vgic and lowering the line from the
timer to the vgic doesn't have any effect on the pending state of
virtual interrupts in the vgic. This means that we do not support a
guest with the otherwise valid behavior of (1) disable interrupts (2)
enable the timer (3) disable the timer (4) enable interrupts. Such a
guest would validly not expect to see any interrupts on real hardware,
but will see interrupts on KVM.
This patch fixes this shortcoming through the following series of
changes.
First, we change the flow of the timer/vgic sync/flush operations. Now
the timer is always flushed/synced before the vgic, because the vgic
samples the state of the timer output. This has the implication that we
move the timer operations in to non-preempible sections, but that is
fine after the previous commit getting rid of hrtimer schedules on every
entry/exit.
Second, we change the internal behavior of the timer, letting the timer
keep track of its previous output state, and only lower/raise the line
to the vgic when the state changes. Note that in theory this could have
been accomplished more simply by signalling the vgic every time the
state *potentially* changed, but we don't want to be hitting the vgic
more often than necessary.
Third, we get rid of the use of the map->active field in the vgic and
instead simply set the interrupt as active on the physical distributor
whenever the input to the GIC is asserted and conversely clear the
physical active state when the input to the GIC is deasserted.
Fourth, and finally, we now initialize the timer PPIs (and all the other
unused PPIs for now), to be level-triggered, and modify the sync code to
sample the line state on HW sync and re-inject a new interrupt if it is
still pending at that time.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
We currently schedule a soft timer every time we exit the guest if the
timer did not expire while running the guest. This is really not
necessary, because the only work we do in the timer work function is to
kick the vcpu.
Kicking the vcpu does two things:
(1) If the vpcu thread is on a waitqueue, make it runnable and remove it
from the waitqueue.
(2) If the vcpu is running on a different physical CPU from the one
doing the kick, it sends a reschedule IPI.
The second case cannot happen, because the soft timer is only ever
scheduled when the vcpu is not running. The first case is only relevant
when the vcpu thread is on a waitqueue, which is only the case when the
vcpu thread has called kvm_vcpu_block().
Therefore, we only need to make sure a timer is scheduled for
kvm_vcpu_block(), which we do by encapsulating all calls to
kvm_vcpu_block() with kvm_timer_{un}schedule calls.
Additionally, we only schedule a soft timer if the timer is enabled and
unmasked, since it is useless otherwise.
Note that theoretically userspace can use the SET_ONE_REG interface to
change registers that should cause the timer to fire, even if the vcpu
is blocked without a scheduled timer, but this case was not supported
before this patch and we leave it for future work for now.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Some times it is useful for architecture implementations of KVM to know
when the VCPU thread is about to block or when it comes back from
blocking (arm/arm64 needs to know this to properly implement timers, for
example).
Therefore provide a generic architecture callback function in line with
what we do elsewhere for KVM generic-arch interactions.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Enable on-chip audio codec on the Marsboard A10.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- Add support for severals Armada-370-based Seagate NAS
- Fix Ready NAS device tree
- Modify SDHCI binding for A388-GP allowing using it on old and new
version of the board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYhOjIACgkQCwYYjhRyO9VTWACeJDBHZ1+ojF5irnZzNe/9PKaF
zJQAnjBmJxI1auTY+SQHVkZN3w2HOhwU
=Dvfj
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.4-2' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.4 (part 2)
- Add support for severals Armada-370-based Seagate NAS
- Fix Ready NAS device tree
- Modify SDHCI binding for A388-GP allowing using it on old and new
version of the board
* tag 'mvebu-dt-4.4-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: set SW polling as SDHCI card detection on A388-GP
arm: mvebu: reorder nodes under internal-regs by address in RN2120 .dts file
arm: mvebu: disable unused Armada RTC on ReadyNAS 102, 104 and 2120
ARM: mvebu: add DT support for Seagate Personal Cloud
ARM: mvebu: add DT support for Seagate NAS 2 and 4-Bay
Signed-off-by: Olof Johansson <olof@lixom.net>
Remove code related to Armada 375 Z1 stepping no more supported in mainline
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYhNdoACgkQCwYYjhRyO9XfRgCbBLfDDVPLhhVwT+Rh4M8dsP+g
ZLYAoKI884Me01F+dIDYmJVNypuHsj/g
=YgnH
-----END PGP SIGNATURE-----
Merge tag 'mvebu-cleanup-4.4-2' of git://git.infradead.org/linux-mvebu into next/cleanup
mvebu cleanup for 4.4 (part 2)
Remove code related to Armada 375 Z1 stepping no more supported in mainline
* tag 'mvebu-cleanup-4.4-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: remove the workaround imprecise abort fault handler
Signed-off-by: Olof Johansson <olof@lixom.net>
Now that __cpuinit has been removed, the __ref markings on these
functions are useless. Remove them. This also reduces the size of
the multi_v7_defconfig image:
$ size before after
text data bss dec hex filename
12683578 1470996 348904 14503478 dd4e36 before
12683274 1470996 348904 14503174 dd4d06 after
presumably because now we don't have to jump to code in the
.ref.text section and/or the noinline marking is removed.
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: <linux-omap@vger.kernel.org>
Cc: <linux-arm-msm@vger.kernel.org>
Cc: <spear-devel@list.st.com>
Cc: <linux-tegra@vger.kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Barry Song <baohua@kernel.org>
Acked-by: Andy Gross <agross@codeaurora.org>
Acked-by: Viresh Kumar <vireshk@kernel.org>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The keyboard driver for GPIO buttons(gpio-keys) checks for one of the
two boolean properties to enable gpio buttons as wakeup source:
1. "wakeup-source" or
2. the legacy "gpio-key,wakeup"
However juno, ste-snowball and emev2-kzm9d dts file have a undetected
"wakeup" property to indictate the wakeup source.
This patch fixes it by making use of "wakeup-source" property.
Cc: Magnus Damm <magnus.damm@gmail.com>
Acked-by: Simon Horman <horms@verge.net.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Now that the IRQCHIP_DECLARE macro has been moved to linux/irqchip.h,
it becomes possible to cleanup the open-coded versions of the same
macro that have been added to some private irqchips implementations.
Cc: Sascha Hauer <kernel@pengutronix.de>
Acked-by: Kukjin Kim <kgene@kernel.org>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Remove now unused legacy pm domain code
* Add missing of_node_put to pm-rmobile
* Corresct spelling of interrupt-names in renesas-memory-controller binding
documentation
* Correct signdness of CPU id in shmobile apmu implementation
* Make some functions static as appropriate
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHvIfAAoJENfPZGlqN0++VqsQAI+fxALXRc+tTii6UQmZJdZ4
vwHowfz2whPEbbyJfPik5yxL4/hhIaIt+xkRcheSQlF4GXrgXOKxFDio1+a0j6JA
hduM4UfAsA1FZ8ANA+9oGitqmvtz4mibNZHsQ7OyS7qas35TBJo1PfuLUoNGrewz
OqntlgY/wgw+Xrcc6YXxKx7OYTk8DEAx0ptd8szJL6/f67WWuDvf8sO7U5DwMBF1
7Ygb0dujW5e7bIIPFim4dZBwJPdhTZ8jJle0N4E/IvpGnVL+po3JaK4fD3ThcGa6
CpBrl1Uxhm4P1Zv/HNHsuwdddWRI0TzuvxC/mQz6M7ACQo6GVExoizUJVKrYGMyX
xMTK0N009dC7zWh7Ceg0jTzoXHmdb3sHfaZ5fsGnaXnB31+bCWVOeltNxUm+WxoC
1smSAWdXrc82d8CXghm4QvcVO2bGcW+t3IFTWCGt+JCQhNRbQN8XHIu5JtInBFvr
B98bDVTJBI0uZIjID8ohkMQcDUoejJNIloxUKnyn2bCeq/VNU7+WFssNbqsW6SEt
2NUdP89R4TrhWBtgbzIfphQKQ37llM/mtyIrlZz/tjuqRm6bkCFG5qTr0GqChNQL
8zo1ETyWiuE2tSm6trQPx/HgAPqsnW60gDuQUyV+QPyOJCQnuRFbglEdQ3cXu03q
wpVz9ttMdAAxIhOCWKRB
=XNZw
-----END PGP SIGNATURE-----
Merge tag 'renesas-cleanup2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Second Round of Renesas ARM Based SoC Cleanup for v4.4
* Remove now unused legacy pm domain code
* Add missing of_node_put to pm-rmobile
* Corresct spelling of interrupt-names in renesas-memory-controller binding
documentation
* Correct signdness of CPU id in shmobile apmu implementation
* Make some functions static as appropriate
* tag 'renesas-cleanup2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: R-Mobile: add missing of_node_put
ARM: shmobile: dt: Rename incorrect interrupt related binding
ARM: shmobile: apmu: correct type of CPU id
ARM: shmobile: r8a7779: Remove legacy PM Domain remainings
ARM: shmobile: r8a7778: Make r8a7778_init_irq_dt() static
ARM: shmobile: smp: Make shmobile_smp_apmu_cpu_shutdown() static
Signed-off-by: Olof Johansson <olof@lixom.net>
Some drivers used on a Marvell Berlin kernel were missing from
multi_v7_defconfig. This series add them:
* The pxa168 Ethernet driver is added as a loadable module.
* The Berlin ADC driver is added as a loadable module.
* Both the Berlin USB PHY and SATA PHY drivers are added,
built-in, as they are required for the already available USB
and SATA functionalities in multi_v7_defconfig.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The Point of View protab2-ips9 is a tablet with a 9" ips 1024x768 lcd screen,
microsd slot, headphones, mini hdmi, mini usb b and power barrel connectors.
It uses a rtl8188cus usb wifi chip and a RDA 5875Y bluetooth chip attached
to uart2. It has a bma250 accelerometer attached to i2c1 addr 0x18, this
only works when ldo3 is set to 2.8 volt, otherwise i2c1 gets stuck, so
for now we mark i2c1 as failed.
It has a pixcir,pixcir_tangoc compatible touchscreen attached to i2c2 addr
0x5c. This is not enabled in this dts, because this variant of the
pixcir_tangoc has separate wakeup and enable pins both of which need
to be driven low before the touchscreen will work. Before we can enable
this the pixcir driver and devicetree-bindings need to be extended to
support these pins.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cubieboard uses the internal codec to output sound to its mini-jack.
Enable it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CHIP v0.2 has a composite output on a mini-jack connector, the audio
part being provided by the on-SoC codec. Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Enable the audio-codec on the Mele A1000 top-set box.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The cubieboard2 uses the internal codec to output sound to its mini-jack.
Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
This commit enables the on-chip audio codec present on the A20 SoC
for the Cubietruck.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Remove the inclusion of linux/mdio-gpio.h in nas4220b, wbd111 and wbd222
boards since mdio-gpio is not used.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
* clk-iproc:
clk: iproc: define Broadcom NS2 iProc clock binding
clk: iproc: define Broadcom NSP iProc clock binding
clk: ns2: add clock support for Broadcom Northstar 2 SoC
clk: iproc: Separate status and control variables
clk: iproc: Split off dig_filter
clk: iproc: Add PLL base write function
clk: nsp: add clock support for Broadcom Northstar Plus SoC
clk: iproc: Add PWRCTRL support
clk: cygnus: Convert all macros to all caps
ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
When CONFIG_CYGNUS is set but CONFIG_COMMON_CLK_IPROC is disabled, the
following link failures are caused:
drivers/built-in.o: In function `cygnus_armpll_init':
:(.init.text+0x1d290): undefined reference to `iproc_armpll_setup'
drivers/built-in.o: In function `cygnus_genpll_clk_init':
:(.init.text+0x1d2c4): undefined reference to `iproc_pll_clk_setup'
drivers/built-in.o: In function `cygnus_lcpll0_clk_init':
:(.init.text+0x1d304): undefined reference to `iproc_pll_clk_setup'
drivers/built-in.o: In function `cygnus_mipipll_clk_init':
:(.init.text+0x1d344): undefined reference to `iproc_pll_clk_setup'
drivers/built-in.o: In function `cygnus_asiu_init':
:(.init.text+0x1d370): undefined reference to `iproc_asiu_setup'
It is fixed it by always selecting COMMON_CLK_IPROC from
ARCH_BCM_IPROC, and making COMMON_CLK_IPROC a silent option (thus
preventing it from being erroneously disabled by a user).
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
AM437x-based boards, can use omap4_local_timer_init()
just fine. Let's use that instead.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The A20 SoC includes the Allwinner audio codec, capable of both 24-bit
playback and capture. This commit adds a device node for it.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A13 and A10s also have the audio codec present. List it in the device
tree.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A10 SoC includes the Allwinner audio codec, capable of both 24-bit
playback and capture. This commit adds a device node for it.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The audio codec functional clock is a child of PLL2 and is used to control
the audio rate, enable it in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The audio codec functional clock is a child of PLL2 and is used to control
the audio rate, enable it in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The audio codec functional clock is a child of PLL2 and is used to control
the audio rate, enable it in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A20 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A13 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). However, it has a
different divider configuration than the A10, hence the difference
compatible.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The A10 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
- A bug where level-triggered interrupts lowered from userspace
are still routed to the guest
- A memory leak an a failed initialization path
- A build error under certain configurations
- Several timer bugs introduced with moving the timer to the active
state handling instead of the masking trick.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEbBAABAgAGBQJWJmf7AAoJEEtpOizt6ddy35UH+NCAt1AInvQajAB1rzXzFSYh
v9PQ5zJ7ZlP8M3HFYjerSl0HrGbi2Cwij5KYE+UAQkXIzCTTdDeB9TUSI/GYQ82M
axel8Ob3deELp03nS5I+gP1NGX3HPDz445grScg7yl1lMs3uDy4viDDM8Vm8+HUX
zZWGpDRHNW3b0myS5NVJvOP7Sm5t7DqklsNScZ04Nut7V8gYEUqEu+ZNKerIZkKn
LrJUVYqqZf33bf6pWle95QZuNQtg84kion3qwWaNl+/8jFkAA8CODyvzar9VMHpf
xA0xUkK1ERZ+hw2n0/BIgCxI4lXvROAx0YpZKnSMgEU5E5p5gGZYqlHCw8r1Rw==
=VQSu
-----END PGP SIGNATURE-----
Merge tag 'kvm-arm-for-v4.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master
A late round of KVM/ARM fixes for v4.3-rc7, fixing:
- A bug where level-triggered interrupts lowered from userspace
are still routed to the guest
- A memory leak an a failed initialization path
- A build error under certain configurations
- Several timer bugs introduced with moving the timer to the active
state handling instead of the masking trick.
Fix wrong compatible for A385 DB AP preventing using suspend
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYhNEwACgkQCwYYjhRyO9XX9gCgnabcvdHrfFqAD3IFICLCgkOM
U1AAnReiDUjcUhz6oTl6I2+e3PLHY7RO
=BkFw
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.3-2' of git://git.infradead.org/linux-mvebu into fixes
Merge "mvebu fixes for 4.3 (part 2)" from Gregory CLEMENT:
Fix wrong compatible for A385 DB AP preventing using suspend
* tag 'mvebu-fixes-4.3-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: correct a385-db-ap compatible string
- Fix oops with LPAE and moew than 2GB of memory by enabling
ZONE_DMA for LPAE. Probably no need for stable on this one as we
only recently ran into this with the mainline kernel
- Fix imprecise external abort caused by bogus SRAM init. This affects
dm814x recently merged, so no need for stable on this one AFAIK
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWJnm9AAoJEBvUPslcq6VzJHMP/i8DVa6R3OwssmGS3Cp/XKPV
m1GCXReauql0oUfFR0baiVnBKL6x8jEHW91iQeV3b3cUz+8l3jL7Q4yc+voPyjHz
ud890cId4wP54PWtDo4lpzDKi3lQkGBI+zJVAyWLfNPt97xcTh1yXW2HdDQ2Hlf4
nyksDKI1CE42h22l5odB9i0yf7Y/XXl8CYl0ZggHV1XReKSZGveTf8+Qcd1uME2s
ovLoxEOHDsmxwERXxeSw7Vw4MwefCBdXhKZf1a6l++/pyD/HqWNpJqpS+VEX4yaw
9ZGT5wmTZQXzzAx60bfO9kokFaKzKiae1UYZusR1aoEKKvFwh8+7ziTTv5q8Do+s
PRaeczB0tJA9OniwZaZEHNyckMgLlReH3PH5mwYV9DNNnG4LWRDjsx8LWDZ7lcjL
HxvDjbB6Ir51jGCxa4GVH0NZy0NZ+UHFTMv6bgiEc3uO4PMu35syDXfLws4VJWXZ
jC4bR2ShUbrAaGQj8R4aYQFus2MzXu58eqwceDGqeuf9M+wn10IO0/OaAXg5oPhk
TfqB/6+yC8GjyWyRaKV7PrgJKsqcm4S9P2WCuZL+lU5GgnfSrFTb1+OBQl4BQFXD
89Mj/oYOoKQd3qQFmsk2ZKwRqT9kLixKvih0bvkos4saOJipW2aNpLBTwNpQEpRk
N9J0CUyn/p1tQEBVCJj5
=EP6s
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.3/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Fixes for omaps for v4.3-rc cycle" from Tony Lindgren:
- Fix oops with LPAE and moew than 2GB of memory by enabling
ZONE_DMA for LPAE. Probably no need for stable on this one as we
only recently ran into this with the mainline kernel
- Fix imprecise external abort caused by bogus SRAM init. This affects
dm814x recently merged, so no need for stable on this one AFAIK
* tag 'omap-for-v4.3/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix imprecise external abort caused by bogus SRAM init
ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory
Use the AM33XX pinmux IOPAD macro to define the physical address instead
of the offset from the padconf address. It makes the DTS easier to read
since matches the addresses listed in the Technical Reference Manual.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the AM33xx pinmux IOPAD macro to define the physical address instead
of the offset from the padconf address. It makes the DTS easier to read
since matches the addresses listed in the Technical Reference Manual.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the OMAP3 pinmux IOPAD macro to define the physical address instead
of the offset from the padconf address. It makes the DTS easier to read
since matches the addresses listed in the Technical Reference Manual.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from low power
state via pinctrl and IO daisy chain using generic wakeirq framework.
With commit 3fffd12839 ("i2c: allow specifying separate wakeup
interrupt in device tree") i2c core allows optional wakeirq to be
specified via device tree. Add wakeup irq entry to enable pixcir_i2c_ts
to wake the system from low power state.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
I see that people are still sending emails to my old address (that no
longer exists) since is the one mentioned in the IGEP DTS. Replace it
with my current email address to avoid this.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the current implementation of GPIO hogging and with
gpio-pcf857x is built as module, ethernet doesn't work on boot
and doesn't throw any error/warning to user. Ethernet becomes
operational when inserting gpio-pcf857x module, even this time
there is no error/warning logs to user that ethernet is
operational.
When using with NFS rootfs and gpio-pcf857x as module, board
doesn't boot as it doesn't get any ip address and doesn't throw
any error/warning. To over come this, now cpsw driver tries to
get mode-gpios. When gpio-pcf857x is built as module it will
throw error, so that user can decide either to built in
gpio-pcf857x to continue with nfs boot or choose alternate rootfs
filesystem like sd/ramdisk.
When using mmc/ramdisk as root fs, cpsw will probe defer and
re-probes again when gpio-pcf857x module is inserted and ethernet
becomes operational.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The vgic code on ARM is built for all configurations that enable KVM,
but the parent_data field that it references is only present when
CONFIG_IRQ_DOMAIN_HIERARCHY is set:
virt/kvm/arm/vgic.c: In function 'kvm_vgic_map_phys_irq':
virt/kvm/arm/vgic.c:1781:13: error: 'struct irq_data' has no member named 'parent_data'
This flag is implied by the GIC driver, and indeed the VGIC code only
makes sense if a GIC is present. This changes the CONFIG_KVM symbol
to always select GIC, which avoids the issue.
Fixes: 662d971584 ("arm/arm64: KVM: Kill CONFIG_KVM_ARM_{VGIC,TIMER}")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Jump to correct label and free kvm_host_cpu_state
Reviewed-by: Wei Huang <wei@redhat.com>
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Conflicts:
drivers/net/usb/asix_common.c
net/ipv4/inet_connection_sock.c
net/switchdev/switchdev.c
In the inet_connection_sock.c case the request socket hashing scheme
is completely different in net-next.
The other two conflicts were overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
Enable some options that have recently been enabled on Tegra platforms:
* TOUCHSCREEN_WM97XX: touchscreen support on Toradex Colibri
* SND_SOC_TEGRA_WM9712: audio support on Toradex Colibri
Signed-off-by: Thierry Reding <treding@nvidia.com>
The indentation for properties in the SATA device tree node on Tegra124
deviates from the rest of the device tree file. Restore consistency and
get rid of a couple of gratuitous blank lines while at it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Now that the core code supports acquire/release/relaxed versions of
the atomic_inc family, implement only the _relaxed flavours in the ARM
backend so that we get all of the others for free.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Davidlohr Bueso <dbueso@suse.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1444227038-12533-1-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
ELM address information is provided by device tree. No longer need
to include this information within hwmod.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
[paul@pwsan.com: fixed chip names in subject line; dropped the OMAP4 section
since the OMAP4 SoC DTS file doesn't have the ELM address space documented
yet]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Commit b483a4a5a7 ("ARM: OMAP4+: hwmod data: Don't prevent RESET of
USB Host module") added the SYSC_HAS_RESET_STATUS flag to both OMAP4
and OMAP5 USB host module hwmon sysconfig but that flag was already
set for OMAP5. So now the flag appears twice in the expression.
make coccicheck complains with the following message:
omap_hwmod_54xx_data.c:1846:37-58: duplicated argument to & or |
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
fncpy() requires that the source and the destination are both 8-byte
aligned.
Signed-off-by: Patrick Doyle <pdoyle@irobot.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Fixes: d94e688cae ("ARM: at91/pm: move the copying the sram function to the sram initialization phase")
Cc: <stable@vger.kernel.org> # 4.1+
The AT91 SDHCI device has been introduced with Atmel SAMA5D2 SoC.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The Flexcom device has been introduced with Atmel SAMA5D2 SoC.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
bus (it's not switchable), and the OTG port's ID pin is connected to PH4
on the A20.
Tested successfully in both host and device modes.
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.
The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
buttons, RS232 style UART and USB OTG (though VBUS is not connected).
Various headers are available for other addon modules, such as SDIO
WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Pull networking fixes from David Miller:
1) Account for extra headroom in ath9k driver, from Felix Fietkau.
2) Fix OOPS in pppoe driver due to incorrect socket state transition,
from Guillaume Nault.
3) Kill memory leak in amd-xgbe debugfx, from Geliang Tang.
4) Power management fixes for iwlwifi, from Johannes Berg.
5) Fix races in reqsk_queue_unlink(), from Eric Dumazet.
6) Fix dst_entry usage in ARP replies, from Jiri Benc.
7) Cure OOPSes with SO_GET_FILTER, from Daniel Borkmann.
8) Missing allocation failure check in amd-xgbe, from Tom Lendacky.
9) Various resource allocation/freeing cures in DSA< from Neil
Armstrong.
10) A series of bug fixes in the openvswitch conntrack support, from
Joe Stringer.
11) Fix two cases (BPF and act_mirred) where we have to clean the sender
cpu stored in the SKB before transmitting. From WANG Cong and
Alexei Starovoitov.
12) Disable VLAN filtering in promiscuous mode in mlx5 driver, from
Achiad Shochat.
13) Older bnx2x chips cannot do 4-tuple UDP hashing, so prevent this
configuration via ethtool. From Yuval Mintz.
14) Don't call rt6_uncached_list_flush_dev() from rt6_ifdown() when
'dev' is NULL, from Eric Biederman.
15) Prevent stalled link synchronization in tipc, from Jon Paul Maloy.
16) kcalloc() gstrings ethtool buffer before having driver fill it in,
in order to prevent kernel memory leaking. From Joe Perches.
17) Fix mixxing rt6_info initialization for blackhole routes, from
Martin KaFai Lau.
18) Kill VLAN regression in via-rhine, from Andrej Ota.
19) Missing pfmemalloc check in sk_add_backlog(), from Eric Dumazet.
20) Fix spurious MSG_TRUNC signalling in netlink dumps, from Ronen Arad.
21) Scrube SKBs when pushing them between namespaces in openvswitch,
from Joe Stringer.
22) bcmgenet enables link interrupts too early, fix from Florian
Fainelli.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (92 commits)
net: bcmgenet: Fix early link interrupt enabling
tunnels: Don't require remote endpoint or ID during creation.
openvswitch: Scrub skb between namespaces
xen-netback: correctly check failed allocation
net: asix: add support for the Billionton GUSB2AM-1G-B USB adapter
netlink: Trim skb to alloc size to avoid MSG_TRUNC
net: add pfmemalloc check in sk_add_backlog()
via-rhine: fix VLAN receive handling regression.
ipv6: Initialize rt6_info properly in ip6_blackhole_route()
ipv6: Move common init code for rt6_info to a new function rt6_info_init()
Bluetooth: Fix initializing conn_params in scan phase
Bluetooth: Fix conn_params list update in hci_connect_le_scan_cleanup
Bluetooth: Fix remove_device behavior for explicit connects
Bluetooth: Fix LE reconnection logic
Bluetooth: Fix reference counting for LE-scan based connections
Bluetooth: Fix double scan updates
mlxsw: core: Fix race condition in __mlxsw_emad_transmit
tipc: move fragment importance field to new header position
ethtool: Use kcalloc instead of kmalloc for ethtool_get_strings
tipc: eliminate risk of stalled link synchronization
...
Install a non-faulting handler just before unmasking imprecise aborts
and switch back to the regular one after unmasking is done.
This catches any pending imprecise abort that the firmware/bootloader
may have left behind that would normally crash the kernel at that point.
As there are apparently a lot of bootlaoders out there that do such a
thing it makes sense to handle it in the common startup code.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If the host toolchain is not glibc based then the arm kernel build
fails with
HOSTCC arch/arm/vdso/vdsomunge
arch/arm/vdso/vdsomunge.c:48:22: fatal error: byteswap.h: No such file or directory
Observed: with omap2plus_defconfig and compile on Mac OS X with arm ELF
cross-compiler.
Reason: byteswap.h is a glibc only header.
Solution: replace by private byte-swapping macros (taken from
arch/mips/boot/elf2ecoff.c and kindly improved by Russell King)
Tested to compile on Mac OS X 10.9.5 host.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The second macb is present on all the sama5d4 SoCs. Let's add a node
reflecting it in the device tree.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
MMC data lines may be left floating if nothing is currently driving the
data lines, which is the case when mmc is in idle state, thus consuming
a useless extra amount of power. Add pullup on mmc2 data signals in the
same way it was previously done for mmc0 and mmc1.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add regulator nodes of PMIC ACT8945A chip on the board.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Fix instances of "disable" instead of "disabled"
in the at91rm9200 dtsi.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The PMC is not only used to drive the clocks but also has some registers
related to other functions. One of those is for example the USB gadget
bias.
Using a syscon allows to properly separate those functions.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Some omaps are producing imprecise external aborts because we are
wrongly trying to init SRAM for device tree based booting. Only
omap3 is still using the legacy SRAM code, so we need to make it
omap3 specific. Otherwise we can get errors like this on at least
dm814x:
Unhandled fault: imprecise external abort (0xc06) at 0xc08b156c
...
(omap_rev) from [<c08b12e0>] (omap_sram_init+0xf8/0x3e0)
(omap_sram_init) from [<c08aca0c>] (omap_sdrc_init+0x10/0xb0)
(omap_sdrc_init) from [<c08b581c>] (pdata_quirks_init+0x18/0x44)
(pdata_quirks_init) from [<c08b5478>] (omap_generic_init+0x10/0x1c)
(omap_generic_init) from [<c08a57e0>] (customize_machine+0x1c/0x40)
(customize_machine) from [<c00098a4>] (do_one_initcall+0x80/0x1dc)
(do_one_initcall) from [<c08a2ec4>] (kernel_init_freeable+0x218/0x2e8)
(kernel_init_freeable) from [<c063a554>] (kernel_init+0x8/0xec)
(kernel_init) from [<c000f890>] (ret_from_fork+0x14/0x24)
Let's fix the issue by making sure omap_sdrc_init only gets called for
omap3. To do that, we need to have compatible "ti,omap3" in the dts
files. And let's also use "ti,omap3630" instead of "ti,omap36xx" like
we're supposed to.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add "snps,quirk-frame-length-adjustment" property to
USB3 node for erratum A009116. This property provides
value of GFLADJ_30MHZ for post silicon frame length
adjustment.
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The property name should be "gpio", not "gpios". Fix it.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix a typo, replacing "pinctrl-name" by "pinctrl-names"
in the Phytec phyFLEX-i.MX6 Quad dtsi.
Also fix a typo in the board name
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The correct core clock of spdif is SPDIF_GCLK, which is added to
clock tree. So the dts also need to be updated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable NAND access by adding pinmux and NAND flash controller node
to device tree. The NAND chips currently used on the Colibri VF61
requires 8-bit ECC per 512 byte page, hence specify 32-bit ECC
strength per 2k page size.
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the NAND flash controller (NFC) peripherial. The driver
supports the SLC NAND chips found on Freescale's Vybrid Tower System
Module. The Micron NAND chip on the module needs 4-bit ECC per 512
byte page. Use 24-bit ECC per 2k page, which is supported by the
driver.
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Based on i.MX6 Quad with 4GB of DDR3.
http://boundarydevices.com/product/nitrogen6max/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the different touchscreens that can be connected using
the displays available for this board.
http://boundarydevices.com/product-category/displays/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the 7" LCD display available for Sabrelite:
http://boundarydevices.com/product/7-800x480-display/
Also add label to backlight_lcd and connect it to the panel.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the 7" LCD display available for Nitrogen6x:
http://boundarydevices.com/product/7-800x480-display/
Also add label to backlight_lcd and connect it to the panel.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree node for touchscreen support on Colibri VF50. The
touchscreen functionality on VF50 uses the ADC channels of Vybrid
and some GPIOs. Also add pinctrl nodes for proper pinmux.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree node to support iomuxc-lpsr controller, fsl,input-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The INA220 monitors both shunt drop and supply voltage.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for USBOTG1 and USBOTG2.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add imx6ul touchscreen controller support.
TSC module need ADC2 module to measure the touchscreen
coordinate value. This patch put TSC and ADC2 together,
make ADC2 module only be used for TSC, can't be used as
a normal ADC.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DCP block present on MX6SL is compatible with the one on MX28,
so add the compatible string and also complete the interrupt entries.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Starting with commit 8947e396a8 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch enables On Chip OTP support for i.MX23 and i.MX28 SoCs,
but keeps the old compatible string.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-sdb board has a eMMC5.0 on usdhc3. This eMMC support HS400.
This patch add usdhc3 support for HS400
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Acked-by: Dong Aisheng <aisheng.dong@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6UL can be powered off by programming SNVS.
When long press ON/OFF button(5 seconds),
PMIC_ON_REQ pin will be set to low and external
PMIC will be powered off.
And system can be powered on by long press ON/OFF
button again.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SRAM support for i.MX6UL, it has 128KB ocram
starting from 0x900000.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The R8 is a new Allwinner SoC based on the A13. While both are very
similar, there's still a few differences. Introduce a new compatible to
deal with them.
In order to have a consistent naming, instead of mentioning the Allwinner
A series as the machine name, switch to sun4i/sun5i like what is done for
the other families.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
The Sinovoip BPI-M2 is a SBC board based on the A31s SoC it features
1G RAM, a microsd slot, Gbit ethernet, 4 usb-a USB-2 ports, ir receiver,
stereo headphone jack and hdmi video output.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a pinmux setting for using mmc2 in regular 4 bit mode.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
When the gpio interrupt bindings where changed to add a bank to the
specifier list, the r_pio nodes of A23/A31/A33 where not updated to
match and neither was the pio node of the A80, this fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With omap5-board-common.dtsi, we can now easily add support for various omap5
board variants. Let's add minimal support for isee igepv5.
So far I've tested that basic things work, such as serial, USB Ethernet, HDMI
and WLAN.
Note that like omap5-uevm, these boards seem to need to reserve 16MB for a
trap section as in commit 03178c66d2 ("ARM: dts: omap5-evm: Update
available memory to 2032 MB") and also noted in a u-boot commit at
http://marc.info/?l=u-boot&m=134376852603255 and also at
http://patchwork.ozlabs.org/patch/159881/.
Not sure why this is not needed for omap5-cm-t54.dts, maybe because of
different u-boot configuration.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like thevarious omap5-uevm models and igepv5 are very similar. So let's
create omap5-board-common.dtsi to allow fixing up things properly for mainline
kernel to support all these.
Even if we eventually end up having only PMIC + MMC + eMMC + SDIO WLAN + SATA +
USB + HDMI configuration in the omap5-board-common.dtsi, this is the easiest
way to add support for other boards rather than diffing various versions of
out of tree dts files.
My guess is that also omap5-sbc-t54.dts can use this, but I don't have that
board so that will need to be dealt with later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 99f84cae43 ("ARM: dts: add wl12xx/wl18xx bindings") added
device tree bindings for the TI WLAN SDIO on many omap variants.
I recall wondering how come omap5-uevm did not have the WLAN
added and this issue has been bugging me for a while now, and
I finally tracked it down to a bad pinmux regression, and a missing
deferred probe handling for the 32k clock from palmas that's
requested by twl6040.
Basically 392adaf796 ("ARM: dts: omap5-evm: Add mcspi data")
added pin muxing for mcspi4 that conflicts with the onboard
WLAN. While some omap5-uevm don't have WLAN populated, the
pins are not reused for other devices. And as the SDIO bus
should be probed, let's try to enable WLAN by default.
Let's fix the regression and add the WLAN configuration as
done for the other boards in 99f84cae43 ("ARM: dts: add
wl12xx/wl18xx bindings"). And let's use the new MMC pwrseq for
the 32k clock as suggested by Javier Martinez Canillas
<javier@dowhile0.org>.
Note that without a related deferred probe fix for twl6040,
the 32k clock is not initialized if palmas-clk is a module
and twl6040 is built-in.
Let's also use the generic "non-removable" instead of the
legacy "ti,non-removable" property while at it.
And finally, note that omap5 seems to require WAKEUP_EN for
the WLAN GPIO interrupt.
Fixes: 392adaf796 ("ARM: dts: omap5-evm: Add mcspi data")
Cc: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On boards with more than 2GB of RAM booting goes wrong with things not
working and we're getting lots of l3 warnings:
WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147
l3_interrupt_handler+0x260/0x384()
44000000.ocp:L3 Custom Error: MASTER MMC6 TARGET DMM1 (Idle):
Data Access in User mode during Functional access
...
[<c044e158>] (scsi_add_host_with_dma) from [<c04705c8>]
(ata_scsi_add_hosts+0x5c/0x18c)
[<c04705c8>] (ata_scsi_add_hosts) from [<c046b13c>]
(ata_host_register+0x150/0x2cc)
[<c046b13c>] (ata_host_register) from [<c046b38c>]
(ata_host_activate+0xd4/0x124)
[<c046b38c>] (ata_host_activate) from [<c047f42c>]
(ahci_host_activate+0x5c/0x194)
[<c047f42c>] (ahci_host_activate) from [<c0480854>]
(ahci_platform_init_host+0x1f0/0x3f0)
[<c0480854>] (ahci_platform_init_host) from [<c047c9dc>]
(ahci_probe+0x70/0x98)
[<c047c9dc>] (ahci_probe) from [<c04220cc>]
(platform_drv_probe+0x54/0xb4)
Let's fix the issue by enabling ZONE_DMA for LPAE. Note that we need to
limit dma_zone_size to 2GB as the rest of the RAM is beyond the 4GB limit.
Let's also fix things for dra7 as done in similar patches in the TI tree
by Lokesh Vutla <lokeshvutla@ti.com>.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The z2 machine calls pxa27x_set_pwrmode() in order to power off
the machine, but this function gets discarded early at boot because
it is marked __init, as pointed out by kbuild:
WARNING: vmlinux.o(.text+0x145c4): Section mismatch in reference from the function z2_power_off() to the function .init.text:pxa27x_set_pwrmode()
The function z2_power_off() references
the function __init pxa27x_set_pwrmode().
This is often because z2_power_off lacks a __init
annotation or the annotation of pxa27x_set_pwrmode is wrong.
This removes the __init section modifier to fix rebooting and the
build error.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: ba4a90a6d8 ("ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This fixes the following sparse warnings:
arch/arm/mach-pxa/raumfeld.c:510:24: warning: symbol 'raumfeld_w1_gpio_device' was not declared. Should it be static?
arch/arm/mach-pxa/raumfeld.c:632:31: warning: symbol 'raumfeld_spi_platform_data' was not declared. Should it be static?
arch/arm/mach-pxa/raumfeld.c:851:28: warning: symbol 'audio_va_initdata' was not declared. Should it be static?
arch/arm/mach-pxa/raumfeld.c:883:28: warning: symbol 'audio_dummy_initdata' was not declared. Should it be static?
arch/arm/mach-pxa/raumfeld.c:931:28: warning: symbol 'max8660_v6_subdev_data' was not declared. Should it be static?
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Currently apart from dra7, omap5 and amx3 all the other SoCs
are identified using cpu_is_* functions which is not right since
they are all SoCs(System on Chips). Hence changing the SoC
identification code to use soc_is instead of cpu_is and keeping
defines for cpu_is where needed. This allows us to replace the
rest of cpu_is usage along with other fixes as needed.
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Keerthy <j-keerthy@ti.com>
[tony@atomide.com: reworked the soc.h changes to minimum]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The newest revisions of A388-GP (v1.5 and higher) support only
DAT3-based card detection. Revisions < v1.5 based on GPIO detection
via I2C expander, but this solution is supposed to be deprecated on
new boards. In order to satisfy all type of hardware this commit
changes card detection to use software polling mechanism. Also a
comment is added on possible card detection options in A388-GP
DT board file.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The naming for the cpu_is macros is confusing as the CPU is separate
and within the SoC. Let's rename all the macros to soc_is, and let's
define cpu_is also for the ones still in use. Then we can just remove
the cpu_is macros once the users are fixed up.
To keep the chances of breaking anything, the changes were
generated with the following regular expressions:
s/cpu_is/soc_is/g
s/CPU/SoC/g
Then the list of existing cpu_is users was generated with:
$ $ grep -o -e 'cpu_is_.\+()' arch/arm/mach-omap2/*.[chS] | \
cut -d: -f2 | sort | uniq
And added to the end of the soc.h.
I decided to rework the earlier patches by Keerthy <j-keerthy@ti.com>
to keep changes down to minimum to avoid potential errors and stick
to just search and replace.
Signed-off-by: Tony Lindgren <tony@atomide.com>
now that we have a working 32k clocksource driver,
we can limit HWMOD usage to non-DT boots and rely
on clocksource_of_init() every time we boot
with DT.
While at that, also make sure that we don't disable
the 32-counter device so it gets probed by its driver.
Signed-off-by: Felipe Balbi <balbi@ti.com>
this function is not only about the 32k sync
timer, it's OMAP's generic init_time implementation.
Let's rename it to make that detail easier to
notice.
Signed-off-by: Felipe Balbi <balbi@ti.com>
If booting with DT, let's make sure to always
call clocksource_of_init() as this will make
it easier to move timer code to drivers/clocksource
in the future.
Signed-off-by: Felipe Balbi <balbi@ti.com>
The sorting policy for this file is alphabetically.
Reorder all nodes, that are out of place.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The NMI interrupt controller is in charge of the NMI pin exposed by
the SoC to the PMIC. The PMIC signals interrupts through this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add FPGA manager to device tree for SoCFPGA.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
instead of constantly defining a small wrapper
around __omap_sync32k_timer_init(), let's define
a generic one which can be used by all OMAPs.
Signed-off-by: Felipe Balbi <balbi@ti.com>
__omap_sync32k_timer_init(), now takes the clock
source as a parameter. This means we no longer need
__omap_gptimer_init().
Note that __omap_sync32k_timer_init() will be
renamed in a follow-up patch as it's not longer 32k
source specific.
Signed-off-by: Felipe Balbi <balbi@ti.com>
as it turns out, __omap_gptimer_init() and
__omap_sync32k_timer_init() are essentially
the same thing, but __omap_gptimer_init() wants
to always use gptimer.
Instead of forcing all those devices to pass
a use_gptimer cmdline argument, we add a new
function argument to __omap_sync32k_timer_init()
in preparation to deleting __omap_gptimer_init().
On a follow-up patch, we will remove uses of
__omap_gptimer_init() and replace them with
__omap_sync32k_timer_init() and pass the last
argument as true.
Signed-off-by: Felipe Balbi <balbi@ti.com>
those macros just make it a lot more difficult
to grep around and actually find similarities.
In this patch, we will simply remove them and
replace with actual functions and later commits
will come to further clean this up.
Signed-off-by: Felipe Balbi <balbi@ti.com>
omap4_local_timer_init() can be used by other
platforms as is. At least AM437x wants to use
it. Instead of making omap4-only and providing
a stub for builds without OMAP4, we can just
make sure that function is always available
for all SoCs that need it.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWHrOuAAoJEFKiBbHx2RXVam0QAIgXhMTuXLNZlJaJ1bFiRqiy
mAmGpCJl7aN9DPCYXjTzOrPHny0707fZ8lvow7KsjA0OU6JUKP2oD7uSJC9eHyRU
Mp6B/D2LKjgURozrFsjmfOLT4M+zMtuxk9GyYiBVFT8jqTsyYnlJKbWZVP2PsbMt
/1HMCuQj7Fe28Qv833P3DMgARRvT0tp32wvpfoVd91GSp2R1BfpDPN6jlaAX5fVz
8AGMHBoeNSVDDA9J1+3+RZMGKB3Isx5gVodKIkopDQiJSY15Dl32nGKG/6muLdCE
VMELu1Lsn0e5rFg6Sh8wrtSa/K3ujw929xknikM7sh3+q7bVSowJk8l8Bi/+YfvA
uL7sjXnhXypXSi45hii+81piScxkRn9o6N7ioj9KIV4Nuciky6YNN8Zr3Ycr2Z2x
heRz2Ln3A73Cmx4vxEq61lKNIx1qArY+171vsXy0PFQ9Qut4f3UuK6fwnPDL+csC
ivPPuhGwKicQ2YsvmPMGxj650H7RYALTwstKBGl58y+nhmXnCBt1Ftz7u/btWwHH
ifk7Q1qPBsxlN1RJzMOSkjJtiaHuiJY132dRROE63P4uWMGUGEWt2iHwwyJL7D0D
qefh+j4+5/EnYExfgh/lTfNt063qV0wklrHrkvD2q/iG4jAECn1mDNBmA6cLelc5
3f/27CR6w/XEUMXY6mQ2
=hprv
-----END PGP SIGNATURE-----
Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers
Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
* tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
soc: qcom: smd_rpm: Handle big endian CPUs
soc: qcom: smd: Remove use of VLAIS
soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
soc: qcom: smd: Represent channel layout in structures
soc: qcom: smem: Handle big endian CPUs
soc: qcom: Make qcom_smem_get() return a pointer
soc: qcom: Reorder SMEM/SMD configs
soc: qcom: smem: Avoid NULL pointer exception on remove
soc: qcom: smd: Implement id_table driver matching
- use the non-self-clearing reset register
- add cpu hotplug support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWH/wBAAoJEN2kpao7fSL4VrAQAJrMtI4jZI5hECFLsAWTldEu
cFJ41zouS88Kxa042S9Mr6A6TV5WXWRdg3lb95+n71OQ9pEVc428X3Sc0FdHlbSH
g5/W/y6Vic6KXBShTLpF9O7rMZgEFOZoLMeUMm4hlUu5NL+6ghVkEyNQioBvRgyC
uIo97JBho0EsXXY0uZWHB+6DpPpcHKN54HZCm5nhNSBEpR/PgxXDxnqbcdQHKVCO
+2bpNE8V/Lvt0MxiGHm36Hrabi0gcsUAXQEdVk6BWHM5nrvqCiBNq9xzHhb8VSg+
R/i1wprXVi1Ecbm3DdVtNEqam3x+roo/tfc0zuqDoQ8A1zreP1SZVFvs2Je4Vlek
yYbD1MuVqRQ4a9fqlTb2PzuKuCMubke3sq6Y3ZkDAXe8ToIASOT6mg8bKY8B4bgE
GZwskH7tMofLwC8obux8hjIormAWMK+rsxdJ4HHFb2IfgJtofqhSrKgqRPnsjgmM
OpJtayQOxL088/a2aY/JC3SQJdfMAPDdltuebXYDBVLL2AdgSpimjZx6fHJ1oxr8
2N72NH59UOI8QGfukSC5iQjZ6eNaKRJ0T8/0QKorpdDtCk540welfXbPSNvWuF9N
XgewsnsKtQIV6hfYtRbdGEk6VQ1HOh+1CTZ9sl2hjBuwqFS7SWCvAAdrSHsIbXll
ARaG+v7CHIgFKqxpN54i
=khG4
-----END PGP SIGNATURE-----
Merge tag 'berlin-soc-for-4.4-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc
Merge "Marvell Berlin SoC for 4.4 take 2" from Sebastian Hesselbarth:
- use the non-self-clearing reset register
- add cpu hotplug support
* tag 'berlin-soc-for-4.4-2' of git://git.infradead.org/users/hesselba/linux-berlin:
arm: berlin: add CPU hotplug support
arm: berlin: use non-self-cleared reset register to reset cpu
CONFIG_FIXED_PHY is needed to have Ethernet working on STi boards.
Select it as built-in since RootFS is accessible from NFS on these boards.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- DCAN sleep pins for am437x-gp-evm
- A series of changes to add audio support for dra7
- Add support for gpio keys and LEDs on dra7
- Regulator clean-up for am335x-wega
- A series of changes to enable IOMMUs and mailboxes for dra7
accelerators
- Add support for am335x-bonegreen
- Fix up GPIO flags where 0 was used instead of GPIO_ACTIVE_HIGH
- Fix omap3-lilly-am33x IRQ level flag
- Remove duplicate uart2 pinmux for igep and fix indentation and
update igep to use pinctrl macros for the register offsets
- Fix MMC cd-gpios usage
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHr4GAAoJEBvUPslcq6Vzhr8QAMAH0SNDea4C48F7vPkjA31V
D0x1hGnLkeXbInR9H+pDjULuLdY8bQubCi0gdpH0OAxUarga2WneTC9A0IaNs3gm
YR3fS3RnusrPdderNJ00fkJaz1taaQmEdbKAxgPG2XabOZtUDqRhE4JafUnMN2QI
jOde4CS3XDbzEfsDLxrxzsw8x1wHnPRQ4LWHVxuUYIPVRsbwbU+Ur23NPxUU7JtQ
g+Lf86PR5B3AtXqh+1x0cdpoybyCpKSqFnvFBEQS997B+7DQYKXwVWRZctBtSsV0
66BccG/dN3YSG+WdRno4R8ikrebuhhdVTn8bOUIFN83o5BjDAuWKBsYXYkVHsusk
wLRnFkLwkNoil8C4DWY9+RfdX7uLwcCPppBB4PF6P541rbPGpV8O19/D5v1qBCVQ
p4GxNarygJdXWEzYb22x9KEwVBHz8waPNfuRz82TrgcttTyDWUtiUbRnxRtI137a
V8g5/TrR8p1WwRFlp4X7UFhZACqn1CSoNW9J1eax7VpGm5I8DEECAOzSHUId98k5
eRhfC5r/tLWDl3IkSnKrGnQ2hVu6dcazFj3nMJacYkpmRghoHvp+7ElepxffZCae
+V8TXFP6ehEajkvrExPRL8Ey9UdMJEXeof5t/o2Vt0b2w+XeLOpuoDrKbcJsYPMb
RWisiAUU/KWk6UQYOPj5
=Sbup
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.4/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Device tree changes for omaps for v4.4 merge window:" from Tony Lindgren:
- DCAN sleep pins for am437x-gp-evm
- A series of changes to add audio support for dra7
- Add support for gpio keys and LEDs on dra7
- Regulator clean-up for am335x-wega
- A series of changes to enable IOMMUs and mailboxes for dra7
accelerators
- Add support for am335x-bonegreen
- Fix up GPIO flags where 0 was used instead of GPIO_ACTIVE_HIGH
- Fix omap3-lilly-am33x IRQ level flag
- Remove duplicate uart2 pinmux for igep and fix indentation and
update igep to use pinctrl macros for the register offsets
- Fix MMC cd-gpios usage
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
* tag 'omap-for-v4.4/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (33 commits)
ARM: dts: omap3-igep: Use OMAP3_CORE1_IOPAD pinmux macro
ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: am43xx: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: am335x: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: omap3-igep0020: Remove duplicate uart2 pinmux
ARM: dts: omap3-igep: Fix indentation
ARM: dts: omap3-lilly-a83x: Don't use IRQ level flag for a GPIO
ARM: dts: DRA74x: Add IOMMU nodes for DSP2
ARM: dts: DRA7: Add common IOMMU nodes
ARM: dts: DRA74x: Add dsp2_system syscon node
ARM: dts: DRA7: Add dsp1_system syscon node
ARM: dts: Use defined GPIO constants in flags cell for OMAP2+ boards
ARM: dts: Add am335x-bonegreen
ARM: dts: beagle-x15: Enable the system mailboxes 5 and 6
ARM: dts: dra72-evm: Enable the system mailboxes 5 and 6
ARM: dts: dra7-evm: Enable the system mailboxes 5 and 6
ARM: dts: DRA72x: Add IPC sub-mailbox nodes for IPU1, IPU2 & DSP1
ARM: dts: DRA74x: Add IPC sub-mailbox nodes for all IPUs & DSPs
ARM: dts: am335x-wega: Clean up regulators
ARM: dts: dra7-evm: add gpio key support
...
- Enable SPIFI Flash and JFFS2 to support rootfs on Flash memory
- Enable USB Phy, mass storage and SCSI to support USB memory
- Enable PCF857x and JC42 I2C devices found on Hitex board
- Enable PL172 to support memory mapped NOR Flash
- New LPC18xx drivers: I2C, Watchdog, SCT PWM and RTC
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli:
This pull request contains the following Broadcom SoC platform and driver changes:
- Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific
code which is coming next
- Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit
with their specific write-pairing setting, which must be saved and restored during
system-wide suspend/resume, and consequently updates the brcmstb machine code to
initialize the BIU
- Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine
descriptor matching their compatible string and setting up the PL310 L2 cache and
enabling the relevant ARM errata for their Cortex-A9
* tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Setup BIU control registers during boot
soc: brcmstb: Add Bus Interface Unit control setup
soc: add stubs for brcmstb SoC's
ARM: NSP: Add basic support for Broadcom Northstar Plus SoC
L2 caches optimization for Armada XP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYX5kYACgkQCwYYjhRyO9XRAACgh9ZuCj/Bxgsql5tHL2fLPhMw
OzwAn3RJqjzRRMLcZ/TmgTPNbNwz3hEB
=bO2O
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu soc for 4.4 (part 1)" from Gregory CLEMENT:
L2 caches optimization for Armada XP
* tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add support to clear shared L2 bit on Armada XP
- Remove legacy omap3 ISP code as the driver is DT only
- Remove VoiceBlue board support as it's been unused over
10 years now
- Remove unused polarity control macros for TWL
- Remove two unneeded semicolons
- Remove unused core dpll code for reprogramming the rates
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHrwcAAoJEBvUPslcq6Vzv+EP/joH02GVQmwJKREznkp1L+Jg
eaJ3P9Os7p2cHkz68XEq79Cq/O4Zh3yupS4O9OeGn6XhqcG+MnXFETVYKIV3WJ7s
QvSuRxJrc6dStbPKAcsmgczJNNE+8mgFkI4rrJ75d17SZ+ybaQVQRziuRLMq9YX5
GIQDayYKlBYs5gb21h7qU9O4zHzkNIga/yKydOZJQ0GZ8ZJhQ68KZtfXPCrZUquD
x2DVecGsPe+CfoDjGppjngD7suTQteIALno/VoIXPhtewwDKuYXW82hfNL9/WXF3
OSVWkxp/mcldJJzwJhoCv2kN4Dmp0GaDVqTNn2tpxMUpEeDGjRnrDc3al4z2k87f
9A2qs4CRSSnDcTpVqNBUSSF6BOBpacHrUZVtlm9YF5e+UyIzI+MCwOM6Sn5EusNg
ENyPgV1HGkUhyRPEeBJsPzRF4NOMDyyLiPeIpwcTXATl6udBHTV1L9yM7yhPEtJg
9ftCz9JGVO1EjD90By9YZcCK37LV1MaFRliWfnXjodGraWY7x3WlYsdLV4Cv3t+t
yp6HFufciHrthfoSERnb2nEK6g2N9nITeaiBhknrTN/spfs+0uwkjumwa7AIdfNl
4kvJpdge+UmhrNiFktvbhjtqEP5Nq3LUGDdvMr2rvppP8HCiss6+K51otzSeo8ny
BTrFLhEU8GEzVplgg7Er
=d5vJ
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.4/cleanup-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "Clean-up for omaps for v4.4 merge window" from Tony Lindgren:
- Remove legacy omap3 ISP code as the driver is DT only
- Remove VoiceBlue board support as it's been unused over
10 years now
- Remove unused polarity control macros for TWL
- Remove two unneeded semicolons
- Remove unused core dpll code for reprogramming the rates
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
* tag 'omap-for-v4.4/cleanup-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: clock: remove un-used core dpll re-program code
ARM: OMAP2+: Remove unneeded semicolons
ARM: OMAP3: vc: Remove unused macros
ARM: OMAP1: Remove board support for VoiceBlue board
ARM: OMAP2+: Remove legacy OMAP3 ISP instantiation
use the CR_C define instead of a literal value
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYX5PQACgkQCwYYjhRyO9WE/wCdHL0jkJKufbzUMo3P1ZTfGvKR
iHUAn2hB1f1k3xKFV8HP6XLO7jhc29LJ
=NZow
-----END PGP SIGNATURE-----
Merge tag 'mvebu-cleanup-4.4-1' of git://git.infradead.org/linux-mvebu into next/cleanup
Merge "mvebu cleanup for 4.4 (part 1)" from Gregory CLEMENT:
use the CR_C define instead of a literal value
* tag 'mvebu-cleanup-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Use a CR_C constant instead of a hard-coded one
Add cpu hotplug support for berlin SoCs such as BG2 and BG2Q. These SoC
don't support power off cpu independently, but we also want cpu hotplug
support in these SoCs. We achieve this goal by putting the dying CPU in
WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
In Berlin SoCs, there are two kinds of cpu reset control registers: the
first one's corresponding bits will be self-cleared after some cycles,
while the second one's bits won't. Previously the first kind of reset
control register is used, this patch uses the second kind one to prepare
for the next hotplug commit.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
While the addition of these properties is technically correct it unveils
a bug with deferred probe. The problem is that the presence of the gpio-
range property causes the gpio-tegra driver to defer probe (it needs the
pinctrl driver to be ready). That's technically correct, but it causes a
couple of issues:
- The keyboard on Chromebooks stops working. The reason for that is
that the gpio-tegra device has not registered an IRQ domain by the
time the EC SPI device is registered, hence the interrupt number
resolves to 0. This is technically a bug in the SPI core, since it
should really resolve the interrupt at probe time and defer if the
IRQ domain isn't available yet. This is similar to what's done for
I2C and platform device already.
- The gpio-tegra device deferring probe means that it is moved to the
end of the dpm_list. This list defines the suspend/resume order for
devices. However the core lacks a way to move all users of the
gpio-tegra device to the end of the dpm_list at the same time. This
in turn results in a subtle bug on Jetson TK1, where the gpio-keys
device is used to expose the power key as input. The power key is a
convenient way to wake the system from suspend. Interestingly, the
gpio-keys device ends up getting probed at a point after gpio-tegra
has been probed successfully from having been deferred earlier. As
such the driver doesn't need to defer the probe itself, and hence
the device isn't moved to the end of the dpm_list. This causes the
gpio-tegra device to be suspended before gpio-keys, which in turn
leaves gpio-keys unable to wake the system from suspend.
There are patches in the works to fix both of the above issues, but they
are too involved to make it into v4.3, so in the meantime let's fix the
regressions by commenting out the gpio-ranges properties until the fixes
have landed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHvNcAAoJENfPZGlqN0++J0EP+gMOFcFdLOqnnqDO75dV7Fey
NsZJsOGU0avrrNwt0Q5LM8/jOinPShnTqoJcTMge1ErZTlBjdWMfCwmsttsvNu5G
Oj9NALQx4824NnjjixwhJB1MTfH2JKcZWBmZylkEsiv+uA8domOFflaL7ZAJ+RER
ZmoCrEWa6APQdrGnh8b43CKlFpxL6Zx3bKjPBo/z8NG6exhswMJXugkkSQMdRfxr
utTcqD4sQ0V3JuQSBfYJeR4Z22vDYp+DtevqIkpaAdlhcJLM9lIaLnNujE9xqaoy
L3ss3nROOqnQlTrTvifadB7fOG5ecs/5FD/N9QGj07Xfcx1DZrOqzGVaa8cMfS2a
SmcOvLyYVafyNzyyAhhYj63/IzgUMoH1HEXZDX+x1yLgH8OlL9NG+HtuYARvFHFN
yTXCXC524WC850PMFQ7MPuvl/axkpLU+g7cvhVZ/PKzG+VGckw6GWyxl2WCKcW/x
7N6gD0IdF2g1WNl8vU3yOBDhIRb60CtjiuAEDN+X8GhMdaDfslqK7GGL5ulgkGrh
owo7qUbvWry2TjowchszsDiW+0MtDsdKG3F1UISR+pN0D0JytRjqJW8aRnfX8oBc
4S1oV9EaLddQd90nU+XL0Mcbu7txO7OKNvly2KeWHD2jDX+QJsZQ8PSwa2eTY8eD
puv4pXOmwwnF9eJP+IXN
=8OHS
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
* tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: porter: enable internal PCI and USB PHY
ARM: shmobile: porter: enable PCIe
ARM: shmobile: porter: add QSPI DT support
ARM: shmobile: porter: add VIN0/ADV7180 DT support
ARM: shmobile: porter: add I2C2 DT support
ARM: shmobile: porter: enable SATA0
ARM: shmobile: porter: add SDHI0/2 DT support
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
0x00000000 - 0x0fffffff
0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.
For the consistency, use the latter for all the SoCs.
Also, fix the range properties to reflect the real address mapping,
where the support card is located at the offset address 0x01f00000
of CS1 of the external bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHrRQAAoJEBvUPslcq6Vz4RAP/3IQ3vifBG/VB93Pgm2cVSDZ
rxUT3C8Ag4tS7pJzqiY++Bf0q05+NBuBG3XoE7sfltiHQ69iS9Grt8IwqmtAkkIT
rqWa5+2Fyr/M63GkatSSP7WNqyXMadI/KNCZOPR5A30YCm4vPEBbEECATO3ei5WS
Kt9bJwTDEgEpIz4dy2rqnAi828jS1uoiNUMFEJx8TfUqGWCep0jdT6G4XWVP2GAH
OawZRYi4ilvodt1tqZKlkcJevOvSmOphWqHVY3mJAv1O9x1Or5bGWtvtL6W5hUh/
q8eaLM81v3pifz8BAFqRfZ0NaZ4qWSmneJfy0M/tuyVHY/DHUwVolqa+wiyKFuJH
m+a/2cFh0hSZCBGDYOv5UwKjWTUUugU6EPPcaq8OPx+s1UwEwhY3iwSrKD+ldN77
SnMHGkxDBtZK7S7/xcFf3IwwLCzPHl4QAZmEk/ouUDxd5xxwkOjIRczEa4HrvK4o
qTIG97IggkRgmxYDsWP9w7ZgiDz8QQ9kMvS4aCuaKlU/IDNzhe8gkgnLHtGkS0v4
fuMtNeDokTwR7dsyU7hvF8FQZvUvz+yNGW3OiUSMP4SY/PCiLXXOSibKrd7+caFL
mf6Z8rhxm91UdywmTPKiykzQIxshz65x+95t45WCUPOVTUHEb6PQqi+Nvy3Ky9bT
LjPKoZC1YAshk9W3gixa
=1+r/
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Fixes for omap against v4.3-rc5" from Tony Lindgren:
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
* tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Documentation: ARM: List new omap MMC requirements
memory: omap-gpmc: dump "before" state before first modification
memory: omap-gpmc: Fix unselectable debug option for GPMC
ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on
Suman Anna