Add a generic power domain implementation, TI SCI PM Domains, that
will hook into the genpd framework and allow the TI SCI protocol to
control device power states.
Also, provide macros representing each device index as understood
by TI SCI to be used in the device node power-domain references.
These are identifiers for the K2G devices managed by the PMMC.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
SoCs after A31 has a clock controller module in the PRCM part.
Support the clock controller module on H3/5 and A64 now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
iqc1, iqc2, tegra_clk_pll_a_out_adsp, tegra_clk_pll_a_out0_out_adsp, adsp
and adsp neon were not modelled. dp2 wasn't modelled for Tegra210.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
Hence:
- Remove the Z clock output from the cpg_clocks node, as this implied
a programmable clock,
- Add the Z clock as a fixed factor clock,
- Let the first CPU node point to the new Z clock,
- Remove the Z clock index from the bindings (this definition was used
by r8a7792.dtsi only, and was not a contract between DT and driver).
Fixes: 7c4163aae3 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the missing module clock for the second channel of the display unit.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch lists STM32F7's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[include rename in rk1108.dtsi to prevent compile errors]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYz5TPAAoJENfPZGlqN0++JQYQAJ9qo4FOHP2XNttgK6b1jSg4
zSsjRats9bHX6Rs1dhT5KP7BatpH8kgLoJEqQThXWEq3qDNvDrWMd99yoOF8q1A5
tnpcFpzFZDf58J1PR0bPyWSZC6prLyV63Zinx6ZyTVDGm83gXk7TjfPRk7MqkPbr
DP0spMO/5UXKPD6gE9hShz2WWCh6ZWvj6yUg+7ddjIYYYJwg+3MnNL+IE2H5BBaD
VLlrxW5VrFdN1oxL+SpkB8DfcgTawJSTMw2pHzSqLT88s9ADAwW3IZeklpySztuk
CEuxpi+0AouXzMfL4kJB4HTCXxOTGSpQVYEzUEWCID92eXyoBj08qghU21WKk87p
9OJZRd3xeZczN3ssfSVTLUp0rUrnS2Zyc3QOFRrA7gNLiykmNgurWrXT8e3yE9wa
Z0Htb7WhUBlq77TTjDb46FMKCSdVcb2CbK2qtbyqdtRmsDB0+51DKG3bOsWTMWJW
EMgWj4PsYcjBr+27q/8DbQXigX4c6jb3p/s6ouelEiN5ov78pwiNtBMBjiMxo1GI
Pb4aWlKBDOxx4/JeBIn3pWKozbFIajPK6RYlHzd0g3SKFvjcEPlzqslsJTlye5ay
CKHantmnzlIf+iJSdkthtD9ETIWhp0BvgmJ+BgwuffRpeaGjsXggkQjxGQBgRY3/
s7OWxr+5HMd+1Egj3Tg7
=2cA1
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
* tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: dts: silk: Drop superfluous status update for frequency override
ARM: dts: alt: Drop superfluous status update for frequency override
ARM: dts: gose: Drop superfluous status update for frequency override
ARM: dts: porter: Drop superfluous status update for frequency override
ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
ARM: dts: lager: Drop superfluous status update for frequency override
ARM: dts: marzen: Drop superfluous status update for frequency override
ARM: dts: bockw: Drop superfluous status update for frequency override
ARM: dts: porter: Always use status "okay" to enable devices
ARM: dts: r8a7793: Add INTC-SYS clock to device tree
ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Add INTC-SYS clock to device tree
ARM: dts: r8a7792: Add INTC-SYS clock to device tree
ARM: dts: r8a7791: Add INTC-SYS clock to device tree
ARM: dts: r8a7790: Add INTC-SYS clock to device tree
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
ARM: dts: r7s72100: Add watchdog timer
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- make reset drivers with bool Kconfig options explicitly non-modular
- fix uniphier non-static symbol warnings
- fix socfpga nr_resets property
- new drivers for the Arria10 and i.MX7 system reset controllers
- fix sunxi 64-bit compilation
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAljJUToXHHAuemFiZWxA
cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOvFnxAA8ImyPCzDDMtgGo9zMRId4ICH
/YbbYrc5Gp3vDJJnJYVD0KCOT4174yinvHxrxpmjiftcZWcQRNH881uFJpgmXUjW
zT7SapC0REWMx/DQzcR/Gh0smiehU1hVi+PSosNNqwbpZZrlxOAgGSoFYw87pBtJ
gSOwTfUWlSEVMBtsQpTeO7cUzc5HvxuIvu/SMORi3xP1nukv8WIDuSGGFAWv235D
OQOe101hQBO64yyW1J2X6+UMH+fHgmVT9qhqT6uJgYfR57pO17vX1aF/GEP9GV9R
/vja0Y8hMNyvbc9CcJJQjR6BfXIOjrCYdDs+9nV4znYAcQpLJN5wfB6kDzogpH4S
3vgIsqT0OHYCdcXahuPuzDtE9zJ3oktyZT3MPyOsIkCwxGt5IJKRF9XGEGF3E/Sl
0yRpC45riac+8vuNJHnOe2qjRmx+zkAioyTPmYwPihwb1rLTYUtnqjat3egG1z0q
UZvCpOcuQ9X/cAo+IIZW6IhDf6cqWEPks3pGinJ5XZ66qoeW5UMJz8v+i7c2F0oK
LFLedERgaergvpAShiSeZTlXFkWQAJvGzDoCbpYTeQHELPV/ZJn88rJGP2DJ4/l1
7Sy5lyjFWtZqvfsBnoMniYc1XG2v5kztzAp9pZFEzBMHEVgCyJla5PxF7rDb+U/k
tzeSfwd3DUkT8qtB1K4=
=5xmN
-----END PGP SIGNATURE-----
Merge tag 'reset-for-4.12-1' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.12
- make reset drivers with bool Kconfig options explicitly non-modular
- fix uniphier non-static symbol warnings
- fix socfpga nr_resets property
- new drivers for the Arria10 and i.MX7 system reset controllers
- fix sunxi 64-bit compilation
* tag 'reset-for-4.12-1' of git://git.pengutronix.de/git/pza/linux:
reset: sunxi: fix for 64-bit compilation
reset: Add Altera Arria10 SR Reset Controller
dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
reset: Add i.MX7 SRC reset driver
reset-socfpga: Fix nr_resets property
reset: uniphier: fix non static symbol warnings
reset: pistachio: make it explicitly non-modular
reset: ath79: make it explicitly non-modular
reset: oxnas: make it explicitly non-modular
reset: meson: make it explicitly non-modular
Signed-off-by: Olof Johansson <olof@lixom.net>
Tegra210 has 2 special resets which don't follow the normal pattern:
DVCO and ADSP. Add them in this patch.
Changelog:
v2: add DT bindings file
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This clock clocks the ADSP Cortex-A9.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 has 3 DMIC inputs which can be clocked from the recovered clock
of several other audio inputs (eg. i2s0, i2s1, ...). To model this, we
add a 3 new clocks similar to the audio* clocks which handle the same
function for the I2S and SPDIF clocks.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This clock is used to clock the HDMI CEC interface.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The 2 ISP clocks (ispa and ispb) share a mux/divider control. So model
this as 1 mux/divider clock and child gate clocks.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Expose clock CLKID_RNG0 which is needed for the HW random number generator.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The Arria10 System Resource Chip reset controller handles the
Arria10 peripheral PHYs. This patch adds the offsets for
these PHYs.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The timer-ids are wrong compared to the manual, probably due a simple
copy-paste mistake from the otherwise very similar rk3288. And there
are even more timers in the system than the ones wrongly listed here.
Timer-Ids were unused both in clock-driver as well as devicetree
till now, so fixing them won't break anything.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fix typos and add the following to the scripts/spelling.txt:
overide||override
While we are here, fix the doubled "address" in the touched line
Documentation/devicetree/bindings/regulator/ti-abb-regulator.txt.
Also, fix the comment block style in the touched hunks in
drivers/media/dvb-frontends/drx39xyj/drx_driver.h.
Link: http://lkml.kernel.org/r/1481573103-11329-21-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Allwinner H5 is a SoC that features a design which keeps the peripheral
compatible with H3, so that it have also a CCU like the one on H3 --
only one bus gate/reset is added, and the mmc sample/output phases are
removed because of MMC controller update.
Add its support in our existing H3 CCU driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both
need to be enabled/disabled for proper operation. This fixes the fact that
the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and
that all 4 clock sources need to be defined an used.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
These updates have been kept in a separate branch mostly because
they rely on updates to the respective clk drivers to keep the
shared header files in sync.
This includes two branches for arm64 dt updates, both following up
on earlier changes for the same platforms that are already merged:
Samsung:
- add USB3 support in Exynos7
- minor PM related updates
Amlogic:
- new machines: WeTek Set-top-boxes
- various devices added to DT
There are also a couple of bugfixes that trickled in since the
start of the merge window:
- The moxart_defconfig was not building the intended platform
- CPU-hotplug was broken on ux500
- Coresight was broken on Juno (never worked)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWLmRS2CrR//JCVInAQKrkQ//bd8TCGXA0tRwDMEGejtWChZcNkGZDaer
sNMyE/c1p5+/4euSmf3jW1JsIx4JDtjr0psKeRpgYId8GVdvaYceFbSMJl6o9hDc
pm3sqb66xEgrWQoSBA2Urz/RhSIrxkYbuTpYbN4teV9I/IFgTUggaBSzfkq3SLRE
bEVSbCw0S/6t3vJgW4CKCI75+a3NexqImvi8txNwueQQMnDLnOkG97vMUQJgDq0j
E+CeOk0mvlGF+TiVoAhUxT3YIt8azUTfUVw7CBIRvo/49sUCiETk6xie93FaC7GI
Tmg9KK+oZhrmqt8PBGkikxQMHATnKrfJbMNi/K6nrxW91ylSkwTN/7jfhSjFDrdI
4WNB2x3u6KUnQ0XOKVY36gUnV8kJ/2K9pTZpq0K7m4czo8YAid9LumvDnqhPI0Xg
fXxq3YBx7AfzsdBL3+nQ7AH3tr9Bvt01kMZwYwNgpqtglEBScAgzyrPG/yyTBFq7
KOkoyNojTaHZHcDtYqSaxYls+2tdeyvYuQJ7QGQ5DJCW99NgbRuFfIUJvgwRPoKt
13ioIJxDUHmemR6xFURWVH1dPkkqwtJht7us5jcxuxBL9ZhmEb6vophvyxj62zTZ
8A+PE3cC1azhKph7rVrUl9KEoYZzedwDaTGBNpYz1gN7DxDvWHYINEPB4bBLzYmv
uWsSYVbV2Qs=
=A3U6
-----END PGP SIGNATURE-----
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"These updates have been kept in a separate branch mostly because they
rely on updates to the respective clk drivers to keep the shared
header files in sync.
This includes two branches for arm64 dt updates, both following up on
earlier changes for the same platforms that are already merged:
Samsung:
- add USB3 support in Exynos7
- minor PM related updates
Amlogic:
- new machines: WeTek Set-top-boxes
- various devices added to DT
There are also a couple of bugfixes that trickled in since the start
of the merge window:
- The moxart_defconfig was not building the intended platform
- CPU-hotplug was broken on ux500
- Coresight was broken on Juno (never worked)"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
ARM: deconfig: fix the moxart defconfig
ARM: ux500: resume the second core properly
arm64: dts: juno: update definition for programmable replicator
arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
ARM64: dts: meson-gxbb-p200: add ADC laddered keys
ARM64: dts: meson: meson-gx: add the SAR ADC
ARM64: dts: meson-gxl: add the pwm_ao_b pin
ARM64: dts: meson-gx: add the missing pwm_AO_ab node
clk: gxbb: fix CLKID_ETH defined twice
ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
clk: gxbb: add the SAR ADC clocks and expose them
dt-bindings: amlogic: Add WeTek boards
ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
dt-bindings: vendor-prefix: Add wetek vendor prefix
ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
...
to existing clk drivers. The bulk of the work is on Allwinner and
Rockchip SoCs, but there's also an Intel Atom driver in here too.
New Drivers:
- Tegra BPMP firmware
- Hisilicon hi3660 SoCs
- Rockchip rk3328 SoCs
- Intel Atom PMC
- STM32F746
- IDT VersaClock 5P49V5923 and 5P49V5933
- Marvell mv98dx3236 SoCs
- Allwinner V3s SoCs
Removed Drivers:
- Samsung Exynos4415 SoCs
Updates:
- Migrate ABx500 to OF
- Qualcomm IPQ4019 CPU clks and general PLL support
- Qualcomm MSM8974 RPM
- Rockchip non-critical fixes and clk id additions
- Samsung Exynos4412 CPUs
- Socionext UniPhier NAND and eMMC support
- ZTE zx296718 i2s and other audio clks
- Renesas CAN and MSIOF clks for R-Car M3-W
- Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
- TI CDCE913, CDCE937, and CDCE949 clk generators
- Marvell Armada ap806 CPU frequencies
- STM32F4* I2S/SAI support
- Broadcom BCM2835 DSI support
- Allwinner sun5i and A80 conversion to new style clk bindings
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABCAAGBQJYsLxxAAoJEK0CiJfG5JUl0p0P/AiBaYvrmHBx3H9jdC3iQxd2
7luFN3OqpykmZc3xx2xO3WaZ96kwwxiMu8sj3+VQo6oCkEuOY2ru6uPiDOcF4P3+
8ku2taoWlESDbVLebVTNJoRXBaBLaV+9BCN7AKvXpVw+/UkJI5hgr0yMdh4tgtvu
K08tTMkDNDbA33KXuJo8/chQFqi2W6XBXk22YMkqqA8jx0F4EM759LcgUlD1YfBS
HKkgSOgsW3Zwhl27ZEAJMthcmS4+wFaEgFBeipg/hxTLI3aQtmDtRfXwg0wkbBx2
8sVz9SyBwkjOT9+41kve+Je94NK3blnJEjbxPASveMwyhdX1TlDQCPfrXya/1zxz
N1By1NpA6iEYwi4hy+OtBYlcsBHztAM/+eljDY2kEDvfiKjMa44GYmgBu4n8pq+n
75NJxws6ZkzPs5/QsLT3hvTaL1SNX6PaEW8HabDXO40ccZc4CYvFZVOXMAnKaXzZ
31hj8EvQ5x6hci+SPYyVu6j3ipOxN96VcZqEJ+hWyyuZEMK6Up1o/0lGZFgwa0UD
SIl7RiTFKO6ko+8hYlk1g0DGtEyWDsdso1Bw4zaHwMngM/CwjJVzpK5T2t1fJyEh
lN5MdhcOi0nsiRWdRxOwOlHDLf93qSo87mvseU1MCEXYN1aqTV3VxSm1YU8ZgQVk
sAjpsJqj45enfDa9BmIt
=o8o/
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The usual collection of new drivers, non-critical fixes, and updates
to existing clk drivers. The bulk of the work is on Allwinner and
Rockchip SoCs, but there's also an Intel Atom driver in here too.
New Drivers:
- Tegra BPMP firmware
- Hisilicon hi3660 SoCs
- Rockchip rk3328 SoCs
- Intel Atom PMC
- STM32F746
- IDT VersaClock 5P49V5923 and 5P49V5933
- Marvell mv98dx3236 SoCs
- Allwinner V3s SoCs
Removed Drivers:
- Samsung Exynos4415 SoCs
Updates:
- Migrate ABx500 to OF
- Qualcomm IPQ4019 CPU clks and general PLL support
- Qualcomm MSM8974 RPM
- Rockchip non-critical fixes and clk id additions
- Samsung Exynos4412 CPUs
- Socionext UniPhier NAND and eMMC support
- ZTE zx296718 i2s and other audio clks
- Renesas CAN and MSIOF clks for R-Car M3-W
- Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
- TI CDCE913, CDCE937, and CDCE949 clk generators
- Marvell Armada ap806 CPU frequencies
- STM32F4* I2S/SAI support
- Broadcom BCM2835 DSI support
- Allwinner sun5i and A80 conversion to new style clk bindings"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (130 commits)
clk: renesas: mstp: ensure register writes complete
clk: qcom: Do not drop device node twice
clk: mvebu: adjust clock handling for the CP110 system controller
clk: mvebu: Expand mv98dx3236-core-clock support
clk: zte: add i2s clocks for zx296718
clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()
clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i
clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
clk: tegra: Add BPMP clock driver
clk: uniphier: add eMMC clock for LD11 and LD20 SoCs
clk: uniphier: add NAND clock for all UniPhier SoCs
ARM: dts: sun9i: Switch to new clock bindings
clk: sunxi-ng: Add A80 Display Engine CCU
clk: sunxi-ng: Add A80 USB CCU
clk: sunxi-ng: Add A80 CCU
clk: sunxi-ng: Support separately grouped PLL lock status register
clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
clk: qcom: SDHCI enablement on Nexus 5X / 6P
...
Driver updates for ARM SoCs.
A handful of driver changes this time around. The larger changes are:
- Reset drivers for hi3660 and zx2967
- AHCI driver for Davinci, acked by Tejun and brought in here due to
platform dependencies
- Cleanups of atmel-ebi (External Bus Interface)
- Tweaks for Rockchip GRF (General Register File) usage (kitchensink misc
register range on the SoCs)
- PM domains changes for support of two new ZTE SoCs (zx296718 and zx2967)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYrM7/AAoJEIwa5zzehBx3qisP/18NwvbYvC3rMza7k+TEU66n
vuEF9KW5GhUpQPbNIsTer5qHhC7ZgL7RoR/H7mpZcCxfhYiNXuUaOv8TMGK+WTLQ
HH6QTs4mARLh1IrRcog1hoElzzqMVxaQgODeaaG1DcPvTqHWsQurbXsf17tCQOri
nWKyxFpLNlu0kktkGb5JWrM4XBjU9KsW7LME9H86wG8HmB6+mcT5ddeYwW5nD8cG
txXgmMjdTEKcpbeTg3cAzL4504auhIl4R9uK+8dc1sw+e9T0nXNDS9IkmLPwWtSR
u8q6zQ3zReoDw4jGUgPP0ILHudfQsiMdWS+P2hw/krpbtLlQ+irHDVa1VA3NLiUT
9aG9cNTYRMo3ct22YEeWsnAC04XOxpCsqHTR+UWuZaBmf3eoMIXnsafTuwLzqKlQ
Ent/4eFPInMAzDH8Kaf1Hh0918qkgF2bNlshem11TccQKvHP+qCoHk6mKGxwEj5k
E1UEG4S6k6zNqjLwmTBBbk8sLMl/WVo6RMSMz+JflatgPmVZco4EX2O73iKGAJVU
5GfHIUG9Yl4+aTIUORu59cWxOCApK0kqERrFKe412BMurXlLfqVcr/H2tiiuWnn1
cEJ9d+uBd8IxTIQX0iEYGUAkX97mhxGUYdqGQuGJSV+MOfWX1zNP1sI4EscLGKQj
sDDZScCaguM4xE20Jum1
=od7u
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs.
A handful of driver changes this time around. The larger changes are:
- Reset drivers for hi3660 and zx2967
- AHCI driver for Davinci, acked by Tejun and brought in here due to
platform dependencies
- Cleanups of atmel-ebi (External Bus Interface)
- Tweaks for Rockchip GRF (General Register File) usage (kitchensink
misc register range on the SoCs)
- PM domains changes for support of two new ZTE SoCs (zx296718 and
zx2967)"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
soc: samsung: pmu: Add register defines for pad retention control
reset: make zx2967 explicitly non-modular
reset: core: fix reset_control_put
soc: samsung: pm_domains: Read domain name from the new label property
soc: samsung: pm_domains: Remove message about failed memory allocation
soc: samsung: pm_domains: Remove unused name field
soc: samsung: pm_domains: Use full names in subdomains registration log
sata: ahci-da850: un-hardcode the MPY bits
sata: ahci-da850: add a workaround for controller instability
sata: ahci: export ahci_do_hardreset() locally
sata: ahci-da850: implement a workaround for the softreset quirk
sata: ahci-da850: add device tree match table
sata: ahci-da850: get the sata clock using a connection id
soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register
memory: atmel-ebi: Enable the SMC clock if specified
soc: samsung: pmu: Remove unused and duplicated defines
memory: atmel-ebi: Properly handle multiple reference to the same CS
memory: atmel-ebi: Fix the test to enable generic SMC logic
soc: samsung: pm_domains: Add new Exynos5433 compatible
soc: samsung: pmu: Add dummy support for Exynos5433 SoC
...
ARM64 DT updates are fairly small this time, only two new SoCs and a handful
of new machines get added, all of them similar to other hardware we already
support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner: MMC, USB
ARM Juno: Coresight, STM
Broadcom: NS2 GICv2m irqchip and PCIe
Marvell: Armada 3700 SPI, I2C, ethernet switch
Mediatek: MT8173 thermal
NXP i.MX: LS1046A thermal
Qualcomm: coresight on MSM8916, HDMI, WCNSS, SCM
Renesas: r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip: thermal, eDP, pinctrl enhancements
Samsung: TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier: SD reset, eMMC controller
ZTE: oppv2 cpufreq
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIUAwUAWK9htWCrR//JCVInAQL5sg/40ehZk89xuReYHaOoL0jkEGxt7ogae2Q0
5SurlVNEjkr1A6KKcTKwy6c8E4GReq0ioVUxyYHlNo2MedtLQWssSvObfjt390E+
OYXhuHHyHFgut9jF6nq1IZbSqkhaDcoRFdK0EPzjdxTMMk59xqzG2t9Kbq0MFz0I
Fg0+xB44VAOwuM+45MjNzdpTzolkH3gxlK4TV/opbr2/9uEDCjFOLr1zqZuWqIDh
uyXXqHYUZ54kz2GvhfYPgcm+f+PjuV2fw/Jh5u3+jNvwMQvA70Erv52im1o1a3GV
UTjmBgccTKByrPk7gXP3lgRkHQGwPLNH0L+28AZ/BNuZbWqDrDe7uVfpq9nWb5Xl
IR0uleNBOuiOdqR6Ya4xosGSm6AOgQhCbE52trHdUhb03eqRbqHcLHEVmZXXea/i
EejGOciIvbV8ent9jjREw/kvGZ+Ws6v5notG4uPDwn+YZSJAyqvGh5Tul8WzZIxk
Wr1WZgbuwkI0KYiFzSINfgDX0Om2l6YoVZLnkjst5Exto+TGRSINJpVCXsuGIU7O
34qZD25yA8WlJTooBL0cvrW0NT2RewBqLogwhbwDnRW241SW5AnuzPsFPWldLzon
L5sFgsF60gWiIlbB2/BKdpF2jB/+brXNR6epnQYADigweg/4+pS8HPZRFj7g8wyE
s22+OYJ6Cg==
=glug
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"ARM64 DT updates are fairly small this time, only two new SoCs and a
handful of new machines get added, all of them similar to other
hardware we already support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards:
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64:
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K:
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner:
- MMC, USB
ARM Juno:
- Coresight, STM
Broadcom:
- NS2 GICv2m irqchip and PCIe
Marvell:
- Armada 3700 SPI, I2C, ethernet switch
Mediatek:
- MT8173 thermal
NXP i.MX:
- LS1046A thermal
Qualcomm:
- coresight on MSM8916, HDMI, WCNSS, SCM
Renesas:
- r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip:
- thermal, eDP, pinctrl enhancements
Samsung:
- TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier:
- SD reset, eMMC controller
ZTE:
- oppv2 cpufreq"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits)
arm64: dts: qcom: Add msm8916 CoreSight components
arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
dt-bindings: clockgen: Add compatible string for LS1012A
Documentation: DT: add LS1012A compatible for SCFG and DCFG
Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
arm64: tegra: Use symbolic reset identifiers
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
...
A total of 380 patches this time, mostly adding support for more hardware
in the device tree descriptions. There is not much exciting here for 4.11,
but I've tried my best to condense the information from the pull requests
I got into a readable summary.
Noteworthy changes to existing platforms include:
- The GIC memory map was a bit wrong almost everywhere and now
gets fixed up
- The Allwinner platforms convert to the generic pinmux properties
- The Marvell EBU platforms now use the new DSA binding
- Samsung Exynos4212 was unused and gets removed
- The Renesas power management got improved
New production machines:
- Lego Mindstorms EV3
https://www.lego.com/en-us/mindstorms/about-ev3
- Beelink X2 Android media box
http://linux-sunxi.org/Beelink_X2
- "Romulus" baseboard management controller for OpenPower
- Axentia TSE-850 Data Radio Channel (DARC) encoder
http://www.axentia.se/db/equipment.html
- Luxul XAP-1410 and XWR-1200 wireless access points
https://luxul.com/xap-1410
New SoCs:
- Allwinner H2+ and V3s, both minor variations of already
supported chips
http://www.allwinnertech.com/index.php?c=product&a=index&id=38
- Marvell Prestera DX packet processors based on Armada XP architecture
http://www.marvell.com/switching/prestera-dx/
- Samsung Exynos4412 Prime gets added, a minor variation of Exynos4412
New developer and reference boards:
- Lichee Pi One, Lichee Pi Zero and Orange Pi Zero,
all based on Allwinner SoCs
http://linux-sunxi.org/LicheePi_Onehttp://www.orangepi.org/orangepizero/
- SAMA5d36ek Reference platform
http://www.atmel.com/tools/sama5d36-ek.aspx
- Beaglebone Green Wireless and Black Wireless
https://beagleboard.org/black-wirelesshttps://beagleboard.org/green-wireless
- phyCORE-AM335x System on Module
http://phytec.com/products/system-on-modules/phycore/am335x/
- New revision of "vf610-zii" Zodiac Inflight Innovations board
- Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam i.Core
http://www.opossom.com/english/index.htmlhttp://www.savageboard.org/http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ulhttp://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
- Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is
Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas, qcom,
rockchip, sti, stm32 and tegra
New device supports added to some boards and SoCs, briefly by platform:
- Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU
- Aspeed: network, ipmi bt, gpio, pinmux
- Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc
- TI DaVinci: gpio, lcdc, usb, video-in, uart
- TI Keystone 2: MSM RAM, power/reset, uart
- Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal
- Marvell EBU: ethernet switch on Turris Omnia
- NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic,
eeprom, mmc, nand
- TI OMAP:
- Qualcomm: coresight, gyro/accelerometer, hdmi
- Renesas: pmic, soc-id
- Rockchip: qos
- Samsung: audio on Odroid-X
- Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor
- STi: video in/out
- STM32: timer, pwm, i2c, rtc, add, i2s
- NVIDIA Tegra: tpm
- Uniphier: mmc/sd pinmux
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWK9aamCrR//JCVInAQJPpBAA2qUQYRfCgzK1fEu6X+c8pzqITqlV+Hx7
8tBsZFINywKLnUXLs4Ip4DDK8uDsIACXSmGMdmhUVIXLsuRxJBl8av+ndd+ERGoF
bg/iAIyA9hjKRhorE1wDyC4wg1S4P8laPevbK7NcDYDbK9MRmGSmEyP2uvhfLtVy
2zoPfIE5aEipx6GoIATzLRqpMO6rWB/eg9OUZVKN5Hwh3LNCKtkX726GC9WGVqoE
zslF1S6VH63dfru2Vlu5eFdvmiox54gBJBMR7yld+EIiXWilNT0eWfEYRd3CMT6E
EwRCNiNRa21DHstBdL9pTuE+K0LpAUXlznjiqeWrZVuJfdHJy51pGVWwoc4ynbhI
TS/GFgJI4iG2xrE3EIJS5cAl1S9WtNOYYvZATM35blFbZv7ASoAGdj2EECIIPwJr
CR4l9Y2k/fuNHAzhR4B0fEKj/uWj7ONqcolpf8W6lZx0MvVNgeDwdx0eoLrbrxY9
MJFb9OgD+BhNp5lIElysl0L9aEp3PxV668nSg4qV+Mo4w/5/OXhHK8675bXlITFU
4Rw6fxRUBeO2B0LSonE4Ds8QKMQCs2yfxyMPWMn8yK/xFkwpHzwoJuRR2RYpbQTb
5Hrnfk23k+2rflht07XBxNqqaznDQyPPvAvoB0ZZ2kchPYl75MlpAfOGlgfhXcmm
Kp4g7VYyfAs=
=ucQ/
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"A total of 380 patches this time, mostly adding support for more
hardware in the device tree descriptions. There is not much exciting
here for 4.11, but I've tried my best to condense the information from
the pull requests I got into a readable summary.
Noteworthy changes to existing platforms include:
- The GIC memory map was a bit wrong almost everywhere and now gets
fixed up
- The Allwinner platforms convert to the generic pinmux properties
- The Marvell EBU platforms now use the new DSA binding
- Samsung Exynos4212 was unused and gets removed
- The Renesas power management got improved
New production machines:
- Lego Mindstorms EV3:
https://www.lego.com/en-us/mindstorms/about-ev3
- Beelink X2 Android media box:
http://linux-sunxi.org/Beelink_X2
- "Romulus" baseboard management controller for OpenPower
- Axentia TSE-850 Data Radio Channel (DARC) encoder:
http://www.axentia.se/db/equipment.html
- Luxul XAP-1410 and XWR-1200 wireless access points:
https://luxul.com/xap-1410
New SoCs:
- Allwinner H2+ and V3s, both minor variations of already supported
chips:
http://www.allwinnertech.com/index.php?c=product&a=index&id=38
- Marvell Prestera DX packet processors based on Armada XP
architecture:
http://www.marvell.com/switching/prestera-dx/
- Samsung Exynos4412 Prime gets added, a minor variation of
Exynos4412
New developer and reference boards:
- Lichee Pi One, Lichee Pi Zero and Orange Pi Zero, all based on
Allwinner SoCs:
http://linux-sunxi.org/LicheePi_Onehttp://www.orangepi.org/orangepizero/
- SAMA5d36ek Reference platform:
http://www.atmel.com/tools/sama5d36-ek.aspx
- Beaglebone Green Wireless and Black Wireless:
https://beagleboard.org/black-wirelesshttps://beagleboard.org/green-wireless
- phyCORE-AM335x System on Module:
http://phytec.com/products/system-on-modules/phycore/am335x/
- New revision of "vf610-zii" Zodiac Inflight Innovations board
- Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam
i.Core:
http://www.opossom.com/english/index.htmlhttp://www.savageboard.org/http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ulhttp://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
- Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is
- Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas,
qcom, rockchip, sti, stm32 and tegra
New device supports added to some boards and SoCs, briefly by platform:
- Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU
- Aspeed: network, ipmi bt, gpio, pinmux
- Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc
- TI DaVinci: gpio, lcdc, usb, video-in, uart
- TI Keystone 2: MSM RAM, power/reset, uart
- Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal
- Marvell EBU: ethernet switch on Turris Omnia
- NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic, eeprom,
mmc, nand
- TI OMAP:
- Qualcomm: coresight, gyro/accelerometer, hdmi
- Renesas: pmic, soc-id
- Rockchip: qos
- Samsung: audio on Odroid-X
- Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor
- STi: video in/out
- STM32: timer, pwm, i2c, rtc, add, i2s
- NVIDIA Tegra: tpm
- Uniphier: mmc/sd pinmux"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (380 commits)
ARM: dts: armada-385-linksys: fix DSA compatible property
ARM: dts: Fix typo in armada-xp-98dx4251
ARM: DTS: Fix register map for virt-capable GIC
dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
ARM: dts: sun8i: sinlinx: Enable audio nodes
ARM: dts: sun8i: parrot: Enable audio nodes
ARM: dts: sun8i: Add audio codec, dai and card for A33
ARM: dts: Add EMAC AXI settings for Arria10
ARM: dts: am335x-chiliboard: Support charger
ARM: dts: am335x-chiliboard: Support power button
ARM: sun8i: dt: Add mali node
dt-bindings: gpu: Add Mali Utgard bindings
ARM: dts: stm32: Add I2C1 support for STM32429 eval board
ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
dt-bindings: mfd: stm32f4: Add missing binding definition
dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
ARM: dts: stm32: add Timers driver for stm32f429 MCU
ARM: dts: add the AB8500 sysclk to the device trees
...
We sometimes collect non-critical fixes that come in during the later part
of the merge window in a branch for the next release instead, and this is
that contents for v4.11.
Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
and setup. There's also some fixes for Davinci and a Kconfig fix for SCPI
to only enable on ARM{,64}.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYrMlHAAoJEIwa5zzehBx3oZ4P/3nRgb4dtwEwXwFmJf8Xd4nu
yetQbcwRreHvh8utsU2Pe+8tffV8jLgsW8TxZ43d6deYFii046HhZAXtvTTVgFpE
OA0fJpNJ00KYqP1Nx5q/kwZoH3uBz442uMUQ9lyziB3RpimhRsiKyHwnTyuWljyx
hPmO1XKcF6pQBXk1uwOzO1lSDUeOn4eAmeLonlG1gQ5qtrkU0WbrTPxpmn/CB546
LH5Nj0qVRzEa7xr8O+2nzeKPVwcXGwsKVKCDbSJmsey2KOEDnEjjxpToAh3WnA4W
Tm1av5QdyqsLVqAMkNYezrS8EzBjRKa1ma4xUqsNoIhO1XI7xa/LkonU8a0+ZdSX
p48DCvv7IHX5IqdIHHB0s1eICvTsW8Cp/4YUJzuZDFbS9B2t5b3412+n43tVa8l3
HYPeTzL5S3VOrMtpQKkGAFrw5OGm+URy4CYQxpX5DxSRSqvXTj12ajBHRbfdbzCO
r2i2rhKL07PF3DAf8L1coHcBQDS7Vc/k+fhKCQy+W1RDxmjYwYKSI9agOyZi1HQ7
X+0HuUyKTthCE2kUrj4rye/87MffWwdjNgnOZiHR1X7YtWgnjp1g9K+mLZHh/y5m
Tq/M55cK9h6dOghx121jYFkkvDclEQDemJuDbKY0sEMDrDXtppcI/T+znZ1LTq7i
1eaK4lTyAX7dbQJUQCwe
=NhZq
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"We sometimes collect non-critical fixes that come in during the later
part of the merge window in a branch for the next release instead, and
this is that contents for v4.11.
Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
and setup. There's also some fixes for Davinci and a Kconfig fix for
SCPI to only enable on ARM{,64}"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
firmware: arm_scpi: Add hardware dependencies
ARM: OMAP3: Fix SoC detection of OMAP36/37 Family
ARM: OMAP5: Add HWMOD_SWSUP_SIDLE_ACT flag for UART
ARM: dts: Fix compatible for ti81xx uarts for 8250
ARM: dts: Fix am335x and dm814x scm syscon to probe children
ARM: OMAP2+: Fix init for multiple quirks for the same SoC
ARM: dts: Fix omap3 off mode pull defines
bus: da850-mstpri: fix my e-mail address
ARM: davinci: da850: fix da850_set_pll0rate()
ARM: davinci: da850: coding style fix
Pull networking updates from David Miller:
"Highlights:
1) Support TX_RING in AF_PACKET TPACKET_V3 mode, from Sowmini
Varadhan.
2) Simplify classifier state on sk_buff in order to shrink it a bit.
From Willem de Bruijn.
3) Introduce SIPHASH and it's usage for secure sequence numbers and
syncookies. From Jason A. Donenfeld.
4) Reduce CPU usage for ICMP replies we are going to limit or
suppress, from Jesper Dangaard Brouer.
5) Introduce Shared Memory Communications socket layer, from Ursula
Braun.
6) Add RACK loss detection and allow it to actually trigger fast
recovery instead of just assisting after other algorithms have
triggered it. From Yuchung Cheng.
7) Add xmit_more and BQL support to mvneta driver, from Simon Guinot.
8) skb_cow_data avoidance in esp4 and esp6, from Steffen Klassert.
9) Export MPLS packet stats via netlink, from Robert Shearman.
10) Significantly improve inet port bind conflict handling, especially
when an application is restarted and changes it's setting of
reuseport. From Josef Bacik.
11) Implement TX batching in vhost_net, from Jason Wang.
12) Extend the dummy device so that VF (virtual function) features,
such as configuration, can be more easily tested. From Phil
Sutter.
13) Avoid two atomic ops per page on x86 in bnx2x driver, from Eric
Dumazet.
14) Add new bpf MAP, implementing a longest prefix match trie. From
Daniel Mack.
15) Packet sample offloading support in mlxsw driver, from Yotam Gigi.
16) Add new aquantia driver, from David VomLehn.
17) Add bpf tracepoints, from Daniel Borkmann.
18) Add support for port mirroring to b53 and bcm_sf2 drivers, from
Florian Fainelli.
19) Remove custom busy polling in many drivers, it is done in the core
networking since 4.5 times. From Eric Dumazet.
20) Support XDP adjust_head in virtio_net, from John Fastabend.
21) Fix several major holes in neighbour entry confirmation, from
Julian Anastasov.
22) Add XDP support to bnxt_en driver, from Michael Chan.
23) VXLAN offloads for enic driver, from Govindarajulu Varadarajan.
24) Add IPVTAP driver (IP-VLAN based tap driver) from Sainath Grandhi.
25) Support GRO in IPSEC protocols, from Steffen Klassert"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1764 commits)
Revert "ath10k: Search SMBIOS for OEM board file extension"
net: socket: fix recvmmsg not returning error from sock_error
bnxt_en: use eth_hw_addr_random()
bpf: fix unlocking of jited image when module ronx not set
arch: add ARCH_HAS_SET_MEMORY config
net: napi_watchdog() can use napi_schedule_irqoff()
tcp: Revert "tcp: tcp_probe: use spin_lock_bh()"
net/hsr: use eth_hw_addr_random()
net: mvpp2: enable building on 64-bit platforms
net: mvpp2: switch to build_skb() in the RX path
net: mvpp2: simplify MVPP2_PRS_RI_* definitions
net: mvpp2: fix indentation of MVPP2_EXT_GLOBAL_CTRL_DEFAULT
net: mvpp2: remove unused register definitions
net: mvpp2: simplify mvpp2_bm_bufs_add()
net: mvpp2: drop useless fields in mvpp2_bm_pool and related code
net: mvpp2: remove unused 'tx_skb' field of 'struct mvpp2_tx_queue'
net: mvpp2: release reference to txq_cpu[] entry after unmapping
net: mvpp2: handle too large value in mvpp2_rx_time_coal_set()
net: mvpp2: handle too large value handling in mvpp2_rx_pkts_coal_set()
net: mvpp2: remove useless arguments in mvpp2_rx_{pkts, time}_coal_set
...
Core changes:
- Switch the generic pin config argument from 16 to 24 bits,
only use 8 bits for the configuration type. We might need to
encode more information about a certain setting than we need
to encode different generic settings.
- Add a cross-talk API to the pin control GPIO back-end,
utilizing pinctrl_gpio_set_config() from GPIO drivers that
want to set up a certain pin configuration in the back-end.
This also includes the .set_config() refactoring of the
GPIO chips, so that they pass a generic configuration for
things like debouncing and single ended (typically open
drain). This change has also been merged in an immutable
branch to the GPIO tree.
- Take hogs with a delayed work, so that we finalize probing
a pin controller before trying to get any hogs.
- For pin controllers putting all group and function definitions
into the device tree, we now have generic code to deal with
this and it is used in two drivers so far.
- Simplifications of the pin request conflict check.
- Make dt_free_map() optional.
Updates to drivers:
- pinctrl-single now use the generic helpers to generate dynamic
group and function tables from the device tree.
- Texas Instruments IOdelay configuration driver add-on to
pinctrl-single.
- i.MX: use radix trees to store groups and functions, use the new
generic group and function helpers to manage them.
- Intel: add support for hardware debouncing and 1K pull-down.
New subdriver for the Gemini Lake SoC.
- Renesas SH-PFC: drive strength and bias support, CAN bus muxing,
MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791.
- Aspeed: use syscon cross-dependencies to set up related bits in
the LPC host controller and display controller.
- Aspeed: finalize G4 and G5 support. Fix mux configuration on
GPIOs. Add banks Y, Z, AA, AB and AC.
- AMD: support additional GPIO.
- STM32: set this controller to strict muxing mode.
STM32H743 MCU support.
- Allwinner sunxi: deep simplifications on how to support
subvariants of SoCs without adding to much SoC-specific data
for each subvariant, especially for sun5i variants. New driver
for V3s SoCs. New driver for the H5 SoC. Support A31/A31s
variants with the new variant framework.
- Mvebu: simplifications to use a MMIO and regmap abstraction.
New subdrivers for the 98DX3236, 98DX5241 SoCs.
- Samsung Exynos: delete Exynos4415 support. Add crosstalk to the
SoC driver to access regmaps. Add infrastructure for pin-bank
retention control. Clean out the pin retention control from
arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly
in the Samsung pin control driver(s).
- Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin.
- Qualcomm: use raw spinlock variants: this makes the qualcomm
driver realtime-safe.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJYq/7kAAoJEEEQszewGV1zf4oQALVaN5tuaCbzN4QOq87jzXmk
K195kKG0nkNvN6o5llNhBszHfCSmX1+oSscxuCF/88kH4mFHeDIbvg0KOk5IZYxA
YlT8NA75C9+flARE3gQUyL320ulahWbvOthntQprzsVU4RJa0zP38peQsfiUd8W1
ch8GInJYYkczcsAbmziyUOBu5a2o9tX3u8BF8FaBf2uyrCiBC/ZT2VpzvbOR5NeU
MvjFvc7bq2fNltzDNHdZZUo/5iCbnPlRNig2umDp5fFa8rZcdPmGMAOl4p6nizHY
S16xDl38xxDQx8sp1IH4n+th3G2cXoONEj9eZ6woWTJhLbLc13CacYPfleYfqEOe
+JyrUgBgFBINiFWDHHaebWJeD2M/QF4FnSDGnnJBy/bKWe6lJnknGvSZNcIEvdvB
QeeKyfrvnKiCyjNY4N+ZNdMLA2vj5o86vG2hSqztPiwYWDePbN76yeZ7l79bFfOo
ZnCa2ay70Np7xwrQWors4Gl2LV2zJG7AkaNA7vvS9NX6OURu/SkNVePkY1XHCLwu
lNvYd4iwFJxzXm08TsgtLC080eZfvCot9xqbgzvoapnwx7tBuaAakXI4bh0T3x4n
pEauKO3oNE/K89mN9QK2jfsD9kDWvm4xvc+ilA6DGU0C37XnDQjF+Q5xy16262Gh
9w0yWMlqzrr7stUXAjS4
=IMY0
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Pin control bulk changes for the v4.11 kernel cycle.
Core changes:
- Switch the generic pin config argument from 16 to 24 bits, only use
8 bits for the configuration type. We might need to encode more
information about a certain setting than we need to encode
different generic settings.
- Add a cross-talk API to the pin control GPIO back-end, utilizing
pinctrl_gpio_set_config() from GPIO drivers that want to set up a
certain pin configuration in the back-end.
This also includes the .set_config() refactoring of the GPIO chips,
so that they pass a generic configuration for things like
debouncing and single ended (typically open drain). This change has
also been merged in an immutable branch to the GPIO tree.
- Take hogs with a delayed work, so that we finalize probing a pin
controller before trying to get any hogs.
- For pin controllers putting all group and function definitions into
the device tree, we now have generic code to deal with this and it
is used in two drivers so far.
- Simplifications of the pin request conflict check.
- Make dt_free_map() optional.
Updates to drivers:
- pinctrl-single now use the generic helpers to generate dynamic
group and function tables from the device tree.
- Texas Instruments IOdelay configuration driver add-on to
pinctrl-single.
- i.MX: use radix trees to store groups and functions, use the new
generic group and function helpers to manage them.
- Intel: add support for hardware debouncing and 1K pull-down. New
subdriver for the Gemini Lake SoC.
- Renesas SH-PFC: drive strength and bias support, CAN bus muxing,
MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791.
- Aspeed: use syscon cross-dependencies to set up related bits in the
LPC host controller and display controller.
- Aspeed: finalize G4 and G5 support. Fix mux configuration on GPIOs.
Add banks Y, Z, AA, AB and AC.
- AMD: support additional GPIO.
- STM32: set this controller to strict muxing mode. STM32H743 MCU
support.
- Allwinner sunxi: deep simplifications on how to support subvariants
of SoCs without adding to much SoC-specific data for each
subvariant, especially for sun5i variants. New driver for V3s SoCs.
New driver for the H5 SoC. Support A31/A31s variants with the new
variant framework.
- Mvebu: simplifications to use a MMIO and regmap abstraction. New
subdrivers for the 98DX3236, 98DX5241 SoCs.
- Samsung Exynos: delete Exynos4415 support. Add crosstalk to the SoC
driver to access regmaps. Add infrastructure for pin-bank retention
control. Clean out the pin retention control from
arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly in
the Samsung pin control driver(s).
- Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin.
- Qualcomm: use raw spinlock variants: this makes the qualcomm driver
realtime-safe"
* tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (111 commits)
pinctrl: samsung: Fix return value check in samsung_pinctrl_get_soc_data()
pinctrl: intel: unlock on error in intel_config_set_pull()
pinctrl: berlin: make bool drivers explicitly non-modular
pinctrl: spear: make bool drivers explicitly non-modular
pinctrl: mvebu: make bool drivers explicitly non-modular
pinctrl: sunxi: make sun5i explicitly non-modular
pinctrl: sunxi: Remove stray printk call in sun5i driver's probe function
pinctrl: samsung: mark PM functions as __maybe_unused
pinctrl: sunxi: Remove redundant A31s pinctrl driver
pinctrl: sunxi: Support A31/A31s with pinctrl variants
pinctrl: Amend bindings for STM32 pinctrl
pinctrl: Add STM32 pinctrl driver DT bindings
pinctrl: stm32: Add STM32H743 MCU support
include: dt-bindings: Add STM32H7 pinctrl DT defines
gpio: aspeed: Remove dependence on GPIOF_* macros
pinctrl: stm32: fix bad location of gpiochip_lock_as_irq
drivers: pinctrl: add driver for Allwinner H5 SoC
pinctrl: intel: Add Intel Gemini Lake pin controller support
pinctrl: intel: Add support for 1k additional pull-down
pinctrl: intel: Add support for hardware debouncer
...
- new driver for stts751
- it87: Added support for IT8622E and IT8792E; improved support for other chips
- lm70: Added support for TMP122/124
- use permission-specific DEVICE_ATTR variants where possible
- fixed overflows in various drivers
- minor improvements in various drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYqmJwAAoJEMsfJm/On5mBeGoP/0eUxc3crX3vcJrbPwLnvnZ0
n90QIoe0Dk/699lHUu8K098Ihsj3mxOXqDgx7YTPHi3MdekoL0KkYZn/yyvE+wX/
dcB+gz02/WLUBoUoA6rhbztqLFC59Iv4TwxGFMSU//ySGRzmy/0AZ/sG5h8C+Fli
05+b4BdOZGSqff3EBHKJSzLrzYmbMq4+f0JlpUCNIve8gfgomenwfbrghEJw6VAj
xp9EKM5KBLLj4e76Muk42FEvD7TxdbLeXoj/g+Tz6w8seWmQAyRinu6Udn7FqPOQ
an/2QrtQfGgWEuZ/QbsZN9mneou4EJq4SvvUUtHLgDj6zF5mnHla/nSc62l//uac
QVeTKCxh5/A7y+QzeQFZ/zI/5/oVQICrx5K+VCPnkH33c2DcsElBtsQaA+Jk8RNy
S9C3UN+bAfR/SWpOiKjSu/VE3OgHzQm+TZKXyfMOGSmX+hJZcuROTNuvAso6fvVQ
mmKtfbA+POG9DNvrHpu2ohzc42HXfAExrnclF3AxuIMHb6Qt5cwpQMgGt4Yk/CFa
aOWX2oQPnSbx2qzhlAZdo34fflGYMf4DvsMBYc6e/6vY0WHLnL3IyfWOlw3Yrdpu
/rjgheQb5vjoRvPadBJphFSRF4xzZCIkP+ue9o0EEqPhsJjnWmwuHhr97CaO4ror
dJDtXi+i67uuti/NsqYP
=QLmt
-----END PGP SIGNATURE-----
Merge tag 'hwmon-for-linus-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck:
- new driver for stts751
- it87: Added support for IT8622E and IT8792E; improved support for
other chips
- lm70: Added support for TMP122/124
- use permission-specific DEVICE_ATTR variants where possible
- fixed overflows in various drivers
- minor improvements in various drivers
* tag 'hwmon-for-linus-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (95 commits)
hwmon: (sht15) Add device tree support
devicetree: add lm90 thermal_zone sensor support
hwmon: (it87) Add support for IT8792E
hwmon: (it87) Do not overwrite bit 2..6 of pwm control registers
hwmon: (it87) Fix pwm4 detection for IT8620 and IT8628
hwmon: (it87) Ensure that pwm control cache is current before updating values
hwmon: (it87) Improve IT8622 support
hwmon: (it87) Add support for IT8622E
hwmon: (it87) Add feature flag indicating that VIN3 is connected to 5V
DT: add binding documentation for STTS751
hwmon: new driver for ST stts751 thermal sensor
hwmon: Register thermal zone only if 'dev' parameter was provided
hwmon: Relax name attribute validation for new APIs
hwmon: Update documentation to clarify rules for the 'name' attribute
hwmon: Make name attribute mandatory for new APIs
hwmon: (lm70) Add support for TI TMP122/124
hwmon: (lm70) Utilize dev_warn instead of pr_warn
hwmon: (ltc4151) Export OF device ID table as module aliases
hwmon: (adc128d818) Preserve operation mode
hwmon: (adc128d818) Support operation modes 1-3
...
1. Add necessary initial configuration for clocks of display subsystem.
Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYk3YaAAoJEME3ZuaGi4PXYwAP/2d7SiLymurXwmctrxm9Q5kI
ZD7xdTr5JWq/sbuGfDHLKUz4iPMBsdQqRwczZ+DSls+Iet1fNw4enmoU/p1SpZ/5
31EFB3uN28DSL4ZA3SzOrzPgcdMRxXOYhUMq9DTY5N8h0LlI2TwB3WBDgWTpGB6R
NXX3wKulH2hXJyOizOZh2yel5KvzLqug7j/V0u9K1OmUISmTy3XfDWaXIVk33MUw
IZ6qpgTzShw6sZj5VmR9CFPFbDjwExTVenIA9gwewJlQNQnqrsg0BdEF3ZvasW+V
eFeLV4ieZHKzEoVjwdxGgTLLwjjL/orsWQ5CYiQNeCKC85rgTVfijTe8s+QKOYAq
SiV1GghHACExpCULhtQiqioFsUAUPJ+iq/EZ9NfNh7QzE5Y05RJ7bRgRd2UdBlN8
BXhekgN5RepLwKWHK8oYivMMpIKzDve1ICRpQYBVxmmwg9nzRz6Nij2YUi4oEb5j
77FOuyKe5M+QCIoKVn2v/CDQMemGkI8OEsKubjDKcOZ2V2COw7Sr1L/GCGVCslLM
FyOjaTKeoIzkrx62qgqGFuNwEaZwW0dDacHrZrccEAn9P9G7O/cU8EE9F5nJqGG0
IeDaPH7BqQ0gOHbvrEkljSbJuuOMQmZJl6qh8MMJYB9P8u9Ft3OXUXJ1qBNZB4si
E5nFWGj0CMm0UfBWgkD/
=02Sx
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late
Pull "Samsung DeviceTree ARM64 update for v4.11, third round" from Krzysztof Kozłowski:
1. Add necessary initial configuration for clocks of display subsystem.
Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.
* tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (27 commits)
arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
arm64: dts: exynos: set LDO7 regulator as always on
arm64: dts: exynos: configure TV path clocks for Ultra HD modes
arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
arm64: dts: exynos: Add TM2 touchkey node
arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
arm64: dts: exynos: Add HDMI node to Exynos5433
arm64: dts: exynos: Add DECON_TV node to Exynos5433
arm64: dts: exynos: Fix addresses in node names on Exynos5433
arm64: dts: exynos: Make TM2 and TM2E independent from each other
arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
...
This patch updates the LM90's devicetree definition to
include the #thermal-sensor-cells property as well as
the sensor constants in include/dt-bindings/thermal/lm90.h.
Cc: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds common pinctrl device tree defines for STM32H743 and
STM32H753 MCU.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
and making niu (interconnect) clocks critical on rk3288, as
CLK_IGNORE_UNUSED is not enough to keep them running all the time
when more users access particular clock subtrees.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliRFEMQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgWHMB/0ZQ1p88CmxkN8kiaJBkO8UpmLuRrPivXoH
HiZBN9fvxdR7DcrhQvH8kSt2Ir9h3Rc22TzPWChcwq1io66Bd8BuXkPP/vP9am8J
It0VeERQzyHTLY++DYTsBmQmuaxPRm9cFsxLY5i4vowipjinFj/gDDX6DIg97j2p
r0ytQQhOM47sRhfJSrGFsfXZIa5z5Ty0Qg04ESGmvIllrMUlm9N7+U667qknkYLW
j2T7jWAK2l3RVe9AC7Bf10l7sldzHPHY5MuQ5WiFUWW3OgJyIUKJbD8jythg9i8V
+54LsmX3HkIjS1OiIwECtU1Nv2t8w9RqDRCubzp/Yf+ff+oDL0h3
=VeAF
-----END PGP SIGNATURE-----
Merge tag 'v4.11-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull Rockchip clk updates from Heiko Stuebner:
"Non-critical fix for the pclk_edp divider on rk3399, one new
clock-id and making niu (interconnect) clocks critical on
rk3288, as CLK_IGNORE_UNUSED is not enough to keep them running
all the time when more users access particular clock subtrees."
* tag 'v4.11-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rk3288: make all niu clocks critical
clk: rockchip: use rk3288 vip_out clock ids
clk: rockchip: add rk3288 vip_out clock id
clk: rockchip: fix the incorrect pclk_edp div width for RK3399
- Support for one new SoC, the V3s
- Convertion of two old SoCs to the new framework, the old sun5i family
and the A80
- A bunch of fixes
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkEtDAAoJEBx+YmzsjxAgLl0QAIt0GnG4tXyTsRqrregO8Qbt
UPK/Qs0hOW5VbpPzKDsWPwNGnTbvYy9I/RDnFiMJtEVU7Cj6ttEO4XvEKnaFF0N+
0ux0ATUIrz6p1pbSUTxV0dCfkqcI78+ECLV4Nsvs7pj5RoJVt4Z5gBMAdErrsB+6
q1VYLXIhs5atK1dTgjEWe4VTwaCpNCwoPMgbedOuZMLB0zFRVxtB/JSxlwGHpdoy
vYZqSUgqmDG1WNLKXAiqsa3k9BnSsX/surAfd6mVlk1MauyKzgHKzxkBrvbNjAMR
juaQcSXwkTOm8bRXj7E7NSFFBWiPUJt6dvXCxRJau79k+bYyPduv0UNu7T0a1IjM
lN0PyJcY22m9O9nsoXVSMvU9YJJd91R94UQRpRSQxN1sOLMGVwnCDhQnB5RJhV3p
gRZNZETTT/rP8E3plJJdce5xCsI6FXUT0jYTQW9cWVTcZbhKsntgNoEE4w/tqWIw
dgE/2UzReyBkWzi9OgjKyca+q8zEd6i1w9DqAg3MwwR8K03oS/aKkBaHjgwk/i8x
uiRXxhT5gLFhYOCwz3DmWw3OjwU7uCifyybGKCoxUE7U/3d2AalsTISCm3PX3dxl
RTDPJWKOSfCyzTJNZpHM5MtIKGh/jM4/yUQ3ARXTGyIa9Uxb4DXlEH6gXvrZ4BUA
UsyJ8d19owDqLIBYaE42
=Jkg2
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock updates from Maxime Ripard:
- Support for one new SoC, the V3s
- Conversion of two old SoCs to the new framework, the old sun5i family
and the A80
- A bunch of fixes
* tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
ARM: dts: sun9i: Switch to new clock bindings
clk: sunxi-ng: Add A80 Display Engine CCU
clk: sunxi-ng: Add A80 USB CCU
clk: sunxi-ng: Add A80 CCU
clk: sunxi-ng: Support separately grouped PLL lock status register
clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
clk: sunxi-ng: Call divider_round_rate if we only have a single parent
ARM: gr8: Convert to CCU
ARM: sun5i: Convert to CCU
clk: sunxi-ng: Add sun5i CCU driver
clk: sunxi-ng: Implement global pre-divider
clk: sunxi-ng: Implement multiplier maximum
clk: sunxi-ng: mult: Fix minimum in round rate
clk: sunxi-ng: Implement factors offsets
clk: sunxi-ng: multiplier: Add fractional support
clk: sunxi-ng: add support for V3s CCU
dt-bindings: add device binding for the CCU of Allwinner V3s
...
sources.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYk2ZkAAoJEME3ZuaGi4PXKmQP/1bDh3At40ScH4m5xCP7PfRL
aMEjpGwZQyZ0x07h7G7XYbCZIxJXX2xEQJ8rZiqrANjAPg3SV/t/YrpjYGQuKQHD
USjP11HiaDVTdCSPQM4/kEm8+eS/E97ROA3ZcgLdXu7DkkN1BI2biNSiF7qb1hMR
4Jdn/EJrV+Sg+BiQHemzECX67cKBKpYD/nrcVxoqSKIK6gXK8ikjICmLUHLAfhvZ
4Pwlrh+ATkT8YEEVvibmeIQHgUqI4My0uDkRKlb6C2hr1ZrQw3fkz6W3l7wPtJCg
mhdFGSyBAG/tW4vOFMojKnguRCflXOPOHOpmRpf5VAnMn3VE9widC61amKcQ/YRO
PR3bikZi5uV1AmGtyZYiTAyaFEy47b53l/6sDPwyB0OGruuZfi1dRrkE93BPzoqb
NgLR4mY4VwqGddXv1uFX+aaxzewmt9jf+8pHcAvSLVT1eoK9a7jGezFDGDaYy8Lg
/4UfC4nW8mTfHdrIBq0gcdx0B61t4NyCxaWTDEo8YW8JQCyFOf0kKYEQuTsZA0ni
BDRoa857h6aByLg0e+SqtN/Bg4WKSj3vHHBsbBwIK/HMLLamN/t2AJ3+X2Ufxe/J
yQtisc+0Zpxvt/EH+aO67dSKzELrI5kuW9LuTFjNVvNBvEe4xE7xwUpBUUJZ9w8Y
BaShXDagcuNnlmaAIGoj
=g19s
-----END PGP SIGNATURE-----
Merge tag 'samsung-pinctrl-4.11' into next/dt64
Merge the pinctrl header before its usage.
Defines for GPIO drive strengths on Exynos5433 and Exynos7, used in Device Tree
sources.
Exynos7 SoC pinctrl configurations are similar to existing Exynos4/5 except
for FSYS1 pinctrl drive strengths. So adding Exynos7 specific FSYS1 blocks
pinctrl driver strength related macros which will be used in Exynos7
DTSi files.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Macro to select a clock was not correct.
Offset of enable register starts at 0x30, then calculation to select a bit is:
(@enable_reg - 0x30) / 4 * 32 + bit_to_select
Tested-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
frequency list update for Exynos5433 SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJYiydyAAoJEE1bIKeAnHqLxkoP/2qfduAcS+pBwXjOFXgJgPnt
l/2EHO6CAGsCDh2fW1CfpfB4DvHNoHLvtt5YrtIznzuYL3pIcZTGKoPICsVZnMG8
7q+0/ijU98VRj0g5zXL1UglHvQRiiHVHNhzGNmPJPT6mqayaoxRVYyUkDKd04Kkk
doUR08Zxk4vqU6dr1F699DR3LVNMmc2XDVyHIJX23l3rQF2vB5yLTbMgSmxhNc2O
p7GWN3Vm307V+L6KYpSafNPGxdbzRAdqL6aHciOk9rPBRzE0pVU3rrQpSXfZnUVm
9FkjoeI0VwQYaEgZmXn5QbarqBKlBHfFpKtgg4Yf9HcygecZFf1nhW0yIbEaev20
TrmktOXNe5kchjTWJK0MlYc0Elj/r2/Kq0WHJhlukWWcZ+RAfGvrXz8C2jTjmAoB
UzCY3PciXUmgrdEiBpIuu64lmQGW+zOHlaTb9WLW4xAU9wum5rN2P2G9PJytetYU
ToZJXrYNKD36MzioiLPngUmqYJJj+208SjaIbCEHB38clP4TROp7iNzvBLKrS/2E
kvlBzCjxLP799Tn0Rzbc4KY24+L+2sbCmpfJ0gcyzU0eqw8ib42Zwb6wAHnOb3hz
ffT5q4wZEvVG/RydzYoqJYRvxabZN2PmYlGtvyRozTYAL5irhHYGx1ZK6m0SZJUM
uB8i9oXIaJ8rDIKUO2RL
=F8PS
-----END PGP SIGNATURE-----
Merge tag 'clk-v4.11-samsung-dphy' of git://linuxtv.org/snawrocki/samsung into next/dt64
Exporting clocks for MIPI DSI DPHY and the display PLL
frequency list update for Exynos5433 SoC.
With the A80 SoC, Allwinner grouped and moved some subsystem specific
clock controls to a separate address space, and possibly separate
hardware block.
One such subsystem is the display engine. The main clock control unit
now only has 1 set of bus gate, dram gate, module clock, and reset
control for the entire display subsystem. These feed into a secondary
clock control unit, which has controls for each individual module
of the display pipeline. This block is not documented in the user
manual. Allwinner's kernel was used as the reference.
Add support for the display engine clock controls found on the A80.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for the USB clock controls found on the A80.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for the main clock unit found in the A80. Some clocks were
not documented in the released user manual, but were found in the
official kernel from Allwinner. These include controls for the I2S,
SPDIF, SATA, and eDP blocks.
Note that on the A80, some subsystems have separate clock controllers
downstream of the main clock unit. These include the MMC, USB, and
display engine subsystems.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYjW7hAAoJEFBXWFqHsHzOCN8H/jVJo7Rnx4zwL8sx+2pjuceN
ecTTu2l9U5Nh2Y1uRqDf914rquJteDNYoe0oWz71W7UxpJMl20X3zjfso7SWDqx8
uSEgad6V/qHkgQQnLL9S9WdFQEGhfjVYvnMoVjBQEb1jpwdIm+nr8PIZ+Fqhh8u0
3OLOjXk40PvzKcYwkxqeJQajP0pE6UFUOXQesolcCr+ilTvoqqQ9chPY4Jvsc7Qf
ffC+ueSUymAhIqof2kEfy3PS5NA/ltQjokDpKjvU2+e3uJtM3qwstzt1kPCgX/d7
azOuNNdif4hT2J26qIBG5H/wS/dFEvxnA0P4J/XUwkQ4FPRpa2Er1+F+03n5sPc=
=XwPV
-----END PGP SIGNATURE-----
Merge tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
* tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: zte: pm_domains: Add support for zx296718
soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
soc: zte: Add header for PM domains specifiers
MAINTAINERS: add zx2967 SoC drivers to ARM ZTE architecture
dt-bindings: zte: add bindings document for zx2967 power domain controller
Signed-off-by: Olof Johansson <olof@lixom.net>
Enhancements:
* Add power-domains to mmcif on r7s72100 SoC
* Add OSTM to rskrza1/r7s72100
* Link ARM GIC to clock and clock domain on r8a774[35] SoCs
Clean-up:
* Correct SATA device status on r8a7779/marzen
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYicoiAAoJENfPZGlqN0+++P8P/REww60pI3KHlxzdU/WeMfMi
VEyQCKXJ4x9HVNubJ1f9w8aJBYqSFLCJulYqk4yu1LZJNmTqqD/Z1xtk382z6vmr
uDW3JUj5Vn8kX5FmobN8boU/al4ozildB6Z2r6blnhwC1w3/fZnY88U4PHnKZ9Y2
dJDaYUsjPawf81vJu68MzyEkOXQBfrWrxGr0wdngdOY1BE0ahL7tMvPy3uAtXVC3
YWSJXf25cxiDzDRbmnpMe1dz5nziOq9juaPnDiJCIi8L0Cuf1ZYpvLV2nzrA0MC2
hX+aF94CH8niZW74FMWa8ijjuq7BbgDla9G0R37St29D7/C4c+1mI2cy3qUeJBAn
PKNj+Cmjvrdg/4dFU2X5NaufDXE+wbjsZ8I07iftqhkH6c0EZle6adhAVSlLAQHo
Kk7PRKvTLQV3YsItlW41w0Q13jfkBhtnW3SQtTYQDY88omHytcrM5/EqLdfQxNzQ
6IEUjPuBLLufHfXL0OADAVFitOB6djT5qZDJcGFOcZ1Bh8Fx4+zY2kCpcIi/tAl1
s66kkG8QUiekl0hYcIfviFhkksYmIGVLIrQ17cSB31FCf9jR6b3zUkpPWZChXHDc
jReosGFSfvbxiTdllDyKrDW8CuMaFsc9K/HVMcsRDUwUcCvTdTDF2MruQ5svChyL
axMDOW4cOiSqMko0i4lQ
=5/D6
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.11
Enhancements:
- Add power-domains to mmcif on r7s72100 SoC
- Add OSTM to rskrza1/r7s72100
- Link ARM GIC to clock and clock domain on r8a774[35] SoCs
Clean-up:
- Correct SATA device status on r8a7779/marzen
* tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r7s72100: add power-domains to mmcif
ARM: dts: rskrza1: add ostm DT support
ARM: dts: r7s72100: add ostm to device tree
ARM: dts: r7s72100: add ostm clock to device tree
ARM: dts: r8a7745: Link ARM GIC to clock and clock domain
ARM: dts: r8a7743: Link ARM GIC to clock and clock domain
ARM: dts: r8a7779, marzen: Fix sata device status
Signed-off-by: Olof Johansson <olof@lixom.net>
hiword registers (write-mask in upper 16bit) and domain-definitions
for the rk3328 soc.
Secondly a "driver" that attaches to the already existing grf nodes
and is able to set static defaults for settings that cannot really
be attached to any specific subsystem.
Most GRF settings can already be set from drivers using them, but there
are some behavioural settings like the mmc/jtag switch that cannot.
As the commit message states this is really meant as a last line
of defence for things that neither belong to a subsystem nor to the
Having this here allows arm64 socs to have this as well and also
moves another bit of code out of the arm32 mach-rockchip.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliBTccQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgdMAB/42pPY0pKqOWlAfqzTSlIh98vi9jp0nZUu+
6RMlaqewhHq/zbH0qqJdcBrYRZF+EmJpTDGG2nltNi8FLNMyr+y7a0FVyjk/u43L
FnYELcDm7yeCZ0012ZP/4hlhWI9YizojbIKH4p2o8nIj64CS132ZMVVgojyzvVc1
0WLWUf8FBiMqsBpa6Kl117pvKayagk79PM570Ee2kRBxanN8yQaKmXTqG670eKzo
7nar1VGAubAVpCZfbv4opugGfrjYPJFX4gcu3yJvtRRN+hTt6idRP40YoCMZSVds
+okL0XW4G70ioXqZBS59Wq5FJS7frr8HRJbYD8lZg2vF948ZQnbC
=4aXM
-----END PGP SIGNATURE-----
Merge tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Some extensions to the power-domain driver to support domains in
hiword registers (write-mask in upper 16bit) and domain-definitions
for the rk3328 soc.
Secondly a "driver" that attaches to the already existing grf nodes
and is able to set static defaults for settings that cannot really
be attached to any specific subsystem.
Most GRF settings can already be set from drivers using them, but there
are some behavioural settings like the mmc/jtag switch that cannot.
As the commit message states this is really meant as a last line
of defence for things that neither belong to a subsystem nor to the
Having this here allows arm64 socs to have this as well and also
moves another bit of code out of the arm32 mach-rockchip.
* tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: drop rk3288 jtag/mmc switch handling
soc: rockchip: add driver handling grf setup
dt-bindings: add used but undocumented rockchip grf compatible values
soc: rockchip: power-domain: add power domain support for rk3328
dt-bindings: add binding for rk3328 power domains
dt-bindings: power: add RK3328 SoCs header for idle-request
soc: rockchip: power-domain: Support domain control in hiword-registers
Signed-off-by: Olof Johansson <olof@lixom.net>
AHB clock branch is needed in order to enable SDHCI
on msm899(2/4).
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and
phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed
to setup initial clock configuration for display subsystem in device tree
in order to avoid dependency on the configuration left by the bootloader.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* clk-ux500:
clk: ux500: Convert ABx500 clocks to use OF probing
clk: ux500: Add device tree bindings for ABx500 clocks
clk: ux500: move AB8500 sysclk over to PRCMU clk driver
These clocks have been broken for a long time unfortunately, a
hurdle of misc problems made them stop working at some point
breaking USB and audio on Ux500.
The platform as such and all "regular" clocks are migrated to
OF/device tree, so let's migrate also this driver.
With this patch and the corresponding DTS fixes, and a bunch
of probe deferral fixes, audio starts working again on Ux500.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The HHI_SAR_CLK_CNTL contains three SAR ADC specific clocks:
- a mux clock to choose between different ADC reference clocks (this is
2-bit wide, but the datasheet only lists the parents for the first
bit)
- a divider for the input/reference clock
- a gate which enables the ADC clock
Additionally this exposes the ADC core clock (CLKID_SAR_ADC) and
CLKID_SANA (which seems to enable the analog inputs, but unfortunately
there is no documentation for this - we just mimic what the vendor
driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same
silicon, and all share the same clocks.
However, they're not packaged in the same way, and therefore not all the
controllers are actually available on all these SoCs.
Introduce a clock controller driver for all these SoCs with different
compatibles to take that into account.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch introduces the stm32f7 clock DT bindings.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the OCOTP so that this hardware block can be used.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The DSI pixel clocks are muxed from clocks generated in the analog phy
by the DSI driver. In order to set them as parents, we need to do the
same name lookup dance on them as we do for our root oscillator.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlh+vFMQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgf7TCACncJmYlvYp+aZEgBlEcyCTulHNSyRZHVPd
c4zBsgZmgxqmgrxe8YsW6DcfPP96MtL/C/fIupxTphxxfAS5HQx2KCeVpOrfffk7
lJ1CPyCP5GdjaZ98hKVuMpKVkQu1u26DTNWSy62hbSQQndbpP0NbGsIJJUFia1vm
JX0POVYt0xSo6GnbVRcKN/5b9k0HJNG9aejL8u/uA3+yr8diiKzYrtnaFzai5kvE
3LgXIDGPUZVfwZ2vrJfDCYqNlij/tF2yLIhEDDoMSl00WolJfmnMKOg1Lt0DzuMz
OQY6ZIexTV1CCV+9BjXMVCLth7DH7K3EztQsvyJtr90wrfYs+4Vd
=4WOJ
-----END PGP SIGNATURE-----
Merge tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull Rockchip clk updates from Heiko Stuebner:
A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.
* tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: clk: add rockchip,grf property for RK3399
clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188
clk: rockchip: use rk3288 isp_in clock ids
clk: rockchip: add clock ids for memory controller parts on rk3066/rk3188
clk: rockchip: add rk3288 isp_in clock ids
clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFER
clk: rockchip: add clock controller for rk3328
dt-bindings: add bindings for rk3328 clock controller
clk: rockchip: add dt-binding header for rk3328
clk: rockchip: add new pll-type for rk3328
clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288
clk: rockchip: add a clock-type for muxes based in the grf
- addition of the CPU clock configuration data for Exynos4412
Prime SoC variant,
- removal of driver for deprecated Exynos4415 SoC,
- switching from the syscore to regular system sleep PM ops
in the audio subsystem clocks controller driver,
- updates of the definitions of some "Network On Chip" related
clocks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJYgPcFAAoJEE1bIKeAnHqLt9EP/0e5ljfUQRiczFvPVfUZeZb0
cn3HZrLBk+aDxDIBKpWSSUY0RraK6hjZYpwizRQyYBH7XFQY4aWxk2mtg+B5mPBT
OH02tjrFeQ+BG13BzYbMKg86jFrDqQEjlpMU6PHrILrQoRqoNBomlJXpC8Jw5Oqb
c79QxCsX8f94cbTgE3FHlF2ZHr8Wo4FKP2eWkdVBty1XvRvvZ1qE9IX6/wsqn1o7
WCoJpKq7UjX1U9gBeHZzFRgzpKjsSoSha7yW/CkxP6b0TksQUmGi81asFxdslqi3
xiK0PlsXB2R7TKNLNhU4hGcV7lvQFJaPOdWshvnQ7nFz9dlFjZkSGUTvLGYLH2+j
43nHnHqEP6avNYo5cBR27Wc2ZaARMXq7AMJvZHC2/DuhtaO70wKfFVib1nFe40pX
UBP5dxOy7C2taRxSr3QSmviuBwZYBmDWioE3SQE/IdM6z3WpN37kNrNw1OrMctji
MFCyIfeKlUpLJVZRcdKKxvem0QTPN5/cWote5ibNO+x0O9RWkXSrdBtnoioc5oL7
30TtZlGbKG9VsRRjxYhuul/lpTZvyewg5PP9T5xGmeXOF69SlPuZwOu26D3E2Lej
AiTMellqH7vjX2uNSQ4lQExzOj8psJ0Mq7hj5lRavsPn8m50PAHMfq+YHncii32I
E1HZF4sh7MYozX/2Els3
=mSQz
-----END PGP SIGNATURE-----
Merge tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull Samsung clk updates from Sylwester Nawrocki:
- addition of the CPU clock configuration data for Exynos4412
Prime SoC variant,
- removal of driver for deprecated Exynos4415 SoC,
- switching from the syscore to regular system sleep PM ops
in the audio subsystem clocks controller driver,
- updates of the definitions of some "Network On Chip" related
clocks.
* tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: Remove Exynos4415 driver (SoC not supported anymore)
clk: samsung: exynos-audss: Replace syscore PM with platform device PM
clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
about CSI, are different, which makes it to need a new CCU driver.
Add such a new driver for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Export HDMI clock from internal to dt-bindings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYeO01AAoJEME3ZuaGi4PXX7QP/0wlZmoUeBiAGuVDsOUqS5jT
FQd+lC4r1croSn8oFMKx6Ta8LxwI8XjmuCOvRjBxBtNxzq4wTCABlVOexWjAHCMz
KhYWcTBGIj+8Nk6BkBg8ga5iQAqQY6JhKKRBg0xbe8XqlkMThapJ3C90A4oWTeqm
D9SERXJzeJiBr2dqVORxt3d/XtLXXKEw+3/qK9iOu4uAZE7NECUD1EIOM6gGXkLM
55hOw7Qzh7g4L9umqVCj37gNK5nu4HLvvVA0FasMi6CL+EuHs5im9NOP3naN152f
/W4xPRS6hVYzvueWHILBmaxNbwYMthJ34gXIdMg4td/nO/nVRMCplnsjbm+1rQDQ
UoasRanobu+s+5nzRGybkM5Ni8QHZ/CsXK8DtSSlPC3tPMs5GywGIEfXqHqJzabs
WlmhD68LWFzh2Og8X2KzB+5Pkmvp3HuUVLqPtsPpjnHQOFDrbWTjH3tCSpF/oCZV
eWBrWoYZq4ZvzmiHWPrUsOuw0E1qpGg+QY169+/X8+4NBDglCGVN+d6Z83fb1qEA
Kcej1kdCvg47xg4l9x+OamlVBkspnG/n/uDX4zkv5Vo0VOmU6kfpA2/zI9UW2UMB
4rmol7Zw+MW8e5o49dgO9q1bEO2EqJj/7tVTVlhAYy8IS8G8i/FUK5zd2FKoqpzj
z1hky4Wc1Lof9sIiQfKY
=reZn
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Samsung DeviceTree ARM64 update for v4.11:
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.
* tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
arm64: dts: exynos: Add HDMI node to Exynos5433
arm64: dts: exynos: Add DECON_TV node to Exynos5433
arm64: dts: exynos: Fix addresses in node names on Exynos5433
arm64: dts: exynos: Make TM2 and TM2E independent from each other
arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
arm64: dts: exynos: Remove unsupported regulator-always-off property from TM2E
arm64: dts: exynos: Comply to the samsung pinctrl naming convention in TM2
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos5433
pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
arm64: dts: exynos: Add support of bus frequency using VDD_INT on Exynos5433 TM2
arm64: dts: exynos: Add bus nodes using VDD_INT for Exynos5433
arm64: dts: exynos: Add PPMU node to Exynos5433
Signed-off-by: Olof Johansson <olof@lixom.net>
Support for Exynos4415 is going away because there are no internal nor
external users.
Since commit 46dcf0ff0d ("ARM: dts: exynos: Remove exynos4415.dtsi"),
the platform cannot be instantiated so remove also the drivers.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch adds header with values used for ZTE 2967
SoC's power domain driver.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Creation of dt include file for specific stm32f4 clocks.
These specific clocks are not derived from system clock (SYSCLOCK)
We should use index 1 to use these clocks in DT.
e.g. <&rcc 1 CLK_LSI>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Add definition of EBI2 clock used by MDM9615 NAND controller.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[sboyd@codeaurora.org: ebi2_clk halt bit is 24 not 23]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add clock drivers for hi3660 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
[sboyd@codeaurora.org: Simplify probe with function pointer]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support to use reset control framework for resetting MSS
with hexagon v56 1.5.0.
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
We need to also have OFFPULLUDENABLE bit set to use the off mode pull values.
Otherwise the line is pulled down internally if no external pull exists.
This is has some documentation at:
http://processors.wiki.ti.com/index.php/Optimizing_OMAP35x_and_AM/DM37x_OFF_mode_PAD_configuration
Note that the value is still glitchy during off mode transitions as documented
in spz319f.pdf "Advisory 1.45". It's best to use external pulls instead of
relying on the internal ones for off mode and even then anything pulled up
will get driven down momentarily on off mode restore for GPIO banks other
than bank1.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 5db7e3bb87 ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration") has added a header file for defining the
pinctrl values in order to avoid hardcoded settings in the Exynos
DTS related files.
Extend samsung.h to the Exynos5433 for drive strength values
which are strictly related to the particular SoC and may defer
from others.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
According to a description from TRM, add all the idle request.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the dt-bindings header for the rk3328, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3328.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Interrupt numbers are from the datasheet, so no need to keep them in
the ABI. Use the number in the DT file.
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Creation of dt include file for specific stm32f4 clocks.
These specific clocks are not derived from system clock (SYSCLOCK)
We should use index 1 to use these clocks in DT.
e.g. <&rcc 1 CLK_LSI>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds all RPM based clocks for msm8974, except cxo and
gfx3d_clk_src.
Tested-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The current ipq4019 clock driver does not have the node for
PCNOC so this patch adds and registers the PCNOC clock nodes.
This PCNOC clock is critical and should not be turned off so
setting CRITICAL flag also.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The current ipq4019 clock driver does not have support for all
the frequency supported by APSS CPU. APSS CPU frequency is
provided with APSS CPU PLL divider which divides down the VCO
frequency. This divider is nonlinear and specific to IPQ4019
so the standard divider code cannot be used for this.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The current ipq4019 clock driver registered the PLL clocks and
dividers as fixed clock. These fixed clock needs to be removed
from driver probe function and same need to be registered with
clock framework. These PLL clocks should be programmed only
once and the same are being programmed already by the boot
loader so the set rate operation is not required for these
clocks. Only the rate can be calculated by clock operations
in clock driver file so this patch adds the same.
The PLL takes the reference clock from XO and generates the
intermediate VCO frequency. This VCO frequency will be divided
down by different PLL internal dividers. Some of the PLL
internal dividers are fixed while other are programmable.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The patches regarding eee-broken-modes was merged before all people
involved could find an agreement on the best way to move forward.
While we agreed on having a DT property to mark particular modes as broken,
the value used for eee-broken-modes mapped the phy register in very direct
way. Because of this, the concern is that it could be used to implement
configuration policies instead of describing a broken HW.
In the end, having a boolean property for each mode seems to be preferred
over one bit field value mapping the register (too) directly.
Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Driver updates for ARM SoCs, including a couple of newly added drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip
it is running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system controller
- A new checking module for the ARM "PSCI" (not to be confused
with "SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their
power management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra
bpmp interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates.
Conflicts:
- ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
- drivers/soc/renesas/Makefile: multiple files got added, keep
all in logical sorting
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMaGWCrR//JCVInAQLs5RAA3I1I8/R+pd5jfMaAB8Od3S4g8YSqIDjC
EIOoDPx9GDV70+cGs4ea+L9bfGs3ePGivCtcbftNsLDAueQ2jKMa3ShqxA/MMbJE
rWQi/ARaDFY0nHL8VPWq7XyYwwrah+/gKBr8UhkaKI0vy6DBqxyCknrS2kgF88rv
DVs2wnRvDM7GVUax0JDzuySR7BXJIuUfS78jPMESASbTQktsZTFUyH+osiqHtptD
M5bPC8rxOeZXljt3DOvXSdK9rVnji/A3nznY4r3tlt805eaOA7CzjVSsY27WQel0
63uj+FgE+eM0sECIxpkNbH/HHq2V4QkUoy3fk0xPkzRbllBBpS+UieGamTnPJup8
wf5uiH1IqLLLV9F/504S92fp0pgFPpOGYWZnBDlIbh3aGq4tMjIRqRYMTyCT02hN
+b54v0SuImFiN6p8HMS1ugYQ+1m9TU40b5pZkzkTJbSQOMm6oi3j0A0orXU/TPKd
FVMrlUyfh+yu+vs1hGWLs1+mBjFnxXzSc8yJeaCdX4MvCY5/aVJZ+cwq4Bk+1YU5
9Qhkeo5JV/l9FlrjxomnEq3l/WV/pFmj7JRZsb1BM88m+5LYUf2lv11b5B4FvrTd
yx8SSpe3+ofIijdNbJ8IywF6y0OXF6UnrlouOVdSIp+wPs+pibdU/5gQep16pvqd
WW6sVWn6quA=
=6dP8
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip it is
running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system
controller
- A new checking module for the ARM "PSCI" (not to be confused with
"SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their power
management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
misc: sram: remove useless #ifdef
drivers: psci: Allow PSCI node to be disabled
drivers: psci: PSCI checker module
soc: renesas: Identify SoC and register with the SoC bus
firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
firmware: qcom: scm: Remove core, iface and bus clocks dependency
dt-bindings: firmware: scm: Add MSM8996 DT bindings
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
ARM: shmobile: Document DT bindings for Product Register
soc: renesas: rcar-sysc: add R8A7745 support
reset: Add Tegra BPMP reset driver
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
...
Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where things
come together.
We get a DT descriptions for a couple of new SoCs, all of them variants
of other chips we already support, and usually coming with a new
evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers
or industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on
Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it into
products and have served their purpose in the kernel as a template
for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree
Conflicts:
arch/arm/boot/dts/r8a*.dtsi: a node was added
the clk tree, keep both sides and watch out for git
dropping the required '};' at the end of each side.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMZHGCrR//JCVInAQKQ6A/+Og42qy1rhL3cfHiSsT7e5giQNVSFY7Cm
Z06R83AEv6HDMTNzyiJr5udRGOhm40qIoe92fhVJSRF7F6o/GbCQ7YOyU4KdQELg
caqRCe1Nq6RT0RYU0m6xVyv/ox0JTNEaB+TcvD1x4pgUQNo9sSBfiXpTzOKhLhqs
zmsfpNpj8v188Iofoju3WtwN26riJ7P4QdYIaNaH4qNQgoQbMbQICDwnpSsNJY+x
MSlNrbtYqfz6vc5fqa0mtfhF6wIFxuRnTgSLi9skWZ2l/fkn4ljF3RhN1Z86TYPv
CYsqDu+DF0YNxFrht3BAK6WTe2PdCnMNLNnMhYC6NDQ8YG1tbwvXQFM1KVanRvxx
hXP4Nt2sZYiqA4v8joFPgp9gnyBMdhtJEtWSmHwCY0RFObySJR4I1GY7igh02HUJ
gxlmOYcmklzLiyXvfjdDvg0sCV1tBhaBKTLYxF7lVCzG2QaR22Le+p3o+SWm+e+V
Ruc9l/iwHaeasNnbAkDEiEyi1FobtuEeTSZnKaXfKX8WuKVZLJrCEm7WiRIsj0Ww
vJ9ABVft7PEv/Ov3fbKBWON4vxKTBBgHuEDcbIsp19w4BSH1WJf5bGXIm7QeA3Z9
aD+DtA5W5ExIjMQR2+qgz/BBIzVVVVvG8DEcdcCtc3JGRJll5PadShLdqKjVIerc
SpsxqCKoRCI=
=wJt3
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
No dramatic changes are found in this development cycle, but as usual,
many commits are applied in a wide range of drivers.
Most of big changes are in ASoC, where a few bits of framework work
and quite a lot of cleanups and improvements to existing code have
been done. The rest are usual stuff, a few HD-audio and USB-audio
quirks and fixes, as well as the drop of kthread usages in the whole
subsystem.
Below are some highlights:
ASoC:
- Support for stereo DAPM controls
- Some initial work on the of-graph sound card
- regmap conversions of the remaining AC'97 drivers
- A new version of the topology ABI; this should be backward compatible
- Updates / cleanups of rsnd, sunxi, sti, nau8825, samsung, arizona,
Intel skylake, atom-sst
- New drivers for Cirrus Logic CS42L42, Qualcomm MSM8916-WCD, and
Realtek RT5665
USB-audio:
- Yet another race fix at disconnection
- Tolerated packet size calculation for some Android devices
- Quirks for Axe-Fx II, QuickCam, TEAC 501/503
HD-audio:
- Improvement of Dell pin fixup mapping
- Quirks for HP Z1 Gen3, Alienware 15 R2 2016 and ALC622 headset mic
Misc:
- Replace all kthread usages with simple works
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJYUGNQAAoJEGwxgFQ9KSmkc3kP/jS5EDPWb6dwqdlZomT0lumR
flpvLLo6TWTi9CS8MkC1hPHbR+3LGPMUL8Wwf2cVb06dvKpUHa5P3Wq6lMm6T9wO
1ExhnHeDEDfGXop3/EuADmpRsfsV+z/PpWYmGB0vkoyPTg7e3xQRA6Im6p6IMi45
pnvEaSe18oEidqzAxaBgBFTdoNyaD9zrPL5J9Jh0/JCZ/kSmY6hhI+hlTjjOKCR6
fs4ge2WreonAKbhfOE61eE2KDnQA4II/2JUoPA42wZOat9ukb8DiErgHoFgsWTtE
h+/ZN5Qj3dweP3+NIKsWrmfC6qzTt9OnUNPB2O0A+UYmAMQBjBz9KVxW1FHyTqBp
ewATtvCNIQs+uPMaO/Q/Qo3ZkKLf/W7o/Dt2u/orSrnQ2plKgIOiHJodhXlTrOWm
szF+qJq0xRB7+/dZa+gDjGPAjirr6n3Fv7wrJmqfyF0hLaIEy4wa2Rd/IAZ9Ar46
5S4prL2Ba1CKf1YV27DR1bjUTAonlApfczNp+urCGQJCfZ0kQOAhZJQ/mbMOgSDS
KEC0vY6NLr88b19OETS4oQZ0ixxIAm8hwAle6z39GGhGZ8JWH5+JRzy8emVh2bss
lpFLFHLwK+a+JHxmnOniJW9AlC8I7hVqfS63qaTXfvDnMMcRd5fMgniZt8bTWc2/
F5hsE83JUlcA8Owfyoca
=WZeb
-----END PGP SIGNATURE-----
Merge tag 'sound-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"No dramatic changes are found in this development cycle, but as usual,
many commits are applied in a wide range of drivers.
Most of big changes are in ASoC, where a few bits of framework work
and quite a lot of cleanups and improvements to existing code have
been done. The rest are usual stuff, a few HD-audio and USB-audio
quirks and fixes, as well as the drop of kthread usages in the whole
subsystem.
Below are some highlights:
ASoC:
- support for stereo DAPM controls
- some initial work on the of-graph sound card
- regmap conversions of the remaining AC'97 drivers
- a new version of the topology ABI; this should be backward
compatible
- updates / cleanups of rsnd, sunxi, sti, nau8825, samsung, arizona,
Intel skylake, atom-sst
- new drivers for Cirrus Logic CS42L42, Qualcomm MSM8916-WCD, and
Realtek RT5665
USB-audio:
- yet another race fix at disconnection
- tolerated packet size calculation for some Android devices
- quirks for Axe-Fx II, QuickCam, TEAC 501/503
HD-audio:
- improvement of Dell pin fixup mapping
- quirks for HP Z1 Gen3, Alienware 15 R2 2016 and ALC622 headset mic
Misc:
- replace all kthread usages with simple works"
* tag 'sound-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (296 commits)
ALSA: hiface: Fix M2Tech hiFace driver sampling rate change
ALSA: usb-audio: Eliminate noise at the start of DSD playback.
ALSA: usb-audio: Add native DSD support for TEAC 501/503 DAC
ASoC: wm_adsp: wm_adsp_buf_alloc should use kfree in error path
ASoC: topology: avoid uninitialized kcontrol_type
ALSA: usb-audio: Add QuickCam Communicate Deluxe/S7500 to volume_control_quirks
ALSA: usb-audio: add implicit fb quirk for Axe-Fx II
ASoC: zte: spdif: correct ZX_SPDIF_CLK_RAT define
ASoC: zte: spdif and i2s drivers are not zx296702 specific
ASoC: rsnd: setup BRGCKR/BRRA/BRRB when starting
ASoC: rsnd: enable/disable ADG when suspend/resume timing
ASoC: rsnd: tidyup ssi->usrcnt counter check in hw_params
ALSA: cs46xx: add a new line
ASoC: Intel: update bxt_da7219_max98357a to support quad ch dmic capture
ASoC: nau8825: disable sinc filter for high THD of ADC
ALSA: usb-audio: more tolerant packetsize
ALSA: usb-audio: avoid setting of sample rate multiple times on bus
ASoC: cs35l34: Simplify the logic to set CS35L34_MCLK_CTL setting
ALSA: hda - Gate the mic jack on HP Z1 Gen3 AiO
ALSA: hda: when comparing pin configurations, ignore assoc in addition to seq
...
framework. The only patch that can even be considered "core" adds another
clk_get() variant. The rest of the changes are in drivers for various SoCs, and
we have a few bits for ARM shmobile architecture code (dts and mach) due to the
dependency we're breaking between shmobile architecture code and its clk
driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the
summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that have
subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABCAAGBQJYT1GXAAoJEK0CiJfG5JUlQ1QP/iOaWnE8TBLK/lOKPte2rw8U
1rw2SDQ8gEJBGIVbZZsnOq6Pp1sVKrJ/7S9ybBeSHoOVb5iTCVAB4wG5uqdLLUGs
4cHj4Vtge7xSxPLCh6YzawS0SjbtbYp1KXHBygGB2COIF53zphkmuM74gZ+l3dcz
TMkfbIvwm8ISvNjc7tRpjhzf6+XUTIVRJ6UZPMnir08lTmDqHz7mouY7nUxlbWOy
lOlF725RoBSa4LcBt+nZcNZ7Cu8eajFneeE87YiLdM4aS/VYm1Ajs9KzZYIRM3R6
mznmiSDwCWTOzU4CsPSdcxGXePzyPrkDvRGWED2qHXNwWQ7Asbtm5pxDKEJ+rj8L
LoB60z20d5PP0zJeiSwnr3XOgp95gW6vduAngu094O7FDZV7yY90wENIphQqgHaU
5nVEPYWTK3lrxAShadpHvnyZI5A621QbNYzAoCAM/jf5xa3JW+AbkERmO/RyEsTO
s6gAKX9H4WiQsEHrmBpJ+VsVVmlT5fhCtqskohaEqFg9CaVaxXvTPzN2fO9KtbDC
M6JPycE9qgu08TWTyJr9xGDGBh0mKP+7ffxpj1x1gVT59HmCLAGTMEvMuHAfKCfW
vz6qPjWW4KnqwAY0JvDZy1y37YQMytA5PVidV/XsEM7WLnmbutTCEbmwIx8eUNGv
NaEpc4l2hvKLwCo4w0J+
=RXZr
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds
another clk_get() variant. The rest of the changes are in drivers for
various SoCs, and we have a few bits for ARM shmobile architecture
code (dts and mach) due to the dependency we're breaking between
shmobile architecture code and its clk driver. Those shmobile bits
have also been pulled into arm-soc tree. Here's the summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that
have subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
clk: add devm_get_clk_from_child() API
clk: st: clk-flexgen: Unmap region obtained by of_iomap
clk: keystone: pll: Unmap region obtained by of_iomap
clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
clk: cdce925: Fix limit check
clk: bcm: Make COMMON_CLK_IPROC into a library
clk: qoriq: added ls1012a clock configuration
clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
clk: bcm: Support rate change propagation on bcm2835 clocks
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
clk: ti: omap36xx: Work around sprz319 advisory 2.1
clk: clk-wm831x: fix a logic error
clk: uniphier: add cpufreq data for LD11, LD20 SoCs
clk: uniphier: add CPU-gear change (cpufreq) support
clk: qcom: Put venus core0/1 gdscs to hw control mode
clk: qcom: gdsc: Add support for gdscs with HW control
...
No core changes this time. Mainly gradual improvement and
feature growth in the drivers.
New drivers:
- New driver for TI DA850/OMAP-L138/AM18XX pinconf
- The SX150x was moved over from the GPIO subsystem and
reimagined as a pin control driver with GPIO support
in a joint effort by three independent users of this
hardware. The result was amazingly good!
- New subdriver for the Oxnas OX820
Improvements:
- The sunxi driver now supports the generic pin control
bindings rather than the sunxi-specific. Add debouncing
support to the driver.
- Simplifications in pinctrl-single adding a generic parser.
- Two downstream fixes and move the Raspberry Pi BCM2835 over
to use the generic GPIOLIB_IRQCHIP.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJYTny8AAoJEEEQszewGV1zz0MP/2KLLiZtBaBo0hDfY2Oussjp
JRO/VkjFIff/iDznkJJhMFPGwQ6ebp63vNRrwwOYwGa2GyZZrbeshul3oV89fyeL
NYApweAFIOFnTI6TVb5k1cGoPJcck2OalSkwHNvPVEXYykf3xy6Jm0M81T9t8fsu
xmSAfqvue9oYgDGN3jYVzsL9U6mGdWZV5fjFzwEfl/6oMA03/CMFdkDz6OBOj9ms
addIx6fQEiS1XtIwEKnX6PS8Q78/vJ/Yl6IKow/5U5lTx5HR+nbECADdEM3jqper
jifodSzJiN6fE3C55o9uupM8tVbu9lj18bb2UVOLiFB+IVlWYKekIzG+8Jg0YvJ7
zEiLzXntNHGNM3Nvinf0AL42+Uz8Ar93AvhdZD2H4yqo6dA8ifojNnavuUa9piGR
xlV8llwgSXZF8+b0ZodSFSS4R0zSGSXSimIlWDsdJ06UWHoJU2yijmkEJicXyS23
Qlo+eK830F+e0FWHTEq+OsiFoCOrD3Zin3gfNtCKoLZpTf77YFOkF3aGMrrmoIRr
MGahrssK+B6Hr8JzHWZDLpIEUL3VB+gHm6Vj4Tt5i2Ms7rw6hB60mu14PZ1pGlY0
U9CFfYg9NSPqRrgkirlETI+l7rfvVHRxqgtMQSLE6uI1Nxw+6ubMRgB2uk92LQzv
4F3H6v/5IBGqDRA5jr7a
=Pkzu
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl updates from Linus Walleij:
"Bulk pin control changes for the v4.10 kernel cycle:
No core changes this time. Mainly gradual improvement and
feature growth in the drivers.
New drivers:
- New driver for TI DA850/OMAP-L138/AM18XX pinconf
- The SX150x was moved over from the GPIO subsystem and reimagined as
a pin control driver with GPIO support in a joint effort by three
independent users of this hardware. The result was amazingly good!
- New subdriver for the Oxnas OX820
Improvements:
- The sunxi driver now supports the generic pin control bindings
rather than the sunxi-specific. Add debouncing support to the
driver.
- Simplifications in pinctrl-single adding a generic parser.
- Two downstream fixes and move the Raspberry Pi BCM2835 over to use
the generic GPIOLIB_IRQCHIP"
* tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (92 commits)
pinctrl: sx150x: use new nested IRQ infrastructure
pinctrl: sx150x: handle missing 'advanced' reg in sx1504 and sx1505
pinctrl: sx150x: rename 'reg_advance' to 'reg_advanced'
pinctrl: sx150x: access the correct bits in the 4-bit regs of sx150[147]
pinctrl: mt8173: set GPIO16 to usb iddig mode
pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP
pinctrl: New driver for TI DA850/OMAP-L138/AM18XX pinconf
devicetree: bindings: pinctrl: Add binding for ti,da850-pupd
Documentation: pinctrl: palmas: Add ti,palmas-powerhold-override property definition
pinctrl: intel: set default handler to be handle_bad_irq()
pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
pinctrl: sx150x: sort chips by part number
pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
pinctrl: imx: fix imx_pinctrl_desc initialization
pinctrl: sx150x: support setting multiple pins at once
pinctrl: sx150x: various spelling fixes and some white-space cleanup
pinctrl: mediatek: use builtin_platform_driver
pinctrl: stm32: use builtin_platform_driver
pinctrl: sunxi: Testing the wrong variable
pinctrl: nomadik: split up and comments MC0 pins
...
Pull rockchip clk driver updates from Heiko Stuebner:
A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.
* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add clock controller for rk1108
dt-bindings: add documentation for rk1108 cru
clk: rockchip: add dt-binding header for rk1108
clk: rockchip: fix copy-paste error in rk3399 testclk
clk: rockchip: validity should be checked prior to cpu clock rate change
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYNj8LEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYE3oggA
j0b99/r3uGOavo9nun2yJTqq/bKhjAAupNhrEJtjKP9gdbR/1HOkjzRX/1g9ID36
b5cMpOePpRN9xCg0IyK4/+0jgXJ1r41Fp1yEI51Z57jlo0WMzP10/E8hGwNQgW7Q
QSAPrTZbwLcrDjq7cOHrF8WvuMnA+6ye77IcDFJ0ZjtU7PYwfO63VTIJ/37Ph3FE
wlDb0YH57nrn13qUlK8UDJJysl1v2H8NP48/5qEfgF/swbyt6VKkaL2Q+Ua2aDys
AaH2oTRUPBSPqqXj78OKrWfHB8U5WWfn7PvDYxyjYcnOnasvE7kEBlmw4P955QDM
XzEEXkiEcQFMLoEiWim5Xw==
=2VYn
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:
A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
ARM: dts: rockchip: add rockchip RK1108 Evaluation board
ARM: dts: rockchip: add basic support for RK1108 SOC
clk: rockchip: add dt-binding header for rk1108
dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
ARM: dts: rockchip: fix TSADC reset node for rk3066a
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9VyAAoJEIfQlpxEBwcEK48QAKj7Z2kedtsVvlMm86SIrI+U
g6diaTaeEnH2v+ClUShRg65wtTrwHaBEQFnimTtfPIK+8jOZnAOIWBcO0vdZBEkb
2cibGKN9SWXubUBjr5BdAhWXjzLvuryldi19Qr2Q3XYXSUOKI+ba+PL0rfFBiL8o
5CzkqJucr6xUCRI2sbVxmEOBrJDMs2iygSQvhDiUWTg/2aZWckLQ+e0W7wX5++sM
t0wVkTi0ba7X+pUshQa2qiBVYess6RTdsLYwjdPqIZ4O5zMBFC8kMqjVP4uZuqUz
ytg+MWOUU3/+vTUH+UOB75iV6NFfLMpxn0GGucivwBjKhaIefUEHfjpqHipCgarC
MJ899MQsA97srBWmW56td9yQvB7/ce3NgzqqV6sUM7fvkxL00c6LiWE2Uuuo3x18
L24u6hiZA0qsnX5aLqw0hcibZVlKDY3p5IE+Y85fBsR0y5OCx9a39rPWA/RRQ3pA
U86gnt1jyjqNcjk6Z839Y0PutLb9wt48C+hDrRvBEjM5uWCCJbO6AZkoD0IT5H50
fHZBir3V5+UHu+6MpUrym4AKvAoYJ6wc6Rpx7b3a5uS3Z/n4hugBFOguRMLrAvEc
/Td6/aiLJq9uruaQR7mehlRDvSsMr1vr7ji8FHOIs5cX17d03A5qTLQWUFO+St7b
sgb9D1Orm2nXN0RsebKq
=4GFQ
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
* tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux: (29 commits)
ARM: bcm2835: Add names for the RPi Zero GPIO lines
ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
ARM: dts: enable GPIO-b for Broadcom NSP
ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
ARM: dts: Add node for Broadcom OTP controller driver
ARM: dts: Enable interrupt support for cygnus crmu gpio driver
ARM: dts: Enable Broadcom iProc mailbox controller
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM: dts: cygnus: fix naming of pinctrl node
ARM: BCM53573: Specify PMU and its ILP clock in the DT
ARM: BCM5301X: Add DT for Luxul XWR-3100
ARM: BCM5301X: Add DT for Luxul XAP-1510
ARM: BCM5301X: Specify USB 3.0 PHY in DT
ARM: BCM5301X: Enable UART on Netgear R8000
ARM: BCM5301X: Add separated DTS include file for BCM47094
ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
...
* Add support for the r8a7745 SoC to rcar-sysc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNfAfAAoJENfPZGlqN0++t14P/RukycPu2VgJ+F3G+OJoD2WS
ltEYrhhZxIL9cjyLmiA7Mj7Ig9dMtzmiBC0W3HY5zvZN2OiOrzmNykfFdu9UN8rX
iMZ6lDrq7o+Qsm1Q4Ab2miatqOqM7JPSacJPixLZFpvs6T79CCRMYaEeIB8AYD3O
ij/tRDtxdvfY97iy5la9XvtA/63EmP6DZ2SxfqPXd6W0GaBg+QKBOLlcCR0yDrKh
NosHdbiAbMapBSPbsnbhKLebpnPw159iu7VA73JbsrsFZ9IDRkwoA+wcgEEWnF8C
b9S31TAglhL04AysUowlHjhEOU2hWPcF8rm3lisDghoUC6Rb/3gCPII+KnU6d5Z4
QNCbY6IlWqya9wR3kavHmJHOowGt/LqrmLCnJSoTTbKgo6xPxN3kis6oRo2sY9w1
KUJWgt9vfQ/H6ik2epkMg7sQbkBcsONUDUgVhFyaAqTKEgeIz5OggfNsYkQYYT37
qlQkLgKweKYJmmr/ilCeVdmkdhPegII8aiYWdwb8N2cUY4I0nyUwnE+v9cdPRhxr
LpONUZV+GtCz8O/Y2XtjxwhYoYUtHbUzSax+aw4qtBBmdyKcaQ1VIyn27gfofmht
Q3itzk/eGp0GgnsadknYK9eOvWWjPf07/jvYgSVfL6rWGR+4/vcEht/kU+O9dnpP
HMZ6/PrbmYoxWkY49sH7
=pOb+
-----END PGP SIGNATURE-----
Merge tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman:
* Add support for the r8a7745 SoC to rcar-sysc
* tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A7745 support
ARM: shmobile: r8a7745: add power domain index macros
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Yegor Yefremov <yegorslists@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).
Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyVYExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6F0
bw//aunzLT9M38+PMRBYDhgY/ype3juarSMmDWT/25EpfJ6Eg862UYwFxpRwOi/z
t5pTXfA6Ndwao6HhQp5UmqRAdZd2V0UcxJoJ+9vooAUutyJTkk4cd9tW1JBcTsyw
LvqMplF6GXtDM/Qa2GGV+4N3zlastQGuv62ir9xHOBHs4MJAwcbr80N18k+WzuSE
3OGRIjdsAReWVgcj+SL6XPKrF6PlKCWAe+nODmnnY8QkCb/icI1ryJtYEgT0PSkY
Xw90udqaIuR80ZVRtgN3f3fQ6QBi7GTohFtDl05snBjPETF1aKFUX6w2JgUEXXdf
+/eewfSy468SrkbppX2MbPxqDtEPLIjbjvNL/q/DdOXxjEnLnavn1BcFTvyiJ5Uo
1u4B6uX+gW+xq8546XNNuCwmZ6zkDsRw3ksSWz3sMdpOtC72NAQ/YtAYu0+QUyUU
vptXGK9LMoVzYtreayO37ql+MP8EFDYqsAIPLZzQ4PPCiZote0HN35IlVWZt+Koq
jcMnU6EDZMA2mHINOLIzSbf39hw5zV6Skr0DW3PtPosf4vU488LHsRF5Fr11JBGi
YAh/T8ZiEnv0qeBNk4irr3JEUuXCVDgxqwQB/FkGL/mKPV08djji3tMTl6fNetMk
pH3fQB8yclKn3DRAIWSMrDDOGspOKSSmeu2/K4abIB6Po/o=
=9jQK
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
firmware: Add Tegra IVC and BPMP support
IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).
Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.
* tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyMbExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6El
gw/9FfJG4Ze7thnBHHVhDDuZaVF6U9gIKkEHfTKkUlU8fkOtF+xnTBCK3LRkHEsk
X0zyQlKKa/lzUGB52Fsi9jpVjt1WXvyuVOgCaQ+Zg9GXCmfXxOrNquAIH9sLhHSk
SpBsVHDsCk5UT4pINJrmdpGN2nSdQ4PvsRZM8wRkRs39C7+nf6wSHMrjURCt/DLT
Cub94gLcFiLddmO+c1OUShUjnOcy7yBIWn/EycxrKOqMDxzY9JK2Q0n8Cc3f1UVN
P5WYgjvLss5pGWZOBvPwefMVXru7BFBh1jOceabueD3DjNEP8nWb2/WQbXMUDVzq
QQ/q/4MIEmQMc8B8Z0brEmpIMn870Y3IPDaUmG4F6soW9yRL1gyA9PiF4YlcTe53
b0l0Y4/aehgHqCz1c9FulZW+qBe746fND/CNzTER7QfUe5CNotAtRUWG99v/8gGF
gtVmwTVnC5jn4ytUbLHEM4JtghKUuoIHqAWhY7KdwTDOm70TLmdHmOTVKN0+Ej3V
IgFCo+WIzleoHyK8GiUifOZSnLIJuctDznIUMnw2OmBlslvcdE90XbSQ00hlYC3N
Z9N2X6747OhGZF6viHWdWOtFfH+LpRj4S0LIaoRkvU5GRUi0fOjuTIXfBhlPe+11
wZ/AZAav1CHfaJk66H7Vq2rmRxdwe56t9fzy/xJM7ja+9m0=
=Gojp
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
mailbox: Add Tegra HSP driver
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
dt-bindings: mailbox: Add Tegra HSP binding
soc/tegra: Add Tegra186 support
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1YKERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6Vzd9AQ
ANr+2RtDJw9vVf8SIhzwaZBCYJ9qifO1nUqTxGYDKVFYwkemrbYWQF9UnT7U+L4q
DaVh4+5TJMB3EZz7lVHv28NJ3+dU4aFuRPGb/sOy5aAWxrVKJ361BmEcEiWDFuuM
SxdqxucShKNmU848ehG1J6W5P1ESsBbYlSy7s1HRQ3n6Q9C1cu9z5RpoT5gU5/aR
DQy0Wv9k+g8vzW/z5ovaqBTvtmDvROOUYE1Cbjfe2kLSmBgRTiyMBNSEPGAuRxq+
e+ASMStTzmWotXTiLANa2RDz/xTaiKNzdG2YyUscKhhAeN9di23HcGlwk2JQszC6
CtI/Pl0vsky647B9jwJdrjXD2i6zqrqVau6wR/Gm7zufiejSFnDONft7byD2EYlc
o06XUHA+vl4UdGCS3Ik8pvDuclpqTNGHuAPumMovv9Q8mBlMdfyUxMWt4ZlZBpgl
1oz4+ZNkDPl6ZMqc/RSe+PxT+iT55tTs6BIPSJ5+ooFunx2SzOsMPO9r785w54yp
eP0scopmek8fpsFOWevJh1lyUbXB4o9t0joaxsPyDQd2zYvsomds+Lu7r0Bp8ocY
ekCnU2fizKI8uo1WYJRhBwqk+p9qbAWOXQtLWXCNuuejxZya2iUwO900k/0tqxVt
Yy5LQ+nuv7FKb0jVgptXYlWglOg1PUDSfpq4Zq/i8Awk
=GYpd
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.10 merge window:
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: Add minimal support for motorola droid 4 xt894
ARM: dts: Add support for dra718-evm
ARM: dts: dra72: Add separate dtsi for tps65917
ARM: dts: dra72-evm: Fix modelling of regulators
ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
ARM: dts: am335x-baltos: don't reset gpio3 block
ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
ARM: dts: am4372: add DMA properties for tscadc
ARM: dts: am33xx: add DMA properties for tscadc
ARM: dts: omap5 uevm: add USR1 button
ARM: dts: omap5 uevm: add LEDs
ARM: dts: omap5 uevm: add EEPROM
ARM: dts: am335x: Add the power button interrupt
ARM: dts: am335x: Add the charger interrupt
dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
ARM: dts: am335x: Support the PMIC interrupt
ARM: dts: tps65217: Add the power button device
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
-----BEGIN PGP SIGNATURE-----
iQJMBAABCAA2FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlgrXr8YHHBoaWxpcHAu
emFiZWxAZ21haWwuY29tAAoJEFDCiBxwnmDrP7UQAIVZfUCBUfc5PF6u/pWrUOtn
Eg7SWvo1TYcJPJKoICwlRwKXmzLVfmivCsxW8my5Ddb66JQ5hMkoqsXALQl0sAZK
U2xXiy76z+EsL9tvvJ2b9Yqx3BIbzPkZyv419RWMVldqUtdbtHe70xLjF7DVfaTs
f9BTh0OAN55yWhYS7HQDQKm2bvUe3jy0XDzXlbPXgdy/roAReBFSFO4r80cbbAfv
DZwhrzmGSAGF0fE/TQA65wkkuZMM/rE3cjOjieVC4ZaeX7OQ+eqIMwph25uHCEnS
61g1J8GcwKvtP1iXAg5VdLAW2TTGTHztBR8UchrxZfySnKWR0rGee3LkQX8LVfih
mVI2jtzpq6fGYSask9B/fGnObfjWF0kHcgy525kdcNbo8HVZ0vdgZI/yoCh3ZViT
RHpuXk5cHYM6t7aNGOBvVvdKOL3wtuFUrJKYEpOL3BB//SLZXxCDCawMt7H2XHX5
3EbLfKikQQbMNs8XzeSfTOQi9ITcdwnLdTqjBunAbf0aMiF+SOtDS/yb6BsG7zjv
muz4LUtcMq5YfXnZbB11ngz+DSN/g7MHIjl9MXG8kMO9JsVb1R9VtmbxNQ87EU92
oKGy4ix0vSIRl7/gmmFZt4iV8RQOvffkB4iIkOXlWXdnsUrqIj3V/YwEr+8leoWk
MHr75XggJOUH9VaMUP/2
=e7kp
-----END PGP SIGNATURE-----
Merge tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
reset: allow using reset_control_reset with shared reset
reset: lpc18xx: make it explicitly non-modular
reset: zynq: make it explicitly non-modular
reset: sunxi: make it explicitly non-modular
reset: socfpga: make it explicitly non-modular
reset: berlin: make it explicitly non-modular
dt-bindings: reset: oxnas: Update for OX820
dt-bindings: reset: oxnas: Add include file with reset indexes
reset: oxnas: Add OX820 support
reset: sti: softreset: Remove obsolete platforms from dt binding doc.
reset: sti: Remove STiH415/6 reset support
Signed-off-by: Olof Johansson <olof@lixom.net>
The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).
The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJYJdcrAAoJELQ5Ylss8dNDoJcP/2q1LuStbojWMWxFKexQBCIk
8VEPzY8fyEckshbmgnz36qqp2MnecTLjb1ETesFIEGZWbEBnoAJC9hyIg6fFVZQi
mFZC8/0I7uvaFZHa+a3fQZb3tCmLMcWbAaGvA0p28kNRKnRhTMVHhLa7Z0WmMrG+
lQLlBBTP/xHErOakFJagkFIWYmmmMReS7x+X/tnVPienxkwODjpLYJQLL1wVmoqV
lpSj/nSRRDg8CeeG8/x+Odtr77L56glDMwwieXVpBe2sd+CpRk3QSTTcuYLkUp46
JBBKrr7TLLD6KEw6FgPjvjWDR3TH7S2wkbZVJN4B+8tmdEhpQhnle2MpJ6TYLKQb
ENwZ9JP70UD8o6mWb5e/g9R82WxUq1KDpdlU71OeBsnqfJRn1sge8bsO6+qs4+6Z
JapDW+Zwsewp9VZS12k4VdsCsYR0MZgX6XXj/NOOseJOMUXBFAoHj7vaC5Gj0UIT
VFKndrzWjIaVbaLHA/2KyVvOpJsEVTwSURyEko6XnTRLg+E85SSx+r6Bp3rlSlCV
Javet8M9YTLhPa1IeFMvf/1V4C4poX5tE4tvCiSZC1Wvxto5FSEgeGarq59Pgyi3
UWnxao8FHBHi3NU8khTI+rnIYtw5WxkEpqU5UUTYMUwsQ3x83VnU0WzpCSKQSNdD
Od24wmc/rrNKeU098abr
=wFjD
-----END PGP SIGNATURE-----
Merge tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: mt2701: Use real clock for UARTs
arm: dts: mt2701: Add clock controller device nodes
arm64: dts: mt8173: Fix auxadc node
soc: mediatek: Add MT2701 power dt-bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
* Fixup QCOM SCM to use devm_reset_controller_register
* Add QCOM pinctrl to Qualcomm MAINTAINERS entry
* Add PM8994 regulator definitions
* Add stub for WCNSS_CTRL API
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYJ/oEAAoJEFKiBbHx2RXVU1gP/R7GzHttdlGHoq0A84UnI9FI
OANdzjhcelwq2N5M2AiFEnCuB5jFomSmQqUXaK6ehzJktGGu6ZVM8jtg7RIatEVn
4lnM79qoDNvbnv/O4ILZ8U/PPsTcFyIQiKKpmCLEoSoMpZMYWaUTWlWQ1swmqnI/
o7HPUQykrkZyg7YmFxBiLEs/PQNMcje9aWOMzmk2ErDofXCBqXrB6xdKWqjMGvlP
qNAWb6VDB6ehQ/b9V7Vew5JM2Nx3x2C/VAMff12MA102GN5eMTeM42uYZM6ifeyU
ugfG0QVR0rdo7xaeBAyVjumOC5YETFH7+HF5UudhmsRkEJPx2g0SgEVIYTbPQhaa
zrFm/wvoEGVGUECAH7FwAQmUjoq3HrSvDJt3Jivx9kW7DCcqcRHzrjnzBePb/YQW
5DKdcYHsz2dA+aslyFpZbQpVyYjeLzsCrIrM+qnqkmsm2gHpxSDb1wKfMvqvcnYD
RbEk4hFtF4aE33J2UxSOM7JE6qHvbeRJGsZnDQFawtq+lANVor3oiTJHUyQDRzz9
QveZnCRHREK2fJY68+gvfi5hL8BU6ojIQcf5KZXntJrUXDBBl/qS5wkc+qrBvjTT
5WvezqmmA27rBHyPuPqfI210ZzM5jNtVRkdB29TKUbUZFfOdZUIEL52bDL+hG9hT
U0gaKLfv7guaWxYCiWMn
=bw/l
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.10
* Fixup QCOM SCM to use devm_reset_controller_register
* Add QCOM pinctrl to Qualcomm MAINTAINERS entry
* Add PM8994 regulator definitions
* Add stub for WCNSS_CTRL API
* tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Use devm_reset_controller_register()
MAINTAINERS: add drivers/pinctrl/qcom to ARM/QUALCOMM SUPPORT
pinctrl: pm8994: add pad voltage regulator defines
soc: qcom: wcnss_ctrl: Stub wcnss_ctrl API
Signed-off-by: Olof Johansson <olof@lixom.net>
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYJzNfEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYGsQQf/
WWYA4/oR4pT8HMns5coctc2zOyNU8KYmaeRl7TViUna+HA6/m2SGMqomTFV2AK0v
Ha3M6A35dDUGJNmAbEB5oolGOwHh82gZKYxYIQiNX+zCxeb5JxKCXWSqAjC9Ndwu
h600H1K/Qb26OzaVE/ICtlveduN+9BWrlzNseHsm99Z93FNsRLN0Z8s2Mn3jra6P
2Pf1sJkOPuh47i/Y/gTDVcFSf6Srb4SM/26fiZjrRa8LaaO/0I2Ku34ne9FygGzi
0GBHWh2SILM297MZMcrCDoJvTTqLT05tUrX1PDGmdunqP8vnsOAgvL9291G8d4sw
PbYE3onlyoxHmeOSffAe5g==
=AXPK
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
ARM: dts: rockchip: Add rk3066 MK808 board
devicetree: Add vendor prefix for Rikomagic
ARM: dts: rockchip: initialize rk3066 PLL clock rate
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
ARM: dts: rockchip: update compatible strings for Rockchip efuse
ARM: dts: rockchip: add rockchip PX3 Evaluation board
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The usual patches from us, but most notably the introduction of the A64
clocks unit.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYK30lAAoJEBx+YmzsjxAgNqMP/A0eKZkzCWP8QXePS5OVTzjn
Afnp85tpYGNrR5OTwJiM32IDAAU6mvb4813Z0MwQ5Wp+TM3APpiRzwnF3yjxeoGu
Jgzsu+NLgPtp/CozaGC46IlacGRR0amyLhryq8cVOaEKTed4b0t2Xjmk4JsRj7Gp
2ki5HVs4QSN63p4GixxhxVXgtYNoOBvm3qCgMbWa10j5DIDA2Wf//feudTeu98xa
gR9uz08xBVHXtIlyjXfY72l/qcjmcRZDdAXPTItZWR4MREuLMh3jlwM2oxMn1nKY
PLu7KfPail1ATv+6Pa5EJcAqvxCnW8mH8F0Tk/xqd/ZGuEwHW5rRPVl5NLO81iBe
K4Pfh8DrEtMBhS2C5nY3qOYQP6XcE4d2OSN8zNCM50ATdXMx+6gX1Dep6cz6waKj
Uo/v6GdkMhKgd1lBcH2CGJrWN7HQWb4wM/gctIa7T5uIQp/WBWEXACpOmRsD+4yt
c83qtys3FTO5Iuj1UVETHm8tAIC58xvQ+ZYs3Z7wusMJVRMH2KMi7MiNXF0zBHDL
cG/cQa9MrhIOJgd04TC8EDye/+Wn1rLFhMZWnbgcThpdKmd+MSPO/3ZeNKkCFJAh
F3CD+5oeQA9mctJBirpsPCrGnKwtkEZycB7jymkEPptvad+TLfGHdkwE0U2FhaxE
qN094vyPeAgceu9u9NyZ
=7+Az
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock changes from Maxime Ripard:
The usual patches from us, but most notably the introduction of the A64
clocks unit.
* tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
clk: sunxi-ng: Add A64 clocks
clk: sunxi-ng: Implement minimum for multipliers
clk: sunxi-ng: Add minimums for all the relevant structures and clocks
clk: sunxi-ng: Finish to convert to structures for arguments
clk: sunxi-ng: Remove the use of rational computations
clk: sunxi-ng: Rename the internal structures
clk: sunxi: mod0: improve function-level documentation
- A patch series to fix the long standing issue with glitchy parent
mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
is sourced from ldb_di_clk.
- A patch to add imx6ull clock support on top of imx6ul clock driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKni2AAoJEFBXWFqHsHzOu+UIAKpiVKqacJYxD1wEJDh9Mtq2
o9U10aGY6yl3ZEa5Ik8OTqg2Aa6ZT5kaV8h9i5uv7XIGqCSM6SUcWweF0KlRyJP4
7bjz9rcir2/zXys+dVuRodUiF8uowoFxgw7wAHwHfzs1oA7ihQaUB4v6vBiNbADq
zheCn2AqDWhIKAOFkLcyEid2IyIz0S/tlyzfElBmukSons+0zTrJ+e9QePzcuRZO
TnhZAxc/FQwcPZ/a2kiwiOOfQXWQld5pIeIp1YHWD4+L4m0Yxb/WK1yaocTxox2O
Ek8BPlkpNYdic8g3DRlwZGCHe5UaESSEQ3pyXlgYAdIOA2i+0tlnnCVCW0gNvQc=
=DJo7
-----END PGP SIGNATURE-----
Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
Pull i.MX clock updates from Shawn Guo:
- A patch series to fix the long standing issue with glitchy parent
mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
is sourced from ldb_di_clk.
- A patch to add imx6ull clock support on top of imx6ul clock driver.
* tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx: clk-imx6ul: add clk support for imx6ull
clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK
clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf
Add the dt-bindings header for the rk1108, that gets shared
between the clock controller and the clock references in the dts.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
with one another. A set of hardware synchronization primitives for
interprocessor communication (IPC) is provided. IPC protocols can use
use these hardware synchronization primitives when operating between
processors in an AMP configuration.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.
As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYJy9BEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYEZMwf/
XPnSVfSOSXSR3A6JOc7emX5vXVcXWq3xkt98l85qhiJO8yQg+vwFk2Ur7Q22cwJI
ycg6K1EAokKt7/ZE48XZ0JYXQknxxSnO7ZU0MTVQVtQB7+oWr79VY+o+WylgsSZ7
LApU2lGniYXJOnQBTfNl8Zqyrg+M+q6zTW9HwK47TH51xjUiY9K+/nyNlAuEqBWQ
TR8EuOQGxIQWHzJ7HFxCO4DNGEszrRkQMOcDsp2b5rxKTF3+waQne6OhX95JZpX5
PI12A1RC8+DNvYRZlhAnrmKHDycu6QYe18ZQADs5FPihMoxK4Eh/eXzZIIgXBkXd
aOc4ljF03ry8mWyKtENVCg==
=2Wr8
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull Rockchip clk driver updates from Heiko Stuebner:
PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.
As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.
* tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused
clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
clk: rockchip: add 400MHz to rk3066 clock rates table
clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399
clk: rockchip: Use clock ids for cpu and peri clocks on rk3066
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
clk: rockchip: add 533.25MHz to rk3399 clock rates table
imx6ull is the derived SoC from imx6ul
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Pan Wen <wenpan@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.
The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.
This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@codeaurora.org: Remove useless braces for single line if]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.
[1] https://patchwork.kernel.org/patch/9157571/
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
TPS65217 supports three interrupt sources. This patch enables assigning
each IRQ number in the charger and power button node. Then corresponding
IRQ will be requested by each driver.
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for Cirrus Logic CS42L42 codec. SoundWire support
is not enabled. Features support for I2C control and I2S audio.
Signed-off-by: James Schulman <james.schulman@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index. The data comes from Table 7.2b in revision 1.00 of the
RZ/G Series User's Manual.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add support for the Amlogic Meson GXL SoC, this is a partially complete
definition only based on the Amlogic Vendor tree.
This definition differs a lot from the GXBB and needs a separate entry.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the A64 CCU clocks set.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support output level setting (high or low)
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add power dt-bindings for MT2701.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds defines for internal voltage regulators used
to switch voltage levels on gpio/mpp pads.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In order to support the Oxford Semiconductor Gate clocks, add a
dedicated dt-binding include file for gate indexes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-3-narmstrong@baylibre.com
In order to prepare support for the Oxford Semiconductor OX820, add
a dt-bindings include file used by the ox810se dtsi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-2-narmstrong@baylibre.com
Add gpio pin index definition to make it easier to describe
GPIO in dts.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add bindings for ACLK_CPU, HCLK_CPU, PCLK_CPU, ACLK_PERI, HCLK_PERI, PCLK_PERI.
We need this to init it's rate at boot time.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add DT include file for Oxford Semiconductor OX810SE and OX820 reset
controller support.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Add macros usable by the device tree sources to reference R8A7743 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Edge-Rate cleanup include the following:
- Updated device tree bindings documentation for edge-rate
- The edge-rate is now specified as a "slowdown", meaning that it is now
being specified as positive values instead of negative (both
documentation and implementation wise).
- Only explicitly documented values for "vsc8531,vddmac" and
"vsc8531,edge-slowdown" are accepted by the device driver.
- Deleted include/dt-bindings/net/mscc-phy-vsc8531.h as it was not needed.
- Read/validate devicetree settings in probe instead of init
Signed-off-by: Allan W. Nielsen <allan.nielsen@microsemi.com>
Signed-off-by: Raju Lakkaraju <raju.lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull thermal managament updates from Zhang Rui:
- Enhance thermal "userspace" governor to export the reason when a
thermal event is triggered and delivered to user space. From Srinivas
Pandruvada
- Introduce a single TSENS thermal driver for the different versions of
the TSENS IP that exist, on different qcom msm/apq SoCs'. Support for
msm8916, msm8960, msm8974 and msm8996 families is also added. From
Rajendra Nayak
- Introduce hardware-tracked trip points support to the device tree
thermal sensor framework. The framework supports an arbitrary number
of trip points. Whenever the current temperature is changed, the trip
points immediately below and above the current temperature are found,
driver callback is invoked to program the hardware to get notified
when either of the two trip points are triggered. Hardware-tracked
trip points support for rockchip thermal driver is also added at the
same time. From Sascha Hauer, Caesar Wang
- Introduce a new thermal driver, which enables TMU (Thermal Monitor
Unit) on QorIQ platform. From Jia Hongtao
- Introduce a new thermal driver for Maxim MAX77620. From Laxman
Dewangan
- Introduce a new thermal driver for Intel platforms using WhiskeyCove
PMIC. From Bin Gao
- Add mt2701 chip support to MTK thermal driver. From Dawei Chien
- Enhance Tegra thermal driver to enable soctherm node and set
"critical", "hot" trips, for Tegra124, Tegra132, Tegra210. From Wei
Ni
- Add resume support for tango thermal driver. From Marc Gonzalez
- several small fixes and improvements for rockchip, qcom, imx, rcar,
mtk thermal drivers and thermal core code. From Caesar Wang, Keerthy,
Rocky Hao, Wei Yongjun, Peter Robinson, Bui Duc Phuc, Axel Lin, Hugh
Kang
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (48 commits)
thermal: int3403: Process trip change notification
thermal: int340x: New Interface to read trip and notify
thermal: user_space gov: Add additional information in uevent
thermal: Enhance thermal_zone_device_update for events
arm64: tegra: set hot trips for Tegra210
arm64: tegra: set critical trips for Tegra210
arm64: tegra: add soctherm node for Tegra210
arm64: tegra: set hot trips for Tegra132
arm64: tegra: set critical trips for Tegra132
arm64: tegra: use tegra132-soctherm for Tegra132
arm: tegra: set hot trips for Tegra124
arm: tegra: set critical trips for Tegra124
thermal: tegra: add hw-throttle for Tegra132
thermal: tegra: add hw-throttle function
of: Add bindings of hw throttle for Tegra soctherm
thermal: mtk_thermal: Check return value of devm_thermal_zone_of_sensor_register
thermal: Add Mediatek thermal driver for mt2701.
dt-bindings: thermal: Add binding document for Mediatek thermal controller
thermal: max77620: Add thermal driver for reporting junction temp
thermal: max77620: Add DT binding doc for thermal driver
...
Pull drm updates from Dave Airlie:
"Core:
- Fence destaging work
- DRIVER_LEGACY to split off legacy drm drivers
- drm_mm refactoring
- Splitting drm_crtc.c into chunks and documenting better
- Display info fixes
- rbtree support for prime buffer lookup
- Simple VGA DAC driver
Panel:
- Add Nexus 7 panel
- More simple panels
i915:
- Refactoring GEM naming
- Refactored vma/active tracking
- Lockless request lookups
- Better stolen memory support
- FBC fixes
- SKL watermark fixes
- VGPU improvements
- dma-buf fencing support
- Better DP dongle support
amdgpu:
- Powerplay for Iceland asics
- Improved GPU reset support
- UVD/VEC powergating support for CZ/ST
- Preinitialised VRAM buffer support
- Virtual display support
- Initial SI support
- GTT rework
- PCI shutdown callback support
- HPD IRQ storm fixes
amdkfd:
- bugfixes
tilcdc:
- Atomic modesetting support
mediatek:
- AAL + GAMMA engine support
- Hook up gamma LUT
- Temporal dithering support
imx:
- Pixel clock from devicetree
- drm bridge support for LVDS bridges
- active plane reconfiguration
- VDIC deinterlacer support
- Frame synchronisation unit support
- Color space conversion support
analogix:
- PSR support
- Better panel on/off support
rockchip:
- rk3399 vop/crtc support
- PSR support
vc4:
- Interlaced vblank timing
- 3D rendering CPU overhead reduction
- HDMI output fixes
tda998x:
- HDMI audio ASoC support
sunxi:
- Allwinner A33 support
- better TCON support
msm:
- DT binding cleanups
- Explicit fence-fd support
sti:
- remove sti415/416 support
etnaviv:
- MMUv2 refactoring
- GC3000 support
exynos:
- Refactoring HDMI DCC/PHY
- G2D pm regression fix
- Page fault issues with wait for vblank
There is no nouveau work in this tree, as Ben didn't get a pull
request in, and he was fighting moving to atomic and adding mst
support, so maybe best it waits for a cycle"
* tag 'drm-for-v4.9' of git://people.freedesktop.org/~airlied/linux: (1412 commits)
drm/crtc: constify drm_crtc_index parameter
drm/i915: Fix conflict resolution from backmerge of v4.8-rc8 to drm-next
drm/i915/guc: Unwind GuC workqueue reservation if request construction fails
drm/i915: Reset the breadcrumbs IRQ more carefully
drm/i915: Force relocations via cpu if we run out of idle aperture
drm/i915: Distinguish last emitted request from last submitted request
drm/i915: Allow DP to work w/o EDID
drm/i915: Move long hpd handling into the hotplug work
drm/i915/execlists: Reinitialise context image after GPU hang
drm/i915: Use correct index for backtracking HUNG semaphores
drm/i915: Unalias obj->phys_handle and obj->userptr
drm/i915: Just clear the mmiodebug before a register access
drm/i915/gen9: only add the planes actually affected by ddb changes
drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED
drm/i915/bxt: Fix HDMI DPLL configuration
drm/i915/gen9: fix the watermark res_blocks value
drm/i915/gen9: fix plane_blocks_per_line on watermarks calculations
drm/i915/gen9: minimum scanlines for Y tile is not always 4
drm/i915/gen9: fix the WaWmMemoryReadLatency implementation
drm/i915/kbl: KBL also needs to run the SAGV code
...
Including:
* Support for interrupt virtualization in the AMD IOMMU driver.
These patches were shared with the KVM tree and are already
merged through that tree.
* Generic DT-binding support for the ARM-SMMU driver. With this
the driver now makes use of the generic DMA-API code. This
also required some changes outside of the IOMMU code, but
these are acked by the respective maintainers.
* More cleanups and fixes all over the place.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJX/PmUAAoJECvwRC2XARrjyloP/1hymxXC2yXZ4EIBTHSO5X+c
jSJaGTIbQAdQDpllscSNJ0Au43L3vGtJcHo4JqwEERNlwLsU82LH7QJhq+q1La/b
5cPaY5gI3E++qxQt8umuZJAIUQthFYrfGoS5lJc5t5r/d8iVsLWbW4VkR19/1o7A
4/Uz7ETmi9VVy8Hkvumx+PQ0VHJet381KB7ud9LU5Spim0En2AAGwZXLMkmxXd2W
uDQ+O1rlDVc2/ka3+GmfZEml5EASWRqS/MTNoU/ZbQGYWKCWygXbuiqt6gLudWjx
dCR1Knh68b0gN6k/QAj8XY/1gkfmZ3YkfS0AHIMLYTFRT51BuxOrkXrBdkYnWEBv
UirmaiV87SlR1j83yb3ZmjpBPvd2sGWYFDqY1P0riLutjGUS6zycWWs13olvbfbz
SFrH7PT7JPQGYprI1oVn4ihszjN1NZ4+Gj7QBhyFW6FtvqTzmaFVsMOlDIeg1FwR
k8cOzov4NG33Bp4IpsHK8e0/qV6K3oJOiOQgCyQp9kPKK+UWv9v9+HaEA7npJuRV
c+lTE6j3G4LjEoVybkqm8TiPKxTMVNjUjgA3kwB2yNkCQT7hTCNYIAFrtfCYjYdo
B1dnFE7feVqtoimnu2qvkVs59hWlF7Hc3RRHoBxMmO8DLwl9n2OcmoQIeCTsviss
i9aNwC9bzBs+Hd3X/psB
=1hFE
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
- support for interrupt virtualization in the AMD IOMMU driver. These
patches were shared with the KVM tree and are already merged through
that tree.
- generic DT-binding support for the ARM-SMMU driver. With this the
driver now makes use of the generic DMA-API code. This also required
some changes outside of the IOMMU code, but these are acked by the
respective maintainers.
- more cleanups and fixes all over the place.
* tag 'iommu-updates-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (40 commits)
iommu/amd: No need to wait iommu completion if no dte irq entry change
iommu/amd: Free domain id when free a domain of struct dma_ops_domain
iommu/amd: Use standard bitmap operation to set bitmap
iommu/amd: Clean up the cmpxchg64 invocation
iommu/io-pgtable-arm: Check for v7s-incapable systems
iommu/dma: Avoid PCI host bridge windows
iommu/dma: Add support for mapping MSIs
iommu/arm-smmu: Set domain geometry
iommu/arm-smmu: Wire up generic configuration support
Docs: dt: document ARM SMMU generic binding usage
iommu/arm-smmu: Convert to iommu_fwspec
iommu/arm-smmu: Intelligent SMR allocation
iommu/arm-smmu: Add a stream map entry iterator
iommu/arm-smmu: Streamline SMMU data lookups
iommu/arm-smmu: Refactor mmu-masters handling
iommu/arm-smmu: Keep track of S2CR state
iommu/arm-smmu: Consolidate stream map entry state
iommu/arm-smmu: Handle stream IDs more dynamically
iommu/arm-smmu: Set PRIVCFG in stage 1 STEs
iommu/arm-smmu: Support non-PCI devices with SMMUv3
...
These updates have been kept in a separate branch mostly because
they rely on updates to the respective clk drivers to keep the
shared header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been
merged for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and
usb driver changes are required and included here, and also
the clk tree changes.
- The Allwinner platforms have seen a large-scale change to their
clk drivers and the dts file updates must come after that.
This includes the newly added Nextthing GR8 platform, which is
derived from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't
added until just before the merge window
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAV/gzeGCrR//JCVInAQKVhw/5AS5R2S7m7VTlWMvGjvH9ITudYhiAGJP1
z5nP5SwJsfmSjfvw0kSxGUmsNS3rHutsPMz65EesKqFuC3LPZiqMUqrzxt9iqqJx
I+XdAxDTnOE1RBZFtB9dL+qLzHQ87pMo6R9dfs32sxb3QuCQBYhcFyLmQDuZuHH0
yeDi3ARFvgxx/qoRUA7cnSlY5RLNzM44y+Ik/ZcVr4ReqYBC2g5mGi5htoiNSLWR
nwWR+5hNLAp44OZgkZfNsf6kB9brWDQh3PbnBjy6sKXSBoSVIfxTweh2DMJXbZ7l
1Ck+S7WyLMhGJp448TcuBykr/l9i3uqNh061XavjwP8CAjAdZ787XlnNSztc2pyh
dvbI/E76pLGb5ZoFdqlY2Syl63ZFN4K8mjZMSPYfYKf85EDIxe4MYwpbo7/pwzh3
8OlBwH6r4aUMw+QgE1nx8nsjaCoGDMFdgJeJJaWdriZ6Nst2n5gREk/mzbrAWkNG
ujChn/6hES9LuE21aCp1ipB7qnnyeRinfqz2acEFxMQxuPdjwKrdJqNsBaTWsapE
Z+b/BFP+LTdPfHCmMSVwfMrNbwsoY7+L4EXXL36lUgOwcDp0vCXA+PiiahYASewA
1LDQ3CURCEapdBhVU+06Kb4y5eWU7M7EqpOwpHgRJ92dVxgNxuCfcurvxzqPP1UP
3O4R7bfUTTg=
=OmAu
-----END PGP SIGNATURE-----
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"These updates have been kept in a separate branch mostly because they
rely on updates to the respective clk drivers to keep the shared
header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been merged
for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and usb
driver changes are required and included here, and also the clk
tree changes.
- The Allwinner platforms have seen a large-scale change to their clk
drivers and the dts file updates must come after that. This
includes the newly added Nextthing GR8 platform, which is derived
from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't added
until just before the merge window"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
ARM: dts: lpc32xx: add device node for IRAM on-chip memory
ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
ARM: dts: sun8i: add pinmux for UART1 at PG
dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
dts: sun8i-h3: add pinmux definitions for I2C0-2
dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
dts: sun8i-h3: add pinmux definitions for UART2-3
ARM: dts: sun9i: a80-optimus: Disable EHCI1
ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
...
These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably,
an ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets;
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E,
Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo
single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform;
Raspberry Pi Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file);
Armada 395 SoC platform and GP board
Armada 390 DB development board
- NXP i.MX: imx7s Warp7 reference board;
Gateworks Ventana GW553x single-board computer,
Technologic Systems TS-4900 and
Engicam IMX6UL GEA M6UL computer-on-module,
Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board;
Firefly RK3288 Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer
Conflicts: vendor-prefixes.txt has conflicting additions, keep all of
them in alphabetical order.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAV/g11mCrR//JCVInAQIWbw/9FOrBghI2bFqZkDwFE8E3QCpc9bIiETMx
FMdHV6FAo0D6Yp4EqlWjFI0u0Kn9l4FKz0SYWAigpfT6gfeI1THC2Kl31mslvb5U
v3QreXI4rKjZS/B1lYECee0os+fNvJcWKj3uFjb4VT1k7T6+MytjHGAQSzwxM66Q
0Lp5HjdFGDrOXoIUx2eEZkZlVXyQ2EFocMoAsj+s/MHnA8fn1tWW08633kjTsC6y
9Xj71joghlDKZjA56htaEQ+/6dYdxAHVlvkN7aL9di+2Sc2/ma6my70Zvs4zwtOv
uJDhcJhjwvf3QtDuOoGhTnFtQYQWaONaGUFyEwYyy2kIwiJy0afep4JCq2o+/CZM
VMvGXepJpVujE9mg+LwHPgaMYgBhswsJzwQ2ZESrMQcUZ624E18dG2/ei5zat4UN
5/NvzxEoDGmfQFQUpuoZuPqhwLRauXr7I+u4aliIdtSBGeaA2T1yFT4pVgNUOxBQ
0bMtE2QSUKyaF+xAHLTsV7yheDU0S+C7zVkLPwePK0V7vUFuBsdQiXEqXh/6MSq0
iYVPmKwNTIHK3qMiGtm8XDugjR8Pf0tCXRqIWJMlXs75rCAsKfFW4j4XYnlO4wMy
dP2fdoe0xA+zthR0hRHD5i8WCmISeUgtPAdFyTid1jZkMk1AzM0AqBUdAqTInvQ3
O4JSYcjBWoo=
=/gg/
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably, an
ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been
addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets,
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange Pi Lite,
Olimex A33-Olinuxino, and Nano Pi Neo single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform, Raspberry Pi
Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file),
Armada 395 SoC platform and GP board Armada 390 DB development
board
- NXP i.MX: imx7s Warp7 reference board, Gateworks Ventana GW553x
single-board computer, Technologic Systems TS-4900 and Engicam
IMX6UL GEA M6UL computer-on-module, Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board, Firefly RK3288
Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (390 commits)
ARM: dts: sony-nsz-gs7: add missing unit name to /memory node
ARM: dts: chromecast: add missing unit name to /memory node
ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node
ARM: dts: berlin2: Add missing unit name to /soc node
ARM: dts: berlin2cd: Add missing unit name to /soc node
ARM: dts: berlin2q: Add missing unit name to /soc node
ARM: dts: berlin2: Remove skeleton.dtsi inclusion
ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion
ARM: dts: berlin2q: Remove skeleton.dtsi inclusion
arm: dts: berlin2q: enable all wdt nodes unconditionally
arm: dts: berlin2: enable all wdt nodes unconditionally
ARM: dts: omap5-igep0050.dts: Use tabs for indentation
ARM: dts: Fix igepv5 power button GPIO direction
ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
ARM: dts: s3c64xx: Use macros for pinctrl configuration
ARM: dts: s3c2416: Use macros for pinctrl configuration
ARM: dts: s5pv210: Use macros for pinctrl configuration
ARM: dts: s3c64xx: Use common macros for pinctrl configuration
...
Driver updates for ARM SoCs, including a couple of newly added drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for the
EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAV/gaimCrR//JCVInAQJaOQ/6A++YfLVmdF4wxgcu/0ti28lA7SkQIGJV
UAsfCmqMEutbeDvnloVGmTV2K2NS7mzxdxsJGbVB7Oe/zdOFN+T9sf9hAlId01QA
oVkoagpofoxlyKoKJ/l+heuEEZMa0Ekk3XXRTGv/Ovymo7252o4tEdGu9c+gyaMJ
KqgixcrQRzxuWDgPpHUPUez2vY1iRMvvdcb0EmfiHcIgPOEJc6MIxulsqEIrkoMz
WYeGFIeqRJxnrur3QD8WnD+aZD6bV01wkFTkWXGWg4H87QfEESgVBu5A7TL+5sL8
1SlX/b7S5/ZJbrOiOS2IUyvbK7NiA/Q+NunHW2rMVnUWuEvJ9HAQB1kVSQH5LIYO
6OBokjcijm6m/j6O6fdDfvNd6PLsIEUqfWVws7O+uofMMqKPxqak4VBTRdFM+aeF
ZtK7mEbzteCX0bnC+XblZrseAlkIehYnP80CLDbtDTerTWP4gsjxGVt3U6MO0NzB
K0ACWZOclzrcFscNKrmP6uPCpfZriiPV/XMCEHcylA/X2iYsVmpqKzdLuNs5aeUr
uPzQbNWu9ygg/bDRXMYY2E3Kzjsc0eIOKEOPyhLaZdSo4e1FQxud6L2V2Vj0RLB/
iMA7/CyQZqn6Yzgs0VMZm/bnh+hIdHioGFl5K5j6Fcw9VZRkNmnEQJzX4VU5efGO
g1+5av0vFXg=
=GvTq
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
the EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
bus: qcom-ebi2: depend on HAS_IOMEM
pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
clk: mvebu: Add clk support for the orion5x SoC mv88f5181
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
clocksource: exynos_mct: Add the support for ARM64
perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
bus: qcom: add EBI2 driver
bus: qcom: add EBI2 device tree bindings
rtc: rtc-pm8xxx: Add support for pm8018 rtc
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
soc: qcom: smd: Reset rx tail rather than tx
memory: atmel-sdramc: fix a possible NULL dereference
reset: hi6220: allow to compile test driver on other architectures
reset: zynq: add driver Kconfig option
reset: sunxi: add driver Kconfig option
reset: stm32: add driver Kconfig option
reset: socfpga: add driver Kconfig option
...
- Add the MFD bindings doc to MAINTAINERS
- New Drivers
- X-Powers AC100 Audio CODEC and RTC
- TI LP873x PMIC
- Rockchip RK808 PMIC
- Samsung Exynos Low Power Audio
- New Device Support
- Add support for STMPE1600 variant to stmpe
- Add support for PM8018 PMIC to pm8921-core
- Add support for AXP806 PMIC in axp20x
- Add support for AXP209 GPIO in axp20x
- New Functionality
- Add support for Reset to all STMPE variants
- Add support for MKBP event support to cros_ec
- Add support for USB to intel_soc_pmic_bxtwc
- Add support for IRQs and Power Button to tps65217
- Fix-ups
- Clean-up defunct author emails; da9063, max14577
- Kconfig fixups; wm8350-i2c, as3722
- Constify; altera-a10sr, sm501
- Supply PCI IDs; intel-lpss-pci
- Improve clocking; qcom_rpm
- Fix IRQ probing; ucb1x00-core
- Ensure fault log is cleared; da9052
- Remove NO_IRQ check; ucb1x00-core
- Supply I2C properties; intel-lpss-acpi, intel-lpss-pci
- Non standard declaration; tps65217, max8997-irq
- Remove unused code; lp873x, db8500-prcmu, ab8500-debugfs,
cros_ec_spi
- Make non-modular; altera-a10sr, intel_msic, smsc-ece1099,
sun6i-prcm, twl-core,
- OF bindings; ac100, stmpe, qcom-pm8xxx, qcom-rpm, rk808,
axp20x, lp873x, exynos5433-lpass, act8945a,
aspeed-scu, twl6040, arizona
- Bug Fixes
- Release OF pointer; qcom_rpm
- Avoid double shifting in suspend/resume; 88pm80x
- Fix 'defined but not used' error; exynos-lpass
- Fix 'sleeping whilst attomic'; atmel-hlcdc
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJX9giOAAoJEFGvii+H/Hdh8aEP/iiHosBZsksZ4we8KAdoXkxi
x5nnJvS9+4b5yaasSiN8e2xs9YMOlHu1CNZDZ3RJZ+rLusdVeg5ju5p5WED83pvi
ltiPMhyqruM3d0rieTRHxeJFmmEf2exwKV3Y+5lo9586dFfJrmGp2AxScId4TtwP
CcsjwYRx/WvVfWrv1xWsjd9b1RDlWglt3dcVhdKAQbvPPOy5O4ymXNMFs0DuFyZ+
2A16sw7hdYenXSvAHlZzS5IqXP9JEeosu3O/mUUZKF3PO55t+KbQBGZiwXoal4gp
1dwrdBjlrZaHcDa5Ra9x+jQ2kxIkyUT44CXKAHa7llTfZQkZIgnv/fWUhB8C5JxU
iaqnN9rWQ2MNjt3Us/n1TSJH2kEnSNbzrQixE0n8yjIBsZePWlW2ZpWYRF7GPG2i
2pB8oNz/NdDkKWdosR3ArnseNOKVcC+GtD+mHk0aKMPghPq+gDIRrdM0CFyWeIZE
w/Cf+HHZPR0O1VuYZ9bHIhbgnEbz5xUADOtBAdppIBQiNEI/G9lJpG6Ft4FTQoPi
CIbnnB/wxxMaEl85rUPYGkxQniuUI5f0tMv3k2ZtAZMKcqn6iXtiIOuXceM2vUdy
ze1uddH4HuHLcrJT5x+J72XJL6RXzZKxOqd0b7BcXnvMVFJrWgleH1JQ2WqazAEW
il1u28IkFusm/BW/0dps
=Ja7p
-----END PGP SIGNATURE-----
Merge tag 'mfd-for-linus-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Core framework:
- Add the MFD bindings doc to MAINTAINERS
New drivers:
- X-Powers AC100 Audio CODEC and RTC
- TI LP873x PMIC
- Rockchip RK808 PMIC
- Samsung Exynos Low Power Audio
New device support:
- Add support for STMPE1600 variant to stmpe
- Add support for PM8018 PMIC to pm8921-core
- Add support for AXP806 PMIC in axp20x
- Add support for AXP209 GPIO in axp20x
New functionality:
- Add support for Reset to all STMPE variants
- Add support for MKBP event support to cros_ec
- Add support for USB to intel_soc_pmic_bxtwc
- Add support for IRQs and Power Button to tps65217
Fix-ups:
- Clean-up defunct author emails (da9063, max14577)
- Kconfig fixups (wm8350-i2c, as37220
- Constify (altera-a10sr, sm501)
- Supply PCI IDs (intel-lpss-pci)
- Improve clocking (qcom_rpm)
- Fix IRQ probing (ucb1x00-core)
- Ensure fault log is cleared (da9052)
- Remove NO_IRQ check (ucb1x00-core)
- Supply I2C properties (intel-lpss-acpi, intel-lpss-pci)
- Non standard declaration (tps65217, max8997-irq)
- Remove unused code (lp873x, db8500-prcmu, ab8500-debugfs,
cros_ec_spi)
- Make non-modular (altera-a10sr, intel_msic, smsc-ece1099,
sun6i-prcm, twl-core)
- OF bindings (ac100, stmpe, qcom-pm8xxx, qcom-rpm, rk808, axp20x,
lp873x, exynos5433-lpass, act8945a, aspeed-scu, twl6040, arizona)
Bugfixes:
- Release OF pointer (qcom_rpm)
- Avoid double shifting in suspend/resume (88pm80x)
- Fix 'defined but not used' error (exynos-lpass)
- Fix 'sleeping whilst attomic' (atmel-hlcdc)"
* tag 'mfd-for-linus-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (69 commits)
mfd: arizona: Handle probe deferral for reset GPIO
mfd: arizona: Remove arizona_of_get_named_gpio helper function
mfd: arizona: Add DT options for max_channels_clocked and PDM speaker config
mfd: twl6040: Register child device for twl6040-pdmclk
mfd: cros_ec_spi: Remove unused variable 'request'
mfd: omap-usb-host: Return value is not 'const int'
mfd: ab8500-debugfs: Remove 'weak' function suspend_test_wake_cause_interrupt_is_mine()
mfd: ab8500-debugfs: Remove ab8500_dump_all_banks_to_mem()
mfd: db8500-prcmu: Remove unused *prcmu_set_ddr_opp() calls
mfd: ab8500-debugfs: Prevent initialised field from being over-written
mfd: max8997-irq: 'inline' should be at the beginning of the declaration
mfd: rk808: Fix RK818_IRQ_DISCHG_ILIM initializer
mfd: tps65217: Fix nonstandard declaration
mfd: lp873x: Remove unused mutex lock from struct lp873x
mfd: atmel-hlcdc: Do not sleep in atomic context
mfd: exynos-lpass: Mark PM functions as __maybe_unused
mfd: intel-lpss: Add default I2C device properties for Apollo Lake
mfd: twl-core: Make it explicitly non-modular
mfd: sun6i-prcm: Make it explicitly non-modular
mfd: smsc-ece1099: Make it explicitly non-modular
...
Pull networking updates from David Miller:
1) BBR TCP congestion control, from Neal Cardwell, Yuchung Cheng and
co. at Google. https://lwn.net/Articles/701165/
2) Do TCP Small Queues for retransmits, from Eric Dumazet.
3) Support collect_md mode for all IPV4 and IPV6 tunnels, from Alexei
Starovoitov.
4) Allow cls_flower to classify packets in ip tunnels, from Amir Vadai.
5) Support DSA tagging in older mv88e6xxx switches, from Andrew Lunn.
6) Support GMAC protocol in iwlwifi mwm, from Ayala Beker.
7) Support ndo_poll_controller in mlx5, from Calvin Owens.
8) Move VRF processing to an output hook and allow l3mdev to be
loopback, from David Ahern.
9) Support SOCK_DESTROY for UDP sockets. Also from David Ahern.
10) Congestion control in RXRPC, from David Howells.
11) Support geneve RX offload in ixgbe, from Emil Tantilov.
12) When hitting pressure for new incoming TCP data SKBs, perform a
partial rathern than a full purge of the OFO queue (which could be
huge). From Eric Dumazet.
13) Convert XFRM state and policy lookups to RCU, from Florian Westphal.
14) Support RX network flow classification to igb, from Gangfeng Huang.
15) Hardware offloading of eBPF in nfp driver, from Jakub Kicinski.
16) New skbmod packet action, from Jamal Hadi Salim.
17) Remove some inefficiencies in snmp proc output, from Jia He.
18) Add FIB notifications to properly propagate route changes to
hardware which is doing forwarding offloading. From Jiri Pirko.
19) New dsa driver for qca8xxx chips, from John Crispin.
20) Implement RFC7559 ipv6 router solicitation backoff, from Maciej
Żenczykowski.
21) Add L3 mode to ipvlan, from Mahesh Bandewar.
22) Support 802.1ad in mlx4, from Moshe Shemesh.
23) Support hardware LRO in mediatek driver, from Nelson Chang.
24) Add TC offloading to mlx5, from Or Gerlitz.
25) Convert various drivers to ethtool ksettings interfaces, from
Philippe Reynes.
26) TX max rate limiting for cxgb4, from Rahul Lakkireddy.
27) NAPI support for ath10k, from Rajkumar Manoharan.
28) Support XDP in mlx5, from Rana Shahout and Saeed Mahameed.
29) UDP replicast support in TIPC, from Richard Alpe.
30) Per-queue statistics for qed driver, from Sudarsana Reddy Kalluru.
31) Support BQL in thunderx driver, from Sunil Goutham.
32) TSO support in alx driver, from Tobias Regnery.
33) Add stream parser engine and use it in kcm.
34) Support async DHCP replies in ipconfig module, from Uwe
Kleine-König.
35) DSA port fast aging for mv88e6xxx driver, from Vivien Didelot.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1715 commits)
mlxsw: switchx2: Fix misuse of hard_header_len
mlxsw: spectrum: Fix misuse of hard_header_len
net/faraday: Stop NCSI device on shutdown
net/ncsi: Introduce ncsi_stop_dev()
net/ncsi: Rework the channel monitoring
net/ncsi: Allow to extend NCSI request properties
net/ncsi: Rework request index allocation
net/ncsi: Don't probe on the reserved channel ID (0x1f)
net/ncsi: Introduce NCSI_RESERVED_CHANNEL
net/ncsi: Avoid unused-value build warning from ia64-linux-gcc
net: Add netdev all_adj_list refcnt propagation to fix panic
net: phy: Add Edge-rate driver for Microsemi PHYs.
vmxnet3: Wake queue from reset work
i40e: avoid NULL pointer dereference and recursive errors on early PCI error
qed: Add RoCE ll2 & GSI support
qed: Add support for memory registeration verbs
qed: Add support for QP verbs
qed: PD,PKEY and CQ verb support
qed: Add support for RoCE hw init
qede: Add qedr framework
...
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That price is an assortment of
interference problems like ringing on the line, signal overshoot and
undershoot, extended signal settling times, crosstalk noise, transmission
line reflections, false signal detection by the receiving device and
electromagnetic interference (EMI) -- all of which can negate the potential
gains designers are seeking when they try to increase system speeds through
the use of higher performance logic devices. The fact is, faster signaling
edge rates can cause a higher level of electrical noise or other type of
interference that can actually lead to slower line speeds and lower maximum
system frequencies. This parameter allow the board designers to change the
driving strange, and thereby change the EMI behavioral.
Edge-rate parameters (vddmac, edge-slowdown) get from Device Tree.
Tested on Beaglebone Black with VSC 8531 PHY.
Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Tegra132 use CCROC throttle registers to configure
pulse skiper, set these registers to enable throttle
function for Tegra132.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
The current clock tree only implements the minimal set of differences
between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
reality.
Apply the following fixes to match the RM:
- DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
GPU3D_CORE
- GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
- GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF
Cc: stable@vger.kernel.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJX2Z0aAAoJEFk3GJrT+8ZlkxoQAI0FJkQ371touZbMRSirMCdG
fyx7ZZWGntw9yHCqcfVGLxy6oBk6bABWOWJzqGIBeTyn7qDoOqc4ec+pIWg7KECS
h/yrJLGPQofI0Hm/6nzZikrjrK1h74c6bhkjRsAfqKCyq0AcEnH8cu1kAZmkwyJq
osU1U/MhRLkIs6UZsc6H2nlsbSw8Ji4ZkSDfT/1P4SUqHgtz9k5PNYCEkPDGK23F
1f1N3zYpqJVqAqucdLhTBsE56vSVzrAXLEsIwpaYCpEzuRO8MyjYP7SiKnky/5Za
WAxz+hKufleqvvDqIK1zWvE/in4SyHrg9eVSHac/xbbDsUKy11RuJ2VasqT6xUOM
r8oi0o1ot0IkMCJrA1Ogey0GqcSoyVUzy5FM+4SOz+M7IctLt7ZV0aVDmfXvG21f
iQLZ7bPmgaj2kck95ppqc8saz0EIt32fJBaI3XvoG9PTpQeoYI7vok2k1l06kYQI
3U6r7Zui4mj9PE2aFAEe3BpY2EbJDj8Vn+mtX4NtkCwS0PwZKkiUgZXF3H/qix3T
+jv9yps2dLhihd4y6RcySVM3/PWuM7A8tU9oRBE+sttf2MiQzXvMPNM/GH0qOVEI
3flZ6tsSLmj8jmFyOdqaxz8MuDo9KNi9b+AijPqWm+D0UfPPqFKnR6bvM4F496Dx
4fG2a7JtDJUAz8e++Jtc
=DlpW
-----END PGP SIGNATURE-----
Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late
Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates
* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
clk: gxbb: expose i2c clocks
clk: gxbb: expose USB clocks
clk: gxbb: expose spifc clock
clk: gxbb: expose MPLL2 clock for use by DT
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
usb: dwc2: add support for Meson8b and GXBB SoCs
net: stmmac: update the module description of the dwmac-meson driver
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
stmmac: introduce get_stmmac_bsp_priv() helper
net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
clk: meson-gxbb: Export PWM related clocks for DT
meson: clk: Add support for clock gates
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
clk: meson: Copy meson8b CLKID defines to private header file
meson: clk: Rename register names according to Amlogic datasheet
meson: clk: Move register definitions to meson8b.h
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
media: rc: meson-ir: Add support for newer versions of the IR decoder
...
Replace in DT sources hard-coded values for pinctrl configuration like pull
up/down, drive strength and function. This makes the DTS easier to read,
especially that some drive strengths values are quite non-obvious.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX3r13AAoJEME3ZuaGi4PX1yUQAIgtpY7loocP8eZnvKSxL0Sv
mFDpDIyTot75P4enDJ762rqk12dyEKfBwOAhw3s1oFOUQyVKC+vQaC0Rg2xtGSPH
b+SBGSi8qhtjp3Idw6LNxgDYlgaKSbAVjIDNl4Wb6se0/CsV2yWrHpUT0oPuxlEb
zUe9qmBzuDvYkLiHiHSKtGFw0Slg1XiTS82Jp0xvpX8OwYNjz1AYJAsnsFcns0RH
aNtMlndVq7qVMyJnksnKm7E4DCAqLEesV9h7dqDDAnqgBKN40PK4uN2yjkA/YCra
ZbrLf5BTHDnEbaoctVwTjXh5uFDK0Jdu/F7U6XKKOxM9Ld7+0SVSeOJozK0Noi2S
7UN57Dga4xRzaDqQp0Bh7nucUeEsMPuVYiwG89e+LEYkCkF+P0hG38l3tMMxA6XA
8SDqeeTyEYu8q+2olFlkCFCqpOU/WcIdoWfbwbVgxRlx9UmaC6h7bmURLlHIsl5l
U1iGubxuGc3QEBi8rrFKNoImTnTqwfffwcLEawCGcji+qNRKV0gZUGW/gceLs4Db
7M3Vw43pM9Z1yc2R2D+LVLWaa7FUYAajD5zyAZ4Czhr2G3ZW670LVHp0PU8nqCGj
5Yo5nkNEiutyQ/77wp72aEzrFv9rOlpm8XY4kuZ3RRFzYSt6xbZYS1oO7QGk9Tey
DqAIGXIaU80bT87Hc7A3
=NN8A
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-pinctrl-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Topic branch for Samsung DeviceTree cleanup for 4.9" from Krzysztof Kozłowski:
Replace in DT sources hard-coded values for pinctrl configuration like pull
up/down, drive strength and function. This makes the DTS easier to read,
especially that some drive strengths values are quite non-obvious.
* tag 'samsung-dt-pinctrl-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s3c64xx: Use macros for pinctrl configuration
ARM: dts: s3c2416: Use macros for pinctrl configuration
ARM: dts: s5pv210: Use macros for pinctrl configuration
ARM: dts: s3c64xx: Use common macros for pinctrl configuration
ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415
ARM: dts: exynos: Fix mismatched value for SD4 pull up/down configuration on exynos4210
ARM: dts: exynos: Use macros for pinctrl configuration on exynos542x/exynos5800
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5410
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5260
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5250
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4415
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4x12
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4210
ARM: dts: exynos: Use macros for pinctrl configuration on exynos3250
ARM: dts: exynos: Use common macros for pinctrl configuration
pinctrl: dt-bindings: samsung: Update documentation with new macros
pinctrl: dt-bindings: samsung: Add header with values used for configuration
Hard-coded pinctrl configuration values are scattered through DTS files.
The numbers are difficult to decode by human, especially without the
datasheet. Additionally the drive strength differs between S3C64xx,
S5PV210 and Exynos SoC families increasing the confusion.
The header will help making this more readable and maintainable.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The ZX296718 clocks are statically listed and registered. More
clock will be added later.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
I2C and AO_I2C clocks are needed for the i2c driver, expose to DT
(and comment out in clk driver)
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX1beIAAoJEBx+YmzsjxAgFNQQAIMCbooFBVbNTzSesGwGLBVl
uRxO8FP8mPZPM0forHq6N6973no0l5H15I9w3x4T0ozkX18KwsI/dj8Q8ZiAl/S8
gqo8rZARBBKy4rspQQazqFytSCZF+KznDigChhA1KeyG6fbob2bKdYtMRppH+l8F
A3HpreGcqKrWv6rBEshYSt9fzFJeoi0W7Uzb0v4wQXuXuVDq/Zpp+fcu+2to/fOO
CaI2Dh8Glcfn3gDwk7cZ94NTZud81B/zLqulcOSTV8CP1KQ/ovs6K8UvsziCCw0J
oMD4t6kfK8BwCt1hsZTA9XjgIT0Hx1rj7wcTApa88BEea+hU0ulXiwdI1mB/x1TU
E880Rp0KIDoldaUBggYTut/vTBWwpOP6lTRWp/EoGfs9Br9VEu1X0wzlihBdAhsQ
IhR27GK1wp1fw0ahTFKCYNWTU5fl8iy40gGDqjpaAXnlqMEmIcEthyqdie/n83o+
HvpUhfp9emnrXn5+y3uNeGc9M3O5BxpuyIjY4jChc5zOrrqvSAio1ifHP0TNDHEe
ZW3TJSoqU8QfCaQTJKxVzC2LG0ZXIjwTepFtqrx5DrFOkc1M3tYod0L/80nau99v
gVghFmaPVnS8HWmuKjlh/jXsI4AqcoESF9kv3bmecDuDc5cWIHkcI/97lsGpXIS8
rSteIQUjRbQkwuo4TyA8
=Ff/R
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock driver changes from Maxime Ripard:
Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).
* tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
clk: sunxi-ng: Add A31/A31s clocks
clk: sunxi-ng: mux: Add clk notifier functions
clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents
clk: sunxi-ng: mux: Add support for mux tables
clk: sunxi-ng: mux: Rename mux macro to be consistent
clk: sunxi-ng: nkm: Add mux to support multiple parents
clk: sunxi-ng: mux: Increase fixed pre-divider div size
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
(EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
clock drivers co-maintainer.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJX0thBAAoJEE1bIKeAnHqLjhwP/1sNlCVU30OQYAsVOG8doaL2
tP4vQmxKWREMK+gg1iWyq6dhAWhOO/YdSL9KgvHAkCKolJfpoGfJjiPm0Pja+TOq
pIHOdE5ql2Cb+PxeJoLQZxfcOsNczt0OorVWgeTJdDyB+/VXaGvVKYwoZFSUoQ5m
nIPfAut5ynIVIk86EBjuSr61sUMoTEzVD7HFGAzYF78K4UPIsscfM43UWSHXqwiX
rsxPZTzjETmtmjSPSP+m8mOY04nds0kFDWSPaP6lzmSQYC7jhGQxM7Pl4fmWBYho
gqL1z4gcp4vHZYRHhtClOuKe1+dlXNRLRaFQSRgIFgpfX/AfQh0Hj35I7QhCmD3N
LDNTWmiFxLVjPET0Z4NykPRzCfIcWYT4S2U2qJ857C2FG1v3DD/xiZ13UvbySTNi
nh/Go6Jp1bbPRQMYxCcMY1a1RJ180qjsNCleC5/5w6KP0DWWJFVDcqFr3NLcmN7e
nikD31moCKLEvPrd2Glezajv1IHD6K/c06cBcTHGBu2BobOrsBstTvjiIfDcjtC/
uZymcsWUztPaM1iPLJ0Dzsrw2TkGcukrYm3R4kN4iRzDJK5XPh4dFUgquJOYlyNH
PgYGBMXocMrBXNOF9lQ9mAsiO9JCfZLjXH9k2NP3w2P0YNTTSfIjBuBvySSiGK6x
aYF0CXwKNDfJhmep+PzE
=lEKC
-----END PGP SIGNATURE-----
Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull samsung clk driver updates from Sylwester Nawrocki:
In addition to a few clean up and code consolidation patches this
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
(EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
clock drivers co-maintainer.
* tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: Add support for EPLL on exynos5410
clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup
clk: samsung: clk-exynos-audss: Add exynos5410 compatible
clk: samsung: clk-exynos-audss: controller variant handling rework
clk: samsung: Use common registration function for pll2550x
clk: samsung: exynos5410: Expose the peripheral DMA gate clocks
clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code
clk: samsung: exynos5260: Move struct samsung_cmu_info to init section
MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer
clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
and Firefly-reload), display support for the rk3288-evb, support for the
recently added firmware reboot-flag support and some housekeeping cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJX0WScAAoJEPOmecmc0R2BEycIAK7/5hV5kyeEA3vx1VaLoRH0
lFHMQyaucbqQCuAu6U6NBwyVGnirvd5HG+KRA34RncLfVT5Fnv81u43byKkaUI/I
8NH6l4FvcND76J1IIR6XZl8cGxaRCT1bkUgII4MFaMaQBxY19gbLCDuBVLVJEhK7
lUy7lG/6j/DvIwU0UevGdB/bdCPZ0WZ6n9InF4xIMJ6PJYI5/BctSpxfJr47hTjQ
a0z637dqXv08L7LRqVtXn+1tJZ6QJdHrtsEavGFOQEzl+n2rRFuBC63+v98h7WCc
1gnyfWbR+NMZOH13imBiOiK7Ap/F5Qm1uF5bfJhoJGbGazv5NcZqPlZ0CocrAXY=
=gktZ
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.9" from Heiko Stübner:
32bit Rockchip devicetree changes containing two new rk3288 boards (Fennec
and Firefly-reload), display support for the rk3288-evb, support for the
recently added firmware reboot-flag support and some housekeeping cleanups.
* tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add sensor-supplies on PopMetal-RK3288 board
ARM: dts: rockchip: fix L3G4200D i2c address on PopMetal-RK3288 board
ARM: dts: rockchip: enable usbotg for Popemtal-rk3288 board
ARM: dts: rockchip: add missing regulators for firefly reload board
ARM: dts: rockchip: remove excess sd properties from firefly reload
ARM: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
ARM: dts: rockchip: move rk3288 usbphy under the GRF node
ARM: dts: rockchip: add rk3288-firefly-reload
ARM: dts: rockchip: add dts for RK3288-Fennec boards
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with rk808 pmu
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with act8846 pmu
ARM: dts: rockchip: add eDP/panel display device nodes for rk3288-evb
This commit introduces the clocks found in the Allwinner A33 CCU.
Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
There is no such significant differences in pll2550x PLL type
to justify a separate registration function. This patch adapts
exynos5440 driver to use the common function and removes
samsung_clk_register_pll2550x().
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
The PDMA{0,1} and EPLL clock IDs are added separately in this
patch so the patch can be merged to the arm-soc tree as dependency.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
This patch adds missing clock IDs for CMU_CDREX (DRAM Express Controller)
which generates clocks for DRAM and NoC (Network on Chip) busses.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Register ASoC HDMI codec for audio functionality and adds device tree
binding for audio configuration.
With the registered HDMI codec the tda998x node can be used like a
regular codec node in ASoC card configurations. HDMI audio info-frame
and audio stream header is generated by the ASoC HDMI codec. The codec
also applies constraints for available sample-rates based on Edid Like
Data from the display. The device tree binding document has been
updated [1].
Part of this patch has been inspired by Jean Francoise's "drm/i2c: tda998x:
Add support of a DT graph of ports"-patch [2]. There may still be some
identical lines left from the original patch and some of the ideas
have come from there.
[1] Documentation/devicetree/bindings/display/bridge/tda998x.txt
[2] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-July/095255.html
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
control. While reading that clock is done the normal way from the
registers, setting it always requires some sort of special handling
to let the system survive this addition.
As the commit message explains, there are currently 3 handling-types
known. General SRAM-based code on rk3288 and before (which is waiting
essentially for the PIE support that is currently being worked on),
SCPI-based clk setting on the rk3368 through a coprocessor, which we
might support once the support for legacy scpi-variants has matured
and now on the rk3399 (and probably later) using a dcf controller that
is controlled from the arm-trusted-firmware and gets accessed through
firmware calls from the kernel. This is the variant we currently
support, but the clock type is made to support the other variants in
the future as well.
Apart from that slightly bigger chunk, we have a mix of PLL rates,
clock-ids and flags mainly for the rk3399.
And interestingly an iomap fix for the legacy gate driver, where I
hopefully could deter the submitter from actually using that in any
new works.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXzrz5AAoJEPOmecmc0R2B0NMH/0SGrQnrUsaq0cvjZPaq8jTD
nJDVIRw099HNM3QZCfy+FZbSsnmex93clX+Fn4UdehplrCZ8ExX1wpPkMwvFcPJF
M34YyFXx5MU9OmDsJXd1UlGRD/mH0L6hKnmfBQiPbK33ObXbr7LCC1L3go+oYABN
eHaOzO1KIcdoCQd6RlVAQHCsiDy8akUJ68P2uACHZ7VVgvGw2f3NdJhOKTD5lCuf
WH/MRo9X9bPDGHpFJIX+mZzZgYsMqUjyF/mYU/VMoH70w+YZTnfcbrYpJ0VkgBYd
aQF2B9VXhed9EQG3Gfu+jgsWoWLed9AJf83UP6eMsPTPLNQBqgzoDZwylbY1Szk=
=LjDG
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:
The biggest addition is probably the special clock-type for ddr clock
control. While reading that clock is done the normal way from the
registers, setting it always requires some sort of special handling
to let the system survive this addition.
As the commit message explains, there are currently 3 handling-types
known. General SRAM-based code on rk3288 and before (which is waiting
essentially for the PIE support that is currently being worked on),
SCPI-based clk setting on the rk3368 through a coprocessor, which we
might support once the support for legacy scpi-variants has matured
and now on the rk3399 (and probably later) using a dcf controller that
is controlled from the arm-trusted-firmware and gets accessed through
firmware calls from the kernel. This is the variant we currently
support, but the clock type is made to support the other variants in
the future as well.
Apart from that slightly bigger chunk, we have a mix of PLL rates,
clock-ids and flags mainly for the rk3399.
And interestingly an iomap fix for the legacy gate driver, where I
hopefully could deter the submitter from actually using that in any
new works.
* tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: use the dclk_vop_frac clock ids on rk3399
clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers
clk: rockchip: add 2016M to big cpu clk rate table on rk3399
clk: rockchip: add rk3399 ddr clock support
clk: rockchip: add dclk_vop_frac ids for rk3399 vop
clk: rockchip: add new clock-type for the ddrclk
soc: rockchip: add header for ddr rate SIP interface
clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
clk: rockchip: handle of_iomap failures in legacy clock driver
clk: rockchip: mark rk3399 hdcp_noc and vio_noc as critical
clk: rockchip: use general clock flag when registering pll
clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399
clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMI
Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Only expose future CLKID constants if necessary. This patch
removes CLK_NR_CLKS from the DT bindings but leaves all previously
defined CLKIDs there to keep backward compatibility.
Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-5-git-send-email-serveralex@gmail.com
In order to support the Qualcomm MDM9615 SoC, add support for the
RPM regulator entries in the qcom-rpm driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add a new style driver for the clock control unit in Allwinner A31/A31s.
A few clocks are still missing:
- MIPI PLL's HDMI mode support
- EMAC clock
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Ths patch lists STM32F4's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
larb2 have 23 ports, the LARB3_PORT_OFFSET should be LARB2_PORT_OFFSET
plus larb2's port number, it should be 44 instead of 43.
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add documentations and dt-bindings headers for the AO clock and reset
controller.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Dt-binding file about reset controller is used to provide
kinds of definition, which is referenced by dts file and
IC-specified reset controller driver code.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk-qcom-9615:
dt-bindings: clock: Update bindings for MDM9615 GCC and LCC
clk: mdm9615: Add support for MDM9615 Clock Controllers
dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
Add the SD/eMMC gate clocks and expose them for use by DT.
While at it, also explose FCLK_DIV2 since this is one of the input
clocks to the mux internal to each of the SD/eMMC blocks.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Maxim has used the same clock IP on multiple PMICs like MAX77686,
MAX77802, MAX77620. Only differences are the number of clocks
from these PMICs like MAX77686 has 3 clocks output, MAX776802 have
two clock output and MAX77620 has one clock output.
Add clock binding details and DT example for the MAX77620.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Rockchip platform use a SYSCON mapped register store
the reboot mode magic value for bootloader to use when
system reboot.
Add the shared header describing the values firmware expects
for different boot modes.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add MSTP10 clocks to the R8A7794 device tree.
This patch is based on the commit ee9141522d ("ARM: shmobile: r8a7791:
add MSTP10 support on DTSI").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add some MSTP5 clocks to the R8A7794 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Device tree contents continue to be the largest branches we submit. This
time around, some of the contents worth pointing out is:
- New SoC platforms:
- Freescale i.MX 7Solo
- Broadcom BCM23550
- Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
- Hisilicon HI3519
- Renesas R8A7792
Some of the other delta that is sticking out, line-count wise:
- Exynos moves of IP blocks under an SoC bus, which causes a large delta due
to indentation changes
- A new Tegra K1 board: Apalis
- A bunch of small updates to many Allwinner platforms; new hardware support,
some cleanup, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXnnckAAoJEIwa5zzehBx3Ss0P/1hp+n8DMuNCHReof8u2D3xf
pi9t5vNzfODMq/YrDT3bzQ3txoEZISt+ztEFku26BUywCZbeIEx+XLPewVEj0ODc
tpWKmW2xNZDIwn2eHRrBD5Y8gJugAnwgwBh9SqfcM8Wtdt2qc7edBvcxLhsiCTuV
pKPxPoJkan/BMR3vBMfoLIx/+aDcZJgpzUkRRuyLod17JdQ0tnMECu5UPrk6Yun8
IjDcJTcwZlpZ9gvtBhxyGUENOPtmGH2ZvZuBPisr7Mwih4mDNJJ/9YrnsdfdYWaf
WAysPGXYMfQy9jMiAC1cBm+jeIPvbIeZpYRzPt3vlFKAHpAZG1sp+r7SLfrT9e7x
7La/QPNVLMsKTjGMW82/qRzOXBed3htk9v2YPIHQubFIOOz2mXqwSPXCqUHuYKeU
eqzedvm0FGoeJbYTzpYyRAWU9OQtazOR+WAI8PrZiN4tdaxvYT2F5JJCMztYIoeq
SJdPUbWTsYxkc/Kj1FagW0LOydO40Aif53JbfrabnzcRYlWsxqQfaSsP8J8G4QDq
zXZvbt0IMan2B52X7AysDF8Zq4Ti8dVijvA7XNl7b5HFBrRpbOt9Tdhl/4zRiW14
Y16VswnIR+9qPhtSXiSkdOwB/0cAI6XEiBTgRunYccakGDUfLOEpIVqJJ1zGNHpl
hqJum3pAMW8i5JX8vl8J
=C4NU
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"Device tree contents continue to be the largest branches we submit.
This time around, some of the contents worth pointing out is:
New SoC platforms:
- Freescale i.MX 7Solo
- Broadcom BCM23550
- Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
- Hisilicon HI3519
- Renesas R8A7792
Some of the other delta that is sticking out, line-count wise:
- Exynos moves of IP blocks under an SoC bus, which causes a large
delta due to indentation changes
- a new Tegra K1 board: Apalis
- a bunch of small updates to many Allwinner platforms; new hardware
support, some cleanup, etc"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits)
ARM: dts: sun8i: Add dts file for inet86dz board
ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet
ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts
ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04
ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply
ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi
ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts
ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts
ARM: dts: sun5i: reference-design-tablet: Remove mention of q8
ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc
ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi
ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts
ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi
ARM: dts: at91: Don't build unnecessary dtbs
ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions
ARM: dts: at91: at91sam9g25ek: fix isi endpoint node
ARM: dts: at91: move isi definition to at91sam9g25ek
ARM: dts: at91: fix i2c-gpio node name
ARM: dts: at91: vinco: fix regulator name
ARM: dts: at91: ariag25 : fix onewire node
...
Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we merge
through arm-soc for historical reasons, is also sizable this time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXnm1XAAoJEIwa5zzehBx35lcP/ApuQarIXeZCQZtjlUBV9McW
o3o7FhKFHePmEPeoYCvVeK5D8NykTkQv3WpnCknoxPJzxGJF7jbPWQJcVnXfKOXD
kTcyIK15WL2HHtSE3lYyLfyUPz8AbJyRt0l0cxgcg6jvo+uzlWooNz1y78rLIYzg
UwRssj7OiHv4dsyYRHZIsjnB8gMWw8rYMk154gP2xy6MnNXXzzOVVnOiVqxSZBm+
EgIIcROMOqkkHuFlClMYKluIgrmgz1Ypjf+FuAg7dqXZd+TGRrmGXeI7SkGThfLu
nyvY3N18NViNu7xOUkI9zg7+ifyYM8Si9ylalSICSJdIAxZfiwFqFaLJvVWKU1rY
rBOBjKckQI0/X9WYusFNFHcijhIFV8/FgGAnVRRMPdvlCss7Zp03C9mR4AEhmKMX
rLG49x81hU1C+LftC59ml3iB8dhZrrRkbxNHjLFHVGWNrKMrmJKa8JhXGRAoNM+u
LRauiuJZatqvLfISNvpfcoW2EashVoU3f+uC8ymT3QCyME3wZm0t7T4tllxhMfBl
sOgJqNkTKDmPLofwm/dASiLML7ZF1WePScrFyOACnj9K4mUD+OaCnowtWoQPu0eI
aNmT84oosJ2S9F/iUDPtFHXdzQ+1QPPfSiQ9FXMoauciVq/2F+pqq68yYgqoxFOG
vmkmG2YM4Wyq43u0BONR
=O8+y
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we
merge through arm-soc for historical reasons, is also sizable this
time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits)
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
soc: raspberrypi-power: add CONFIG_OF dependency
firmware: scpi: add CONFIG_OF dependency
video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip
input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip
pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
serial: clps711x: Changing the compatibility string to match with the smallest supported chip
irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip
clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip
clk: clps711x: Changing the compatibility string to match with the smallest supported chip
...
In the updates:
* Big endian support and preparation for defered probing for the
Exynos IOMMU driver
* Simplifications in iommu-group id handling
* Support for Mediatek generation one IOMMU hardware
* Conversion of the AMD IOMMU driver to use the generic IOVA
allocator. This driver now also benefits from the recent
scalability improvements in the IOVA code.
* Preparations to use generic DMA mapping code in the Rockchip
IOMMU driver
* Device tree adaption and conversion to use generic page-table
code for the MSM IOMMU driver
* An iova_to_phys optimization in the ARM-SMMU driver to greatly
improve page-table teardown performance with VFIO
* Various other small fixes and conversions
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJXl3e+AAoJECvwRC2XARrjMIgP/1Mm9qIfcaAxKY4ByqbVfrH8
313PO6rpwUhhywUmnf/1F/x+JbuLv8MmRXfSc106mdB1rq9NXpkORYKrqVxs0cSq
6u6TzZWbF6WN1ipqXxDITNFBSy7u97K1VuFaKyYFfLbg8xrkcdkMZJ7BqM2xIEdk
rnRKcfHo6wsmCXJ6InsUPmKAqU6AfMewZTGjO+v77Gce0rZEbsJ8n7BRKC9vO2bc
akvN2W+zzEUSyhbuyYQBG+agpmC5GJvz4u+6QvAP5sxTWfAsnwAoPpP4xxR+/KjT
eicHlja4v0YK6Hr4AJaMxoKfKIrCdqpWm0D2tg/edyWZCeg98AW/w7/s0I8OD3ao
Otj6IqC8nPk0pYciOeEPQ7aqPbvKAqU2FYWt7lWamrdr98u2R3p2nXGl0KthoAj6
JqzrCZXvBS7sj1IPLlGpj939yvbKbjpE0p7y1qhI1VEBXoBWFNvlKydkYx76BTGK
F6paGVqn2Zwy00AqAsylTEkvIK063zwShZ6nPqz4bMdVlgzjrjCzdDecjfbHr8Ic
6D2oCwyF+RJ8qw+Ecm9EmWFik80sgb+iUTeeYEXNf+YzLYt5McIj7fi3N+sUPel3
YJ4S4x0sIpgUZZ1i+rOo8ZPAFHRU6SRPYV+ewaeYKrMt+Un5dTn9SddpqrJdbiUu
YrF36BaQjc123IRGKrSd
=xiS2
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
- big-endian support and preparation for defered probing for the Exynos
IOMMU driver
- simplifications in iommu-group id handling
- support for Mediatek generation one IOMMU hardware
- conversion of the AMD IOMMU driver to use the generic IOVA allocator.
This driver now also benefits from the recent scalability
improvements in the IOVA code.
- preparations to use generic DMA mapping code in the Rockchip IOMMU
driver
- device tree adaption and conversion to use generic page-table code
for the MSM IOMMU driver
- an iova_to_phys optimization in the ARM-SMMU driver to greatly
improve page-table teardown performance with VFIO
- various other small fixes and conversions
* tag 'iommu-updates-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits)
iommu/amd: Initialize dma-ops domains with 3-level page-table
iommu/amd: Update Alias-DTE in update_device_table()
iommu/vt-d: Return error code in domain_context_mapping_one()
iommu/amd: Use container_of to get dma_ops_domain
iommu/amd: Flush iova queue before releasing dma_ops_domain
iommu/amd: Handle IOMMU_DOMAIN_DMA in ops->domain_free call-back
iommu/amd: Use dev_data->domain in get_domain()
iommu/amd: Optimize map_sg and unmap_sg
iommu/amd: Introduce dir2prot() helper
iommu/amd: Implement timeout to flush unmap queues
iommu/amd: Implement flush queue
iommu/amd: Allow NULL pointer parameter for domain_flush_complete()
iommu/amd: Set up data structures for flush queue
iommu/amd: Remove align-parameter from __map_single()
iommu/amd: Remove other remains of old address allocator
iommu/amd: Make use of the generic IOVA allocator
iommu/amd: Remove special mapping code for dma_ops path
iommu/amd: Pass gfp-flags to iommu_map_page()
iommu/amd: Implement apply_dm_region call-back
iommu/amd: Create a list of reserved iova addresses
...
drivers, along with a pretty standard number of new drivers. The core
recieved a small number of updates as well.
Core changes of note:
* Removed CLK_IS_ROOT flag
New clk provider drivers:
* Renesas r8a7796 Clock Pulse Generator / Module Standby and Software
Reset
* Allwinner sun8i H3 Clock Controller Unit
* AmLogic meson8b clock controller (rewritten)
* AmLogic gxbb clock controller
* Support for some new ICs was added by simple changes to static data
tables for chips sharing the same family
Driver updates of note:
* the Allwinner sunxi clock driver infrastucture was rewritten to
comform to the state of the art at drivers/clk/sunxi-ng. The old
implementation is still supported for backwards compatibility with the
DT ABI
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJXm9LNAAoJEKI6nJvDJaTUHYcP/1oKTHA4uSPux2+5l9vApEJc
eSV0oSEP/zDDwYfV4xRt1byAOtzHe3R4p5zDGShnk3+CCwXbQSLGmFJFmZDoSs5E
ulftXA8uRV4ac0SEh86BOlstdJHGOVo7Q38XtdPvgKRTv58+ZqHuFcvB726bWY/I
GMzVTkpugbn5U7e3MLM58gkBoqa8BS9uIdsf5q/JIxdpe+VgUtjmioH9Rz6G5U5Y
T6ObeU6HNusDaz6kUJIiAEkl4UNHk+aebnY7FTbwd9JGGySp5nEknVY7tSMeC6iU
hG/knzdMiasa5yv0xdW3/OxnKCQtEeuPPHnJDSXWc9yb20vNs2QhRtd8uckMGHOH
X7fXq9xoLxDH81AggW188g7+xfhx7J+ASpjHmHs74itUIoqhhy61PM3I95yQ8m6s
QDkInqSszFd2C7OiYsy6m5XS0K8g0jyA2tzWhxlIZNVAl7yP71+HVLJ45NNKCPkb
oYbMx4ho538Tl6+c6HHJG0vC3XWSdHbvwMOKyE9k/GyrIJ7FxLZS3BLOYPm6u9t4
9n041MbtBb/UrWVi8kMSdmBjIIs6VSGjq5gwRFAqoPQt3VkPuy0IfnwIpjdE1aFz
PbDJQF4ze7D3JgH2rWtivXbCTRthTANmoar299xjSwwb99TSlP2IABY3cNnJrhPr
9/PGShM3hqRpBEUnEmt+
=1dpY
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Michael Turquette:
"The bulk of the changes are updates and fixes to existing clk provider
drivers, along with a pretty standard number of new drivers. The core
recieved a small number of updates as well.
Core changes of note:
- removed CLK_IS_ROOT flag
New clk provider drivers:
- Renesas r8a7796 clock pulse generator / module standby and
software reset
- Allwinner sun8i H3 clock controller unit
- AmLogic meson8b clock controller (rewritten)
- AmLogic gxbb clock controller
- support for some new ICs was added by simple changes to static
data tables for chips sharing the same family
Driver updates of note:
- the Allwinner sunxi clock driver infrastucture was rewritten to
comform to the state of the art at drivers/clk/sunxi-ng. The old
implementation is still supported for backwards compatibility with
the DT ABI"
* tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (162 commits)
clk: Makefile: re-sort and clean up
Revert "clk: gxbb: expose CLKID_MMC_PCLK"
clk: samsung: Allow modular build of the Audio Subsystem CLKCON driver
clk: samsung: make clk-s5pv210-audss explicitly non-modular
clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks
clk: oxnas: Add hardware dependencies
clk: imx7d: do not set parent of ethernet time/ref clocks
ARM: dt: sun8i: switch the H3 to the new CCU driver
clk: sunxi-ng: h3: Fix Kconfig symbol typo
clk: sunxi-ng: h3: Fix audio clock divider offset
clk: sunxi-ng: Add H3 clocks
clk: sunxi-ng: Add N-K-M-P factor clock
clk: sunxi-ng: Add N-K-M Factor clock
clk: sunxi-ng: Add N-M-factor clock support
clk: sunxi-ng: Add N-K-factor clock support
clk: sunxi-ng: Add M-P factor clock support
clk: sunxi-ng: Add divider
clk: sunxi-ng: Add phase clock support
clk: sunxi-ng: Add mux clock support
clk: sunxi-ng: Add gate clock support
...
New drivers:
- New driver for Oxnas pin control and GPIO. This ARM-based chipset
is used in a few storage (NAS) type devices.
- New driver for the MAX77620/MAX20024 pin controller portions.
- New driver for the Intel Merrifield pin controller.
New subdrivers:
- New subdriver for the Qualcomm MDM9615
- New subdriver for the STM32F746 MCU
- New subdriver for the Broadcom NSP SoC.
Cleanups:
- Demodularization of bool compiled-in drivers.
Apart from this there is just regular incremental improvements to
a lot of drivers, especially Uniphier and PFC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXmcthAAoJEEEQszewGV1z2ukP/1T34tgMllEzBcnyTM28pnPl
80anOiCi/jkLuW1hYTLc4Rx0tZT2oWw9hrZdKGNMuzNCaJSmFaRhUrbzxhZ8E+6O
3AHYSopAYUTKVYJsuY+fs3HbNajKBsSWYdmxin4e953BPudLjhZ2WliDXxupsbwZ
/KI6s8J2pDZcPurrlozT5Avp3BTwwCq+fo12NIMkkmuhURb69OsDAVjPlwjocq73
BKcdH8AdgO7w5Ss5/IQbvrhyuFc2kCQ/wH1tiuE2a4iYWhp+QkMOEqWUSdYs33bx
Sbn3KTK6IYYS1eb4xharh7H/zoBs20aCQ2kS8qbYmG+Fv7rB7qboI0qM7m7+25O8
7F6Tf4F0HUg6IjcABcI5lFuTxACBG8p5ZlmQAp/36EaeIblLALBCvd1ArmZ6fdG+
Pzu5vLaZBAmxQn6EseHLAJkH4FEzV7II/Sk7U23TINHUpl/L2GJO+6irz7eelKAk
XED6mrNU8rRnZMka02ZnIgIbABG7ELNJsRxEnf8k9CX7cfi4p568eZeR1nfKcy4+
uldJLipNv3NfwuRY5JEEa7pFW4azYmnzS1GcoVYPy7snYc4Rr8cbBD6YvcxyMhVz
RXHc21mj45JnboldAYU59t5BbVZNwZqF8hmg935ngoaZjYfhhnfGoNQF7hy6/1fS
bwojoQtBqGcriKZYGs0o
=po0g
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.8 kernel cycle.
Nothing stands out as especially exiting: new drivers, new subdrivers,
lots of cleanups and incremental features.
Business as usual.
New drivers:
- New driver for Oxnas pin control and GPIO. This ARM-based chipset
is used in a few storage (NAS) type devices.
- New driver for the MAX77620/MAX20024 pin controller portions.
- New driver for the Intel Merrifield pin controller.
New subdrivers:
- New subdriver for the Qualcomm MDM9615
- New subdriver for the STM32F746 MCU
- New subdriver for the Broadcom NSP SoC.
Cleanups:
- Demodularization of bool compiled-in drivers.
Apart from this there is just regular incremental improvements to a
lot of drivers, especially Uniphier and PFC"
* tag 'pinctrl-v4.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (131 commits)
pinctrl: fix pincontrol definition for marvell
pinctrl: xway: fix typo
Revert "pinctrl: amd: make it explicitly non-modular"
pinctrl: iproc: Add NSP and Stingray GPIO support
pinctrl: Update iProc GPIO DT bindings
pinctrl: bcm: add OF dependencies
pinctrl: ns2: remove redundant dev_err call in ns2_pinmux_probe()
pinctrl: Add STM32F746 MCU support
pinctrl: intel: Protect set wake flow by spin lock
pinctrl: nsp: remove redundant dev_err call in nsp_pinmux_probe()
pinctrl: uniphier: add Ethernet pin-mux settings
sh-pfc: Use PTR_ERR_OR_ZERO() to simplify the code
pinctrl: ns2: fix return value check in ns2_pinmux_probe()
pinctrl: qcom: update DT bindings with ebi2 groups
pinctrl: qcom: establish proper EBI2 pin groups
pinctrl: imx21: Remove the MODULE_DEVICE_TABLE() macro
Documentation: dt: Add new compatible to STM32 pinctrl driver bindings
includes: dt-bindings: Add STM32F746 pinctrl DT bindings
pinctrl: sunxi: fix nand0 function name for sun8i
pinctrl: uniphier: remove pointless pin-mux settings for PH1-LD11
...
This reverts commit e16fb2e635.
Updated documentation from the chip vendor reveals that this clock is
not required for correct operation of the MMC controller. As such, do
not expose it to DT.
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect
table in the most recent R-Car gen2 manual. But when I received that manual
I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't
have ADSP at all. Accordingly remove the ADSP clock from DT for the
r8a7792.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Merge "STi late updates for v4.8" from Patrice Chotard:
- Add STi DT critical clocks declaration
- Remove SPI hack wich has dependecy with critical clocks
These 2 STi DT patches and SPI hack MUST be applied after patches
contained into Stephen Boyd's branch clk-next/clk-st-critical.
This to ensure not to break SPI.
* tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
spi: st-ssc4: Remove 'no clocking' hack
ARM: sti: stih410-clocks: Identify critical clocks
ARM: sti: stih407-family: Supply defines for CLOCKGEN A0
clk: st: clkgen-pll: Detect critical clocks
clk: st: clkgen-fsyn: Detect critical clocks
clk: st: clk-flexgen: Detect critical clocks
Merging this in avoids a build error that was missed earlier:
In file included from ../arch/arm/boot/dts/meson8b-mxq.dts:48:0:
../arch/arm/boot/dts/meson8b.dtsi:49:53: fatal error: dt-bindings/reset/amlogic,meson8b-reset.h: No such file or directory
* reset/for-4.8-2:
dt-bindings: reset: Add bindings for the Meson SoC Reset Controller
reset: Add support for the Amlogic Meson SoC Reset Controller
reset: Return -ENOTSUPP when not configured
reset: oxnas: Use devm register API and get rid of platform remove
reset: fix Kconfig menu to include reset drivers in sub-menu
reset: zynq: use devm_reset_controller_register()
reset: socfpga: use devm_reset_controller_register()
reset: sunxi: use devm_reset_controller_register()
reset: pistachio: use devm_reset_controller_register()
reset: ath79: use devm_reset_controller_register()
reset: add devm_reset_controller_register API
There are 2 LMI clocks generated by CLOCKGEN A0. We wish to control
them individually and need to use these indexes to do so.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The MMC_PCLK is needed for the SD/eMMC driver, expose to DT (and comment
out in clk driver)
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160707033837.20029-1-khilman@baylibre.com
- change request API to be more explicit about the difference between
exclusive and shared resets (the former guarantee the reset line is
asserted immediately when reset_control_assert is called, the latter
are refcounted and do not guarantee this).
- add Hisilicon hi6220 media subsystem reset controller support
- add TI SYSCON based reset controller support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXdEKmAAoJEFDCiBxwnmDr0qUQAK7zmAATBcgGp/ipvkEajNzp
oTnxTC8kpGJ1oG0rQzXVDHImcOGxsLaV2CwEx5KLRyTkMvTRWroCrmpspmwpFgbg
P9CY2HBim7TJzEKG3Z7qJ5cymvGeS4aDFWHZ97Il26/ElGcXqnNRlI8jmYEBuAQD
GiW3Q1mzxp/fsr0vjIn8JE/j4T4kUrs2A1TSv4AjlBtDp1eHdDzWq1l11TvH9GTO
fpSOMEPxfU+KPN4Bdu0ZrxQan8wlCFr+YBvkXzaJRZv1bjRYOqgqhYnprM0VT62J
KZkkrDUzZ/QweOhH4bFr0REddWGGnj9NZ7rmaAYLi6iTy9vHv8AwFuST3J+bmCuu
soOzx+HTLJuYnOtb4dg7KQRqLik04V3oNKqdeuCxeh+nRpOjssb1HeycN7tcrIPb
6Io4amMYP3S81B3LZIXVh/zxUxHmPudtKeiDl7YEaZR9/oY7LIh1DSlysBru9+OQ
bX+lxOzUdNaXBZAt/9MHC4Z6GDe0/xr7G6v1cQjRSzwX6HC8PPY3fgnyB04CfUZK
srnLI+ZzxOjEqEaqJ3/ekJRZQ3dLUIB1NibrUF4U7JPTwkM/509jyOUwOb9CsPuP
5P6x/ufpVHFGZvHc1LIk1GKwUi+Zh0VQbFwGCaVn7UdIenw5rURiWS9/Bv/VhtB7
bbfx0gRGzvgIfs1esRPS
=5bzt
-----END PGP SIGNATURE-----
Merge tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux into next/drivers
Merge "Reset controller changes for v4.8, part 3" from Philipp Zabel:
- change request API to be more explicit about the difference between
exclusive and shared resets (the former guarantee the reset line is
asserted immediately when reset_control_assert is called, the latter
are refcounted and do not guarantee this).
- add Hisilicon hi6220 media subsystem reset controller support
- add TI SYSCON based reset controller support
* tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux:
reset: add TI SYSCON based reset driver
Documentation: dt: reset: Add TI syscon reset binding
reset: hisilicon: Add hi6220 media subsystem reset support
reset: hisilicon: Change to syscon register access
arm64: dts: hi6220: Add media subsystem reset dts
reset: hisilicon: Add media reset controller binding
reset: TRIVIAL: Add line break at same place for similar APIs
reset: Supply *_shared variant calls when using *_optional APIs
reset: Supply *_shared variant calls when using of_* API
reset: Ensure drivers are explicit when requesting reset lines
reset: Reorder inline reset_control_get*() wrappers
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXdbKVAAoJEPOmecmc0R2B4t8H/3J/l3fXyAskseN12883GkgO
WxEaCe4LeLbxp9Lcd3jmhXM4WZKPbfngYdLvL6kNh/LZeZT3naa2B55ot0FiIOHQ
PVvAC9ce7T0wTeK/aC2iFU6two6ZMbk8jSRfpfpijHIwK9U1NQcXTssuzvHR+S/L
+QP29M2TP3Y9UrPydx8kpCeH0kav2WmdqNmRdpQ9hokCqAiR2jbXi2N4PNtVl9v9
Vy/s+kFa8RSLzWTUICalwrMzS7j/VyeFKq61NPPjVdfS0Q+poCcdaDw5ZPEtZYBu
eerD1hTou+z7MPz6F5SM3J5U9G8NEp0NO4b3C0eWvAuA9cMv0smJFfqVD4erp40=
=wEmr
-----END PGP SIGNATURE-----
Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Audio support and spi-flash on rk3288-veyron Chromedevices
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.
* tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add support rk3229 evb board
ARM: dts: rockchip: add GMAC nodes for RK322x SoCs
ARM: dts: rockchip: add i2s nodes for RK322x SoCs
ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi
clk: rockchip: add clock-ids for rk3228 MAC clocks
clk: rockchip: add clock-ids for rk3228 audio clocks
ARM: dts: rockchip: rename i2s model for Veyron devices
ARM: dts: rockchip: move rk3288 io-domain nodes to the grf
ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks
ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards
ARM: dts: rockchip: add SPI flash node for rk3288-veyron
Signed-off-by: Olof Johansson <olof@lixom.net>
* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
* Update console parameters to uniformly use chosen/stdout-path,
serial0, not provide kernel unnecessary command line parameters
* Add DU pins to silk board
* Add support for blanche/r8a7792
* Name pfc subnodes after device name
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXdSEnAAoJENfPZGlqN0++T0kP/jc/xLIytIA61qGuaTALFFaz
h5d3b5gxww8jaQSPsTiaNueQLUCGWdimDp9Jl7r2CduZ633B62l9awobY5E5mx9X
tPL90nZM1wuuKGwcwDl2LDKUJ/jUbUDb6MN+YIGHhp8qTOa75GxHpGhhdYQH8Uzs
MlxWkWqucmTMsSQs9USX5/XloQwzZVSbplvS6wHjS4HoaBToB9lQS8qcjX8DGx+j
OrndwruYx9B5cYA0Fp7xcae/YKiyfyhMdDX2iRKpIAfpheO9/Km7HFES2dY57Xw5
DN4U4g/iDrdcIBfh6VR6MtfGh+JprOyoelFloh3hKtTL7Pu6bkN4ZnPlN5z6W3Ej
jFrjgUrf9TSGQaAUaOdzTAjSPRCj63Z3xy8twNn0De0D7dk+AjTQbbdtGR6afAUR
20i6+8ktB08vZHwoB3DxC5xnDOwugceHLHrR9lbPx+s2eXYQpEze6UNgr5/2r6eo
HCa1NeFk60F1gJHGvKBbCoFSgP+6QYALt7p5KJ4xfKh/ta08DKz6d3b93KbcXaWM
NAzrFT0yWdWMHspvsKdTfMA2xyUquWFDzj6URGZ1q84vGJqrXAoZ7XaEl/DKnhdk
H8+qwSR4Y8jL7MSzGwesaQIrUF9CjYt47+nvAERvJYjZsFHHbq7TuRslTicTgleT
Bl6Kaqg/1nFH0Xu/9NOD
=gmxg
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.8
* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
* Update console parameters to uniformly use chosen/stdout-path,
serial0, not provide kernel unnecessary command line parameters
* Add DU pins to silk board
* Add support for blanche/r8a7792
* Name pfc subnodes after device name
* tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits)
ARM: dts: r8a7792: add SMP support
ARM: dts: r8a7793: Add APMU node and second CPU core
ARM: dts: r8a7791: Add APMU node
ARM: dts: r8a7790: Add APMU nodes
devicetree: bindings: Renesas APMU and SMP Enable method
ARM: dts: kzm9g: Update console parameters
ARM: dts: kzm9d: Update console parameters
ARM: dts: marzen: Add serial port config to chosen/stdout-path
ARM: dts: genmai: Update console parameters
ARM: dts: armadillo800eva: Update console parameters
ARM: dts: r8a7792: add JPU support
ARM: dts: r8a7792: add JPU clocks
ARM: dts: silk: add DU pins
ARM: dts: blanche: add Ethernet support
ARM: dts: blanche: initial device tree
ARM: dts: blanche: document Blanche board
ARM: dts: r8a7792: add IRQC support
ARM: dts: r8a7792: add [H]SCIF support
ARM: dts: r8a7792: add SYS-DMAC support
ARM: dts: r8a7792: initial SoC device tree
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch add the support to select the peripheral clock (PERIPH)
as a parent clock source using the "assigned-clock-parents"
parameter in the device tree.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1464982475-24738-1-git-send-email-slemieux.tyco@gmail.com
rk3228 clockids and a small fix for the not yet used spdif to
displayport clock on the rk3399.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXdbFVAAoJEPOmecmc0R2B2fEH/1Gm80XZsrXPrr0kZ2cO8Zcg
qUpOPJgZvEWJdG1EGzU34VAEAZP0y8sth46iypL+TP3UVf6Z9acZF2eeAbEvzdVY
pM6qb0eNLdrcV+aaKhAScxjEwg5kdLxc/kuwOr9XsZwE4Wqvsbmldw5O8qEU8DAP
fxdhi854hlanCVmTCfdjEpeRqv9JCejU27KttldqBC/0CwGaQwp0cUcp6Ggpv9pF
deHR5BGj2cwnPR2JmNsZ9U85kgf9/7jd4PD4UXNRG/ApuwpIb0/1ulr4YquqAcDW
OpdO6at9QmZItYS6byKNoAPKWoGXjmHYnjlENODQsCXoa6K8HkmDnxBtli6Iczw=
=6ikd
-----END PGP SIGNATURE-----
Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:
Placeholder for the rk3399 watchdog pclk, some newly exported
rk3228 clockids and a small fix for the not yet used spdif to
displayport clock on the rk3399.
* tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits
clk: rockchip: export rk3228 MAC clocks
clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk
clk: rockchip: export rk3228 audio clocks
clk: rockchip: include rk3228 downstream muxes into fractional dividers
clk: rockchip: fix incorrect rk3228 clock registers
clk: rockchip: add clock-ids for rk3228 MAC clocks
clk: rockchip: add clock-ids for rk3228 audio clocks
clk: rockchip: add a dummy clock for the watchdog pclk on rk3399