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377384 Commits

Author SHA1 Message Date
Ben Skeggs 1bb3f6a252 drm/nouveau: fix minor thinko causing bo moves to not be async on kepler 
Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-08 10:52:02 +10:00
Ilia Mirkin bf03d1b293 drm/nva3/disp: Fix HDMI audio regression 
This is the nva3 counterpart to commit beba44b17 (drm/nv84/disp: Fix
HDMI audio regression). The regression happened as a result of
refactoring in commit 8e9e3d2de (drm/nv84/disp: move hdmi control into
core).

Reported-and-tested-by: Max Baldwin <archerseven@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
 2013-07-05 14:43:59 +10:00
Emil Velikov 378f2bcdf7 drm/nv50-/disp: Use output specific mask in interrupt 
The commit

   commit 476e84e126
   Author: Ben Skeggs <bskeggs@redhat.com>
   Date:   Mon Feb 11 09:24:23 2013 +1000

       drm/nv50-/disp: initial supervisor support for off-chip encoders

changed the write mask in one of the interrupt functions for on-chip encoders,
causing a regression in certain VGA dual-head setups. This commit reintroduces
the mask thus resolving the regression

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66129
Reported-and-Tested-by: Yves-Alexis <corsac@debian.org>
Cc: stable@vger.kernel.org [3.9+]
CC: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 14:22:29 +10:00
Marcin Slusarz d005f51eb9 drm/nouveau: use vmalloc for pgt allocation 
Page tables on nv50 take 48kB, which can be hard to allocate in one piece.
Let's use vmalloc.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Cc: stable@vger.kernel.org [3.7+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:48:41 +10:00
Ben Skeggs 5c5ae7157d drm/nvc0-/gr: remove some more of the hardcoded register writes 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:45:04 +10:00
Ben Skeggs d196e16ebf drm/nvc0-/gr: factor out yet more unknown magic into versioned functions 
NVC1/NVD9 are the only chipsets that should have anything different
happen on them after this.  We previously weren't doing these
register modifications, and NVIDIA do.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:52 +10:00
Ben Skeggs 0bfd6f734a drm/nvd7/devinit: use fermi class, not tesla 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:43 +10:00
Ben Skeggs 60a4acd7c9 drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:35 +10:00
Ben Skeggs f8adeb82a9 drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucode 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:25 +10:00
Ben Skeggs 8f6fe26745 drm/nvf0/gr: build cs ucode for GK110 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:16 +10:00
Ben Skeggs 960b4381c5 drm/nvc0-/gr: extend one of the magic calculations for >4 GPCs 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:09 +10:00
Ben Skeggs 0085a60524 drm/nvf0/gr: fix ddx shaders locking up on me 
This can be generalised and used on GK104 (probably even GF117), but lets
just make it work for now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:44:03 +10:00
Ben Skeggs 18ac424651 drm/nvc0/devinit: minor typo 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:55 +10:00
Ben Skeggs 9d1c4c51ce drm/nvf0/gr: enable support, if external cs ucode is available 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:49 +10:00
Ben Skeggs b054aadfb0 drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:40 +10:00
Ben Skeggs 9ec2dbba9f drm/nvf0/ce: enable support 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:33 +10:00
Ben Skeggs 56fbd2b654 drm/nvf0/fifo: enable support 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:25 +10:00
Maarten Lankhorst 26410c6798 drm/nvd7/gr: initial support 
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:16 +10:00
Ben Skeggs a32b2ffb82 drm/nvc0-/gr: generate cs register lists from grctx data 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:11 +10:00
Ben Skeggs 70f824ac8c drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:43:06 +10:00
Ben Skeggs 5ee86c4190 drm/nve0-/gr: some new gpc registers can have multiple copies 
GK110 exposes more than one, and needs to be dealt with in the ctxsw
ucode just like the TPC sets are.

Broadcast is at +0xe00.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:42:57 +10:00
Ben Skeggs c03ff9e8fa drm/nvc0-/gr: pull out a group of separately context-switched gpc regs 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:42:51 +10:00
Ben Skeggs 30f4e0870d drm/nvc0-/gr: make register lists from initvals functions 
Generated context verified to be the same for all supported chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-05 13:42:32 +10:00
Maarten Lankhorst 791dc143ed drm/nvd0-/disp: handle case where display engine is missing/disabled 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:50 +10:00
Ben Skeggs e99716f13d drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 
No code changes, proven by envyas producing identical binaries.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:50 +10:00
Ilia Mirkin 05f9a5bc58 drm/nouveau/bsp/nv84: initial vp2 engine implementation 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:49 +10:00
Ilia Mirkin a0376b1481 drm/nouveau/vp/nv84: initial vp2 engine implementation 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:49 +10:00
Ilia Mirkin 44b1e3bd6a drm/nouveau/core: xtensa engine base class implementation 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:48 +10:00
Ilia Mirkin 0d4a1450c9 drm/nouveau/vdec: fork vp3 implementations from vp2 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:48 +10:00
Ben Skeggs a0fd4ec8f1 drm/nouveau/core: move falcon class to engine/ 
Not really "core" per-se.  About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:47 +10:00
Ben Skeggs d2898713fb drm/nouveau/kms: don't fail if there's no dcb table entries 
Fixes module not loading on Tesla K20.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:46 +10:00
Maarten Lankhorst 79442c3af0 drm/nouveau: remove limit on gart 
Most graphics cards nowadays have a multiple of this limit as their vram,
so limiting GART doesn't seem to make much sense.

Signed-off-by: Maarten >Lnkhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:43 +10:00
Maarten Lankhorst 36798b61ed drm/nouveau/vm: perform a bar flush when flushing vm 
Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes
internally".

nvidia always seems to do this flush after writing values.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:42 +10:00
Ben Skeggs 57f0ec159b drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:41 +10:00
Ben Skeggs eb12f57be6 drm/nvc8/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:41 +10:00
Ben Skeggs dba50728fd drm/nvc4/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:40 +10:00
Ben Skeggs 58ef23056a drm/nvc1/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:40 +10:00
Ben Skeggs 8b637ae3a3 drm/nvc3/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:39 +10:00
Ben Skeggs d8b02dbbc3 drm/nvc0/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:39 +10:00
Ben Skeggs 37c3afd07c drm/nvd9/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:38 +10:00
Ben Skeggs 1dd44acfab drm/nve4/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:37 +10:00
Ben Skeggs a8004a9edd drm/nvc0-/gr: bump maximum gpc/tpc limits 
Needed for GK110, separate commit to catch any unexpected breaks to
other parts of the code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:37 +10:00
Ben Skeggs cb1e06e0e3 drm/nvf0/gr: initial register/context setup 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:36 +10:00
Ben Skeggs 507cd5b553 drm/nve7/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:36 +10:00
Ben Skeggs 99bd5537bd drm/nve6/gr: update initial register/context values 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:35 +10:00
Ben Skeggs c4c7044ffc drm/nouveau: delay busy bo vma removal until fence signals 
As opposed to an explicit wait.  Allows userspace to not stall waiting
on buffer deletion.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:50:31 +10:00
Ben Skeggs 780194b1b9 drm/nouveau/vm: make each vma take a reference on its parent vm 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:45:09 +10:00
Ben Skeggs 51a506c012 drm/nouveau/core: remove nouveau_mm.mutex, no more users 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:45:05 +10:00
Ben Skeggs 4e67bee8e1 drm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/nvc0 
nvc0_vm_flush() accesses the pgd list, which will soon be able to race
with vm_unlink() during channel destruction.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:45:03 +10:00
Ben Skeggs 15cace5917 drm/nvc0/vm: handle bar tlb flushes internally 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2013-07-01 13:44:57 +10:00