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1229102 Commits

Author SHA1 Message Date
zhencheng.zhang 1833679df2 driver: dma: delete sophgo dma driver 
- sysdma driver is replaced by snps,axi-dma-1.01a

Signed-off-by: zhencheng.zhang <zhencheng.zhang@sophgo.com>
 2024-10-25 10:52:12 +08:00
zhencheng.zhang e2fbc03025 riscv: dts: change sysdma driver to native snps driver 
Signed-off-by: zhencheng.zhang <zhencheng.zhang@sophgo.com>
 2024-10-25 10:52:12 +08:00
tingzhu.wang@sophgo.com d845ac7f25 driver:tpu:delete sgtpu dts 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:12 +08:00
tingzhu.wang@sophgo.com f97333af02 drvier:tpu:add timeout when pcie link failed 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:12 +08:00
tingzhu.wang@sophgo.com 60be7ce535 driver:tpu:fix pcie info bug 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:12 +08:00
xiangwen.jiang e0489b7bcf add veth rp to ap in bm1690 evb soc mode 2024-10-25 10:52:11 +08:00
peilei.cui 7d8c8546b7 bm1690-video-sys.dtsi delete clock info; bm1690-cdm-rp.dts add bm1690-video-sys.dtsi 2024-10-25 10:52:11 +08:00
tingzhu.wang@sophgo.com bda8f5f9de driver:tpu:fix c2c init bug 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:11 +08:00
kai.ma 4f90c3da24 tools: provide ap/rp/tp ddr/axi sram R/W performance test driver 2024-10-25 10:52:11 +08:00
dong.yang be8864dba2 dts: riscv: In bm1690 pcie mode, change rp used memory. 
zsbl address: 0x1d4000000
opensbi address: 0x1c0000000
kernel address: 0x1c0200000
dtb address: 0x1c8000000
ramfs address: 0x1cb000000

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:11 +08:00
tingzhu.wang@sophgo.com a63264527a driver:tpu:add map memory config 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:11 +08:00
bokai.zeng 771ece529c modify host request struct and add chip2 irq 2024-10-25 10:52:10 +08:00
kun-chang 0c68d030f4 driver: mmc: optimize SD voltage switching code 
Signed-off-by: kun-chang <kun.chang@sophgo.com>
 2024-10-25 10:52:10 +08:00
dong.yang ea0e9447c9 dts:riscv: fix interrupts register bug. 
We need 1 normal interrupt, 8 tx interrupts and 8 rx interrupts.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:10 +08:00
Xiaoguang Xing bac429db65 riscv: dts: SG2044 64 cores only use one uart 
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
 2024-10-25 10:52:10 +08:00
tingzhu.wang@sophgo.com e7896e117e driver:tpu:bind tpu interrupts to different cores 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:10 +08:00
tingzhu.wang@sophgo.com c95566cd42 driver:tpu:evb not support c2c 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:09 +08:00
tingzhu.wang@sophgo.com f21e408834 driver:tpu:add cdma init for c2c 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:09 +08:00
dong.yang cdf2a1cf31 dts: sophgo: update rp dts that used by bm1690 soc. 
In BM1690 PCIe mode, rp memory map is same as rp soc mode.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:09 +08:00
Chao Wei 3af10474b6 riscv: dts: enable PCIe on SG2044 EVB 
1. enable PCIe on SG2044 EVB
2. delete unused dtsi bm1690-pcie-2rc.dtsi
3. change PCI IO space from 4M to 2M. PCIe IO space is 16M on
RISC-V. if 5 RC are enabled, that should have 20M, that exceeds
max size of PCI IO space.
4. remove invalid dma-ranges
5. set PCIe bus range from 0 to 255 for every controller. They are
in different PCI domains, there are no resource conflict.
 2024-10-25 10:52:09 +08:00
dong.yang 5ab8ad6915 drivers: soc: sophgo: eliminate compile warnings. 
1. new line should be at the end of drivers/tty/Kconfig.
2. In ap_sgcard.c:440, the type is long long unsigned.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:09 +08:00
bokai.zeng 2147b75809 add force quit request for ap 2024-10-25 10:52:09 +08:00
tingzhu.wang@sophgo.com 3a1b749c3e driver:tpu:fix c2c kernel launch bug 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:08 +08:00
dong.yang 7900a37468 riscv: dts: sg2044: modify default clk-rate for tpsys. 
In Soc normal mode ,the clk-rate of tpsys should be 1G.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:08 +08:00
dong.yang 31841a8f88 riscv: dts: configs: add ubuntu config for bm1690. 
1. bm1690 soc mode need boot ubuntu for rp.
2. emmc bug have been fixed, don't delete emmc node in sg2044-evb.dts.
3. let rp use 48G~64G memory area, put opensbi in 48G start to avoid
   when ubuntu kernel run kexec ahead 48G will think the initrd have
   been polluted bug.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:08 +08:00
zhencheng.zhang 8ac18ea83d driver: spifmc: support dmmr read 
1. support dmmr read and use dmmr read by default
2. fix bug when non-dmmr read block size bigger than 16M
3. fix bug when dmmr read block size bigger than 32M

Signed-off-by: zhencheng.zhang <zhencheng.zhang@sophgo.com>
 2024-10-25 10:52:08 +08:00
Xiaoguang Xing 9308bee73f Revert "riscv: dts: Modify compatible for mtimer and mswi" 
mswi and mtimer' address of bm1690 ap and tp is not contiguous,
so make them separately. it need add sbi support for them.

This reverts commit 378b9c414a.
 2024-10-25 10:52:08 +08:00
tingzhu.wang@sophgo.com d95fbb83cc driver:tpu:support build topology for c2c 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:08 +08:00
xiangwen.jiang f625181dc9 add veth in rp and ap 
change veth fifo and Virtual network card compatible with AP and RP

Signed-off-by: xiangwen.jiang <xiangwen.jiang@sophgo.com>
 2024-10-25 10:52:07 +08:00
fengchun.li 8296d18b6c drivers:soc:support multi msi for sc11 
drivers:soc:support multi msi for sc11

Signed-off-by: fengchun.li <fengchun.li@sophgo.com>
 2024-10-25 10:52:07 +08:00
tingzhu.wang@sophgo.com 37a59cb8e7 driver:tpu:support multi cards 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:07 +08:00
pbw 7bf1622822 driver: soc: Add virtual tty driver to ap and tp for sophgo bm1690 soc 
Signed-off-by: pbw <bowen.pang01@sophgo.com>
 2024-10-25 10:52:07 +08:00
xiangwen.jiang 6c3ac4da1e driver: soc: Add veth host to ap for sophgo bm1690 soc 
Signed-off-by: xiangwen.jiang <xiangwen.jiang@sophgo.com>
 2024-10-25 10:52:07 +08:00
Xiaoguang Xing 7f939f84ef riscv: dts: Modify compatible for mtimer and mswi 
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
 2024-10-25 10:52:06 +08:00
dong.yang 891db00eef riscv: dts:config: add dts and config for bm1690. 
In bm1690 PCIe card product, we need also run linux on rp.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:06 +08:00
bokai.zeng 4af8f92069 fixed ctrl config and c2c top addr 2024-10-25 10:52:06 +08:00
zhencheng.zhang fac4f7e7dc tools: efuse: add efuse code used in user-mode 
- support efuse writing, each bit can only be written onece
- support efuse reading
- note: addr is the Hard Macro address not Ecc read address

Signed-off-by: zhencheng.zhang <zhencheng.zhang@sophgo.com>
 2024-10-25 10:52:06 +08:00
tingzhu.wang@sophgo.com 6ee80ddf1b driver:tpu:wake up all stream by main thread 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:06 +08:00
bokai.zeng 930ba5855a add bm1690-evb-ap dts for pcie mode 2024-10-25 10:52:06 +08:00
dong.yang c1d6eb8e32 riscv: drviers: clk: sg2044 keep cxp clk enable. 
When SG2044 use linuxboot, first step linux exit will close the
cxp clk, this will cause second step linux hang when it visit
cxp register, so we keep the cxp clk enable so that first step
linux don't close the clk gate.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:05 +08:00
Xiaoguang Xing 005827d4ad riscv: ipi: Support IPI CLINT in S-mode 
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
 2024-10-25 10:52:05 +08:00
kun-chang 861414d0b3 driver: mmc: fallback the configuration of phy in sdhci-sophgo.c 
- found that using the new phy config for evbs that only support 3.3V would errors
Signed-off-by: kun-chang <kun.chang@sophgo.com>
 2024-10-25 10:52:05 +08:00
kun-chang 620f841fce driver: mmc: support up to sd sdr104 
- update the source clock of sdhci host in the clock tree
	- support voltage switching from 3.3V to 1.8V through gpio
	- update the phy and driver strength configuration of sdhci-sophgo
	- support getting source clock from device tree and preset value disable
	- note that currently SD only works at 3.3V(HS_50M)

Signed-off-by: kun-chang <kun.chang@sophgo.com>
 2024-10-25 10:52:05 +08:00
fengchun.li 0a25c36967 driver: pcie: Modify PCIe dtsi for sg2044r-evb 
Signed-off-by: fengchun.li <fengchun.li@sophgo.com>
 2024-10-25 10:52:05 +08:00
tingzhu.wang@sophgo.com f8d15cde27 driver:tpu:support c2c 
Signed-off-by: tingzhu.wang@sophgo.com <tingzhu.wang@sophgo.com>
 2024-10-25 10:52:05 +08:00
Xiaoguang Xing 644aada38a script: builddeb: make kernel headers package fatter 
- revert "make headers package thinner"
- add module sign certificate and System.map

https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/
stable/linux.git/commit/?id=9945722afdc3443eab826b2da1122509a13a50a5

Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
 2024-10-25 10:52:04 +08:00
zhencheng.zhang b1c890eba4 driver: spifmc: fix spif bug when bs of dd exceed 64k 
- data read is divided into 64k due to IP restrictions that
  reg TRANS_NUM is 16bit

Signed-off-by: zhencheng.zhang <zhencheng.zhang@sophgo.com>
 2024-10-25 10:52:04 +08:00
yujing.shen 9b3cc05d1e Changes: Add a description of reserved memory for the video section 2024-10-25 10:52:04 +08:00
Xiaoguang Xing 5af5816ea9 riscv: dts: Using one node for mtimer and mswi 
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
 2024-10-25 10:52:04 +08:00
dong.yang 163c8e2d13 riscv: dts: sophgo: fix SG2044 mpll1 frequency bug. 
In SG2044 spec, the mpll1 default frequency should be set to 2GHz.

Signed-off-by: dong.yang <dong.yang@sophgo.com>
 2024-10-25 10:52:04 +08:00