Commit Graph

1251 Commits

Author SHA1 Message Date
Christian König 165e4e07c2 drm/amdgpu: add VM pointer to id trace
Because of the scheduler all traces come from the same thread now and
can't be distincted otherwise.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:56 -05:00
Alex Deucher 1c343fc9db drm/amdgpu: drop hard_reset module parameter
It doesn't currently do anything and there's no need for it
going forward since pci config reset will be required as a
fallback even when we have fine grained reset implemented.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:55 -05:00
Alex Deucher 18db89b402 drm/amdgpu: add a debugfs property to trigger a GPU reset
Ported from similar code in radeon.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:55 -05:00
Alex Deucher bfa99269ea drm/amdgpu: post card after hard reset
Posting is required after a pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:54 -05:00
Alex Deucher a2c5c69825 drm/amdgpu: clean up asic level reset for VI
Drop soft reset, always use pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:54 -05:00
Alex Deucher ceb5bc861e drm/amdgpu: clean up asic level reset for CI
Drop soft reset, always use pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:53 -05:00
Christian König 5907a0d8af drm/amdgpu: cleanup sync_seq handling
Not used any more without semaphores

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:52 -05:00
Christian König 046c12c67b drm/amdgpu: remove sync_to from sync obj v2
Not needed any more without semaphores.

v2: remove unused variables as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:52 -05:00
Alex Deucher ea5e4c8731 drm/amdgpu: remove some more semaphore leftovers
No longer needed since semaphores were removed.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:51 -05:00
Chunming Zhou cadf97b196 drm/amdgpu: clean up non-scheduler code path (v2)
Non-scheduler code is longer supported.

v2: agd: rebased on upstream

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:50 -05:00
Chunming Zhou be86c606b5 drm/amdgpu: cleanup amdgpu_sync_rings V2
No longer needed now that semaphores are gone.

V2: remove the first amdgpu_sync_wait in amdgpu_ib_schedule

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com> (V1)
Reviewed-by: Monk Liu <monk.liu@amd.com> (V2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:50 -05:00
Chunming Zhou 2f4b940033 drm/amdgpu: clean up hw semaphore support in driver
No longer used.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:49 -05:00
Christian König a8480309df drm/amdgpu: try to find BO VAs only for the BOs in the list
The other ones don't have any VAs assigned anyway or are uninteresting to us.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:49 -05:00
Christian König 15486fd20c drm/amdgpu: search only the BO list for VM mappings
Make UVD/VCE VM emulation more efficient.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:48 -05:00
Christian König 1ea863fd73 drm/amdgpu: keep the prefered/allowed domains in the BO
Stop copying that to the bo list entry, it doesn't change anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:47 -05:00
Christian König 636ce25c30 drm/amdgpu: cleanup bo list bucket handling
Move that into the BO list. No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:47 -05:00
Christian König 2a7d9bdabe drm/amdgpu: cleanup amdgpu_cs_parser_relocs
Rename it to amdgpu_cs_parser_bos and move validation and bo list init there.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:46 -05:00
Christian König c3cca41e62 drm/amdgpu: cleanup amdgpu_cs_parser structure
Remove unused user_ptr field, group fields by usage.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:46 -05:00
Christian König 25cfc3c27e drm/amdgpu: group VM mapping tree with its lock (v2)
And also update the comment.

v2: agd: rebase on usptream.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:45 -05:00
Christian König 36409d122c drm/amdgpu: cleanup amdgpu_cs_list_validate
No need to actually check the current placement. Just use the allowed domains
when the threshold is reached.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:45 -05:00
Christian König f69f90a113 drm/amdgpu: fix amdgpu_cs_get_threshold_for_moves handling
The threshold should only be computed once.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:44 -05:00
Dan Carpenter 9e51021cfd drm/amd/powerplay: indent a couple if statements
We recently redid the indenting, but missed these two if statements.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:43 -05:00
Christian König d7006964d4 drm/amdgpu: fix issue with overlapping userptrs
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(),
leading to a possible circular locking dependency.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:43 -05:00
Christian König cc1de6e800 drm/amdgpu: fix issue with overlapping userptrs
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(),
leading to a possible circular locking dependency.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:52 -05:00
Nicolai Hähnle b19763d0d8 drm/amdgpu: remove unnecessary forward declaration
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:38 -05:00
Nicolai Hähnle a8d81b3626 drm/amdgpu: hold reference to fences in amdgpu_sa_bo_new (v2)
An arbitrary amount of time can pass between spin_unlock and
fence_wait_any_timeout, so we need to ensure that nobody frees the
fences from under us.

A stress test (rapidly starting and killing hundreds of glxgears
instances) ran into a deadlock in fence_wait_any_timeout after
about an hour, and this race condition appears to be a plausible
cause.

v2: agd: rebase on upstream

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:31 -05:00
Flora Cui ca19852884 drm/amdgpu: fix s4 resume
No need to re-init asic if it's already been initialized.
Skip IB tests since kernel processes are frozen in thaw.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:13 -05:00
Lukas Wunner 156d7d4120 vga_switcheroo: Add handler flags infrastructure
Allow handlers to declare their capabilities and allow clients to
obtain that information. So far we have these use cases:

* If the handler is able to switch DDC separately, clients need to
  probe EDID with drm_get_edid_switcheroo(). We should allow them
  to detect a capable handler to ensure this function only gets
  called when needed.

* Likewise if the handler is unable to switch AUX separately, the active
  client needs to communicate link training parameters to the inactive
  client, which may then skip the AUX handshake and set up its output
  with these pre-calibrated values (DisplayPort specification v1.1a,
  section 2.5.3.3). Clients need a way to recognize such a situation.

The flags for the radeon_atpx_handler and amdgpu_atpx_handler are
initially set to 0, this can later on be amended with
  handler_flags |= VGA_SWITCHEROO_CAN_SWITCH_DDC;
when a ->switch_ddc callback is added.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
    [MBP  9,1 2012  intel IVB + nvidia GK107  pre-retina  15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/2b0d93ed6e511ca09e95e45e0b35627f330fabce.1452525860.git.lukas@wunner.de
2016-02-09 11:21:07 +01:00
Alex Deucher db5cffcd2b drm/amdgpu/cz: plumb pg flags through to powerplay
Enable vce and uvd pg based on single set of pg flags.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:48 -05:00
Alex Deucher 52b52a8781 drm/amdgpu/tonga: plumb pg flags through to powerplay
Enable vce and uvd pg based on single set of pg flags.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:48 -05:00
Alex Deucher e3b04bc790 drma/dmgpu: move cg and pg flags into shared headers
So they can be used by powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:47 -05:00
Alex Deucher b118af7012 drm/amdgpu: remove unused cg defines
Leftover from radeon.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:47 -05:00
Alex Deucher 08d3340876 drm/amdgpu: add a cgs interface to fetch cg and pg flags
Needed to pass the cg and pg info to powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:46 -05:00
Alex Deucher f997e6f213 drm/amd/powerplay/tonga: disable vce pg
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:46 -05:00
Alex Deucher 3d5afb41f8 drm/amd/powerplay/tonga: disable uvd pg
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:45 -05:00
Alex Deucher 67a0a0fd11 drm/amd/powerplay/cz: disable vce pg
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:45 -05:00
Alex Deucher d4fdc08e25 drm/amd/powerplay/cz: disable uvd pg
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:44 -05:00
Alex Deucher 35e5912d08 drm/amdgpu: be consistent with uvd cg flags
Don't do anything if the uvd cg flags are not set.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:44 -05:00
Alex Deucher 0fd4af9e32 drm/amdgpu: clean up vce pg flags for cz/st
It was already disabled elsewhere, make it offical.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:43 -05:00
Alex Deucher 808a934fd4 drm/amdgpu: handle vce pg flags properly
Don't attempt to start/stop the vce block if pg is disabled.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:43 -05:00
Alex Deucher b6df77fc5c drm/amdgpu: handle uvd pg flags properly
Don't attempt to start/stop the uvd block if pg is disabled.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:42 -05:00
Alex Deucher 50171ebecf drm/amdgpu/dpm/ci: switch over to the common pcie caps interface
We already query this at driver init, so use that info.  Also
handles virtualization cases.

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:42 -05:00
Alex Deucher 76ecb2c75b drm/amdgpu/cik: don't mess with aspm if gpu is root bus
Pcie registers may not be available in a virtualized
environment.

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:41 -05:00
Alex Deucher cd474ba0d6 drm/amdgpu: add pcie cap module parameters (v2)
Allows the user to force the supported pcie gen and lane
config on both the asic and the chipset.
Useful for debugging pcie problems and for virtualization
where we may not be able to query the pcie bridge caps.

Default to:
gen: chipset 1/2, asic 1/2/3
lanes: 1/2/4/8/16

v2: fix bare metal case

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:41 -05:00
Dave Airlie c745884b30 Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
- fix and enable iceland/topaz support
- handle WC on platforms that don't support it

* 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: disable uvd and vce clockgating on Fiji
  drm/amdgpu: remove exp hardware support from iceland
  drm/amdgpu: load MEC ucode manually on iceland
  drm/amdgpu: don't load MEC2 on topaz
  drm/amdgpu: drop topaz support from gmc8 module
  drm/amdgpu: pull topaz gmc bits into gmc_v7
  drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above
  drm/amdgpu: iceland use CI based MC IP
  drm/amdgpu: move gmc7 support out of CIK dependency
  drm/amdgpu/gfx7: enable cp inst/reg error interrupts
  drm/amdgpu/gfx8: enable cp inst/reg error interrupts
  drm/amdgpu: mask out WC from BO on unsupported arches
  drm/radeon: mask out WC from BO on unsupported arches
  drm: add helper to check for wc memory support
  drm/amdgpu: no need to load MC firmware on fiji
2016-02-05 14:48:36 +10:00
Dave Airlie ec71f1284a Merge tag 'drm-amdkfd-fixes-2016-01-28' of git://people.freedesktop.org/~gabbayo/linux into drm-fixes
two static checker fixes.

* tag 'drm-amdkfd-fixes-2016-01-28' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: Remove unnecessary cast in kfree
  drm/amdgpu: fix non-ANSI declaration of amdgpu_amdkfd_gfx_*_get_functions()
2016-02-05 14:47:24 +10:00
Alex Deucher 6357b75a5c drm/amdgpu: disable uvd and vce clockgating on Fiji
Doesn't work properly yet.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-03 13:49:51 -05:00
Alex Deucher dba280b20b drm/amdgpu: remove exp hardware support from iceland
It's working now.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=92270

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:39 -05:00
Alex Deucher 951e09624a drm/amdgpu: load MEC ucode manually on iceland
The smc doesn't handle it.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:32 -05:00
Alex Deucher 97dde76a30 drm/amdgpu: don't load MEC2 on topaz
Not validated.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:25 -05:00
Alex Deucher 8878d8548a drm/amdgpu: drop topaz support from gmc8 module
topaz is actually gmc7.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:18 -05:00
Alex Deucher 72b459c8f7 drm/amdgpu: pull topaz gmc bits into gmc_v7
Add the topaz golden settings into the gmc7 module.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:12 -05:00
Ken Wang 8f3c162961 drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:11 -05:00
Ken Wang 429c45deae drm/amdgpu: iceland use CI based MC IP
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:10 -05:00
Alex Deucher e42d852616 drm/amdgpu: move gmc7 support out of CIK dependency
It's used by iceland which is VI.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:52:48 -05:00
Alex Deucher ef720532ec drm/amdgpu/gfx7: enable cp inst/reg error interrupts
Enable CP register/instruction error interrupts. Useful
for debugging command stream problems.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02 16:26:10 -05:00
Alex Deucher 1d22a454ec drm/amdgpu/gfx8: enable cp inst/reg error interrupts
Enable CP register/instruction error interrupts. Useful
for debugging command stream problems.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02 16:25:40 -05:00
Oded Gabbay a187f17f0e drm/amdgpu: mask out WC from BO on unsupported arches
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 10:09:11 -05:00
Alex Deucher ad32152eb2 drm/amdgpu: no need to load MC firmware on fiji
Vbios does this for us on asic_init.

Reviewed-by: Ken Wang >Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-29 11:10:40 -05:00
Dave Airlie 55ce625fc5 Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Misc radeon and amdgpu fixes:
- SMU firmware loading fix for Stoney
- DP audio fixes for DCE4.1
- Don't expose fbdev device if no connectors
- fix page table LRU list update handling

* 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: only move pt bos in LRU list on success
  drm/radeon: fix DP audio support for APU with DCE4.1 display engine
  drm/radeon: Add a common function for DFS handling
  drm/radeon: cleaned up VCO output settings for DP audio
  drm/amd/powerplay: Update SMU firmware loading for Stoney
  drm/amdgpu: don't init fbdev if we don't have any connectors
  drm/radeon: only init fbdev if we have connectors
  drm/radeon: Ensure radeon bo is unreserved in radeon_gem_va_ioctl
  drm/amdgpu: fix next_rptr handling for debugfs
  drm/radeon: properly byte swap vce firmware setup
  drm/amdgpu: add a message to indicate when powerplay is enabled (v2)
  drm/amdgpu: fix amdgpu_bo_pin_restricted VRAM placing v2
  drm/amd/amdgpu: Improve amdgpu_dpm* macros to avoid unexpected result (v2)
  drm/amdgpu: Allow the driver to load if amdgpu.powerplay=1 on asics without powerplay support
  drm/amdgpu: Use drm_calloc_large for VM page_tables array
  drm/amdgpu: Add some tweaks to gfx 8 soft reset
  drm/amdgpu: fix tonga smu resume
2016-01-29 10:00:45 +10:00
Nicolai Hähnle 28b8d66e0c drm/amdgpu: only move pt bos in LRU list on success
This fixes a race condition in the error case: since the pt bos have not
necessarily been reserved in case of an error, we could move a pt bo that
is currently in the middle of being evicted/moved by another process,
which then resulted in a BUG_ON in ttm_bo_add_to_lru.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-28 11:46:45 -05:00
Amitoj Kaur Chawla 642f0f2a15 drm/amdkfd: Remove unnecessary cast in kfree
Remove an unnecassary cast in the argument to kfree.

Found using Coccinelle. The semantic patch used to find this is as follows:

//<smpl>
@@
type T;
expression *f;
@@

- kfree((T *)(f));
+ kfree(f);
//</smpl>

Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2016-01-28 14:40:11 +02:00
Colin Ian King f785d98711 drm/amdgpu: fix non-ANSI declaration of amdgpu_amdkfd_gfx_*_get_functions()
amdgpu_amdkfd_gfx_7_get_functions and amdgpu_amdkfd_gfx_8_0_get_functions
have no parameters, so use the normal void parameter convention to make
them  match their prototypes in the header file
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2016-01-28 14:39:34 +02:00
Rex Zhu 08b21d30c6 drm/amd/powerplay: Update SMU firmware loading for Stoney
Fix firmware init on Stoney when powerplay is enabled.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-27 11:40:38 -05:00
Alex Deucher f49d45c973 drm/amdgpu: don't init fbdev if we don't have any connectors
Don't init fbdev if we don't have connectors.  E.g., if you have
a PX laptop with the displays attached to an IGP with no driver
support, you may end up with a blank screen rather than falling
back to vesa, etc.

Based on a similar radeon patch from Rob Clark.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-26 00:35:56 -05:00
Christian König 41f2d99056 drm/amdgpu: fix next_rptr handling for debugfs
That somehow got lost.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-22 14:44:08 -05:00
Alex Deucher 9441f964f8 drm/amdgpu: add a message to indicate when powerplay is enabled (v2)
Makes it clear to the user which power management path is in
use.

v2: make consistent with dpm

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-22 10:49:42 -05:00
Christian König 78d0e182b6 drm/amdgpu: fix amdgpu_bo_pin_restricted VRAM placing v2
We could pin BOs into invisible VRAM otherwise.

v2: make logic more readable as suggested by Michel

Cc: stable@vger.kernel.org
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-01-22 10:47:48 -05:00
Eric Huang 4b5ece24ce drm/amd/amdgpu: Improve amdgpu_dpm* macros to avoid unexpected result (v2)
The two macros returns are values which probably are used
in the expression of calculation. Without the brackets
the result of the expression may be wrong.

v2: agd: squash both patches together

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2016-01-22 10:47:48 -05:00
Jordan Lazare 3466904d38 drm/amdgpu: Allow the driver to load if amdgpu.powerplay=1 on asics without powerplay support
Avoid setting pp_enabled if there is no powerplay implementation.

Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-19 12:42:30 -05:00
Michel Dänzer 9571e1d840 drm/amdgpu: Use drm_calloc_large for VM page_tables array
It can be big, depending on the VM address space size, which is tunable
via the vm_size module parameter.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93721
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-19 12:25:09 -05:00
Linus Torvalds 984065055e Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "This is the main drm pull request for 4.5.  I don't think I've missed
  anything too major, I'm mostly back at work now but I'll probably get
  some sleep in 5 years time.

  Summary:

  New drivers:
   - etnaviv:

     GPU driver for the 3D core on the Vivante core used in numerous
     ARM boards.

  Highlights:

  Core:
   - Atomic suspend/resume helpers
   - Move the headers to using userspace friendlier types.
   - Documentation updates
   - Lots of struct_mutex removal.
   - Bunch of DP MST fixes from AMD.

  Panel:
   - More DSI helpers
   - Support for some new basic panels

  i915:
   - Basic Kabylake support
   - DP link training and detect code refactoring
   - fbc/psr fixes
   - FIFO underrun fixes
   - SDE interrupt handling fixes
   - dma-buf/fence support in pageflip path.
   - GPU side for MST audio support

  radeon/amdgpu:
   - Drop UMS support
   - GPUVM/Scheduler optimisations
   - Initial Powerplay support for Tonga/Fiji/CZ/ST
   - ACP audio prerequisites

  nouveau:
   - GK20a instmem improvements
   - PCIE link speed change support

  msm:
   - DSI support for msm8960/apq8064

  tegra:
   - Host1X support for Tegra210 SoC

  vc4:
   - 3D acceleration support

  armada:
   - Get rid of struct mutex

  tda998x:
   - Atomic modesetting support
   - TMDS clock limitations

  omapdrm:
   - Atomic modesetting support
   - improved TILER performance

  rockchip:
   - RK3036 VOP support
   - Atomic modesetting support
   - Synopsys DW MIPI DSI support

  exynos:
   - Runtime PM support
   - of_graph binding for DP panels
   - Cleanup of IPP code
   - Configurable plane support
   - Kernel panic fixes at release time"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (711 commits)
  drm/fb_cma_helper: Remove implicit call to disable_unused_functions
  drm/amdgpu: add missing irq.h include
  drm/vmwgfx: Fix a width / pitch mismatch on framebuffer updates
  drm/vmwgfx: Fix an incorrect lock check
  drm: nouveau: fix nouveau_debugfs_init prototype
  drm/nouveau/pci: fix check in nvkm_pcie_set_link
  drm/amdgpu: validate duplicates first
  drm/amdgpu: move VM page tables to the LRU end on CS v2
  drm/ttm: add ttm_bo_move_to_lru_tail function v2
  drm/ttm: fix adding foreign BOs to the swap LRU
  drm/ttm: fix adding foreign BOs to the LRU during init v2
  drm/radeon: use kobj_to_dev()
  drm/amdgpu: use kobj_to_dev()
  drm/amdgpu/cz: force vce clocks when sclks are forced
  drm/amdgpu/cz: force uvd clocks when sclks are forced
  drm/amdgpu/cz: add code to enable forcing VCE clocks
  drm/amdgpu/cz: add code to enable forcing UVD clocks
  drm/amdgpu: fix lost sync_to if scheduler is enabled.
  drm/amd/powerplay: fix static checker warning for return meaningless value.
  drm/sysfs: use kobj_to_dev()
  ...
2016-01-17 13:40:25 -08:00
Linus Torvalds a016af2e70 sound updates for 4.5-rc1
We've had quite busy weeks in this cycle.  Looking at ALSA core, the
 significant changes are a few fixes wrt timer and sequencer ioctls
 that have been revealed by fuzzer recently.  Other than that, ASoC
 core got a few updates about DAI link handling, but these are rather
 straightforward refactoring.
 
 In drivers scene, ASoC received quite lots of new drivers in addition
 to bunch of updates for still ongoing Intel Skylake support and
 topology API.  HD-audio gained a new HDMI/DP hotplug notification via
 component.  FireWire got a pile of code refactoring/updates with
 SCS.1x driver integration.
 
 More highlights are shown below.
 
 [NOTE: this contains also many commits for DRM.  This is due to the
  pull of drm stable branch into sound tree, as the base of i915 audio
  component work for HD-audio.  The highlights below don't contain
  these DRM changes, as these are supposed to be pulled via drm tree in
  anyway sooner or later.]
 
 Core
  - Handful fixes to harden ALSA timer and sequencer ioctls against
    races reported by syzkaller fuzzer
  - Irq description string can be unique to each card; only for
    HD-audio for now
 
 ASoC
  - Conversion of the array of DAI links to a list for supporting
    dynamically adding and removing DAI links
  - Topology API enhancements to make everything more component based
    and being able to specify PCM links via topology
  - Some more fixes for the topology code, though it is still not final
    and ready for enabling in production; we really need to get to the
    point where that can be done
  - A pile of changes for Intel SkyLake drivers which hopefully deliver
    some useful initial functionality for systems with this chipset,
    though there is more work still to come
  - Lots of new features and cleanups for the Renesas drivers
  - ANC support for WM5110
  - New drivers: Imagination Technologies IPs, Atmel class D speaker,
    Cirrus CS47L24 and WM1831, Dialog DA7128, Realtek RT5659 and
    RT56156, Rockchip RK3036, TI PC3168A, and AMD ACP
  - Rename PCM1792a driver to be generic pcm179x
 
 HD-Audio
  - Use audio component for i915 HDMI/DP hotplug handling
  - On-demand binding with i915 driver
  - bdl_pos_adj parameter adjustment for Baytrail controllers
  - Enable power_save_node for CX20722; this shouldn't lead to
    regression, hopefully
  - Kabylake HDMI/DP codec support
  - Quirks for Lenovo E50-80, Dell Latitude E-series, and other Dell
    machines
  - A few code refactoring
 
 FireWire
  - Lots of code cleanup and refactoring
  - Integrate the support of SCS.1x devices into snd-oxfw driver;
    snd-scs1x driver is obsoleted
 
 USB-audio
  - Fix possible NULL dereference at disconnection
  - A regression fix for Native Instruments devices
 
 Misc
  - A few code cleanups of fm801 driver
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Merge tag 'sound-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "We've had quite busy weeks in this cycle.  Looking at ALSA core, the
  significant changes are a few fixes wrt timer and sequencer ioctls
  that have been revealed by fuzzer recently.  Other than that, ASoC
  core got a few updates about DAI link handling, but these are rather
  straightforward refactoring.

  In drivers scene, ASoC received quite lots of new drivers in addition
  to bunch of updates for still ongoing Intel Skylake support and
  topology API.  HD-audio gained a new HDMI/DP hotplug notification via
  component.  FireWire got a pile of code refactoring/updates with
  SCS.1x driver integration.

  More highlights are shown below.

  [ NOTE: this contains also many commits for DRM.  This is due to the
    pull of drm stable branch into sound tree, as the base of i915 audio
    component work for HD-audio.  The highlights below don't contain
    these DRM changes, as these are supposed to be pulled via drm tree
    in anyway sooner or later.  ]

  Core:
   - Handful fixes to harden ALSA timer and sequencer ioctls against
     races reported by syzkaller fuzzer
   - Irq description string can be unique to each card; only for
     HD-audio for now

  ASoC:
   - Conversion of the array of DAI links to a list for supporting
     dynamically adding and removing DAI links
   - Topology API enhancements to make everything more component based
     and being able to specify PCM links via topology
   - Some more fixes for the topology code, though it is still not final
     and ready for enabling in production; we really need to get to the
     point where that can be done
   - A pile of changes for Intel SkyLake drivers which hopefully deliver
     some useful initial functionality for systems with this chipset,
     though there is more work still to come
   - Lots of new features and cleanups for the Renesas drivers
   - ANC support for WM5110
   - New drivers: Imagination Technologies IPs, Atmel class D speaker,
     Cirrus CS47L24 and WM1831, Dialog DA7128, Realtek RT5659 and
     RT56156, Rockchip RK3036, TI PC3168A, and AMD ACP
   - Rename PCM1792a driver to be generic pcm179x

  HD-Audio:
   - Use audio component for i915 HDMI/DP hotplug handling
   - On-demand binding with i915 driver
   - bdl_pos_adj parameter adjustment for Baytrail controllers
   - Enable power_save_node for CX20722; this shouldn't lead to
     regression, hopefully
   - Kabylake HDMI/DP codec support
   - Quirks for Lenovo E50-80, Dell Latitude E-series, and other Dell
     machines
   - A few code refactoring

  FireWire:
   - Lots of code cleanup and refactoring
   - Integrate the support of SCS.1x devices into snd-oxfw driver;
     snd-scs1x driver is obsoleted

  USB-audio:
   - Fix possible NULL dereference at disconnection
   - A regression fix for Native Instruments devices

  Misc:
   - A few code cleanups of fm801 driver"

* tag 'sound-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (722 commits)
  ALSA: timer: Code cleanup
  ALSA: timer: Harden slave timer list handling
  ALSA: hda - Add fixup for Dell Latitidue E6540
  ALSA: timer: Fix race among timer ioctls
  ALSA: hda - add codec support for Kabylake display audio codec
  ALSA: timer: Fix double unlink of active_list
  ALSA: usb-audio: Fix mixer ctl regression of Native Instrument devices
  ALSA: hda - fix the headset mic detection problem for a Dell laptop
  ALSA: hda - Fix white noise on Dell Latitude E5550
  ALSA: hda_intel: add card number to irq description
  ALSA: seq: Fix race at timer setup and close
  ALSA: seq: Fix missing NULL check at remove_events ioctl
  ALSA: usb-audio: Avoid calling usb_autopm_put_interface() at disconnect
  ASoC: hdac_hdmi: remove unused hdac_hdmi_query_pin_connlist
  ASoC: AMD: Add missing include file
  ALSA: hda - Fixup inverted internal mic for Lenovo E50-80
  ALSA: usb: Add native DSD support for Oppo HA-1
  ASoC: Make aux_dev more like a generic component
  ASoC: bcm2835: cleanup includes by ordering them alphabetically
  ASoC: AMD: Manage ACP 2.x SRAM banks power
  ...
2016-01-17 12:05:31 -08:00
Borislav Petkov 39c01bf933 amdkfd: Copy from the proper user command pointer
8f1d57c172 ("amdkfd: don't open-code memdup_user()") mistakenly uses
an uninitialized local pointer, gcc complains:

  drivers/gpu/drm/amd/amdkfd/kfd_chardev.c: In function ‘kfd_ioctl_dbg_address_watch’:
  drivers/gpu/drm/amd/amdkfd/kfd_chardev.c:562:12: warning: ‘args_buff’ may be used uninitialized in this function [-Wmaybe-uninitialized]
    args_buff = memdup_user(args_buff,
                ^

Fix it.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2016-01-15 15:14:17 -05:00
Alex Deucher 7776a69386 drm/amdgpu: Add some tweaks to gfx 8 soft reset
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-15 12:43:22 -05:00
Alex Deucher e160e4db83 drm/amdgpu: fix tonga smu resume
Need to make sure smu buffers are pinned on resume.  This
matches what Fiji does.

Cc: stable@vger.kernel.org
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-15 12:43:11 -05:00
Dave Airlie e9c5e7402d drm/amdgpu: add missing irq.h include
this fixes the build on arm.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-01-14 08:07:55 +10:00
Dave Airlie 6cfd777584 Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more misc things for radeon and amdgpu for 4.5:
- TTM fixes for imported buffers
- amdgpu fixes to avoid -ENOMEM in CS ioctl
- CZ UVD and VCE clock force options for debugging video issues
- A couple of ACP prerequisites
- Misc fixes

* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: validate duplicates first
  drm/amdgpu: move VM page tables to the LRU end on CS v2
  drm/ttm: add ttm_bo_move_to_lru_tail function v2
  drm/ttm: fix adding foreign BOs to the swap LRU
  drm/ttm: fix adding foreign BOs to the LRU during init v2
  drm/radeon: use kobj_to_dev()
  drm/amdgpu: use kobj_to_dev()
  drm/amdgpu/cz: force vce clocks when sclks are forced
  drm/amdgpu/cz: force uvd clocks when sclks are forced
  drm/amdgpu/cz: add code to enable forcing VCE clocks
  drm/amdgpu/cz: add code to enable forcing UVD clocks
  drm/amdgpu: fix lost sync_to if scheduler is enabled.
  drm/amd/powerplay: fix static checker warning for return meaningless value.
  drm/amdgpu: add irq domain support
  drm/amdgpu/cgs: add an interface to access PCI resources
2016-01-14 07:56:07 +10:00
Christian König d8e0cae645 drm/amdgpu: validate duplicates first
Most VM BOs end up in the duplicates list, validate it
first make -ENOMEM less likely.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:22:59 -05:00
Christian König eceb8a1562 drm/amdgpu: move VM page tables to the LRU end on CS v2
This makes it less likely to run into an ENOMEM because
VM page tables are evicted last.

v2: move the BOs in the LRU tail after validation

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:22:17 -05:00
Geliang Tang cc29ec874b drm/amdgpu: use kobj_to_dev()
Use kobj_to_dev() instead of open-coding it.

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:14:59 -05:00
Alex Deucher 403664bbf8 drm/amdgpu/cz: force vce clocks when sclks are forced
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:13:33 -05:00
Alex Deucher 5f57642672 drm/amdgpu/cz: force uvd clocks when sclks are forced
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:13:26 -05:00
Alex Deucher 044c0629b5 drm/amdgpu/cz: add code to enable forcing VCE clocks
VCE DPM works similarly to SCLK DPM.  Add a similar interface
for VCE for forcing the VCE clocks.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:12:43 -05:00
Alex Deucher d83b1e8132 drm/amdgpu/cz: add code to enable forcing UVD clocks
UVD DPM works similarly to SCLK DPM.  Add a similar interface
for UVD for forcing the UVD clocks.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:11:30 -05:00
Chunming Zhou 888c9e33e4 drm/amdgpu: fix lost sync_to if scheduler is enabled.
when scheduler is enabled, the semaphore isn't used at all.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2016-01-13 11:39:15 -05:00
Rex Zhu f3b5cb3e68 drm/amd/powerplay: fix static checker warning for return meaningless value.
The return value should be either negative or zero, no positive.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 11:38:42 -05:00
Stephen Rothwell 8a0d560f3e drm/amdgpu/powerplay: include asm/div64.h for do_div()
Fixes: 1e4854e96c ("drm/amdgpu/powerplay: implement thermal control for tonga.")
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-01-12 09:29:25 +10:00
Alex Deucher 5f2323658e drm/amdgpu: add irq domain support
Hardware blocks on the GPU like ACP generate interrupts in
the GPU interrupt controller, but are driven by a separate
driver.  Add an irq domain to the GPU driver so that
blocks like ACP can register a Linux interrupt.

Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11 09:52:57 -05:00
Alex Deucher ba228ac8f5 drm/amdgpu/cgs: add an interface to access PCI resources
This provides an interface to get access to the base address
of PCI resources (MMIO, DOORBELL, etc.).  Only MMIO and
DOORBELL are implemented right now.  This is necessary to
properly utilize shared drivers on platform devices.  IP
modules can use this interface to get the base address
of the resource and add any additional offset and set the
size when setting up the platform driver(s).

Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11 09:52:43 -05:00
Christian König 191caba6cc drm/amdgpu: add warning to amdgpu_bo_gpu_offset() v2
Check if there really is a valid offset for the BO.

v2: user WARN_ON_ONCE

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:28 -05:00
Rex Zhu 4d42fa492e drm/amd/powerplay: implement power down asic task for CZ
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:27 -05:00
Rex Zhu e1d32e607b drm/amd/powerplay: enable power down asic task. (v2)
v2: AGD: rebase on upstream

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:27 -05:00
Rex Zhu 018462d015 drm/amd/powerplay: enable set boot state task
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:26 -05:00
Rex Zhu f556c2744a drm/amd/powerplay: add thermal control task when resume.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:26 -05:00
Rex Zhu ab4f4b14c3 drm/amdgpu: fix hex/decimal bug when show gpu load.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:25 -05:00
Rex Zhu 0cfd9f2697 drm/amdgpu: Show gpu load when display gpu performance for Fiji of VI.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:25 -05:00
Rex Zhu 9354573d76 drm/amdgpu: Show gpu load when display gpu performance for Ci.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:24 -05:00
Rex Zhu e0b71a7eff drm/amd/powerplay: Reload and initialize the smc firmware on powerplay resume.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:24 -05:00
Rex Zhu a969e163a4 drm/amd/powerplay: add powerplay valid check to avoid null point. (v2)
In case CONFIG_DRM_AMD_POWERPLAY is defined and amdgpu.powerplay=0.
some functions in powrplay can also be called by DAL. and the input parameter is *adev.
if just check point not NULL was not enough and will lead to NULL point error.

V2: AGD: rebase on upstream

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:23 -05:00
Rex Zhu c15c8d7020 drm/amd/powerplay: fix Smatch static checker warnings
1. return -1 instead of -ENOMEM
2. The struct type mismatch warnings.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:23 -05:00
Rex Zhu 75ac63dbc3 drm/amd/powerplay: fix Smatch static checker warnings with indenting (v2)
v2: AGD: rebase on upstream

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:22 -05:00
Rex Zhu 53d3de140b drm/amd/powerplay: fix bug that NULL checks are reversed.
&& was used instead of ||.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:22 -05:00
Takashi Iwai 9d9938854e Merge branch 'for-linus' into for-next
Conflicts:
	drivers/gpu/drm/i915/intel_display.c
	sound/soc/intel/skylake/skl.h
2016-01-06 21:14:35 +01:00
Al Viro 8f1d57c172 amdkfd: don't open-code memdup_user()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2016-01-06 08:25:25 -05:00
Tom St Denis 15c3277ff6 amdgpu/dce11: Add test for crtc < 0 to various DCEv11 functions
To be consistent with other DCE11 functions test for crtc < 0.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:21:14 -05:00
Tom St Denis 9e4e1ae82f amdgpu/dce11: Remove division from dce_v11_0_vblank_wait()
Mimics odd behaviour where (i++ % 100 == 0) is true in the first iteration of each loop...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:21:03 -05:00
Tom St Denis 691ca86a3a amdgpu/vce3: Simplify vce_v3_0_hw_init and ensure both rings default to not ready.
Simplified the ring test and added logic to ensure rings are marked not ready
by default.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:54 -05:00
Tom St Denis 74af12762d amdgpu/vce3: Remove magic constants from harvest register masks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:20:42 -05:00
Tom St Denis 81da2edef9 amdgpu/vce3: Simplify vce_v3_0_process_interrupt()
Fold two cases into one for a LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:33 -05:00
Tom St Denis af18b0f7fb amdgpu/vce3: Simplify vce_v3_0_soft_reset()
LOC reduction and simplification.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:24 -05:00
Tom St Denis 92988e604b amdgpu/vce3: Simplify idle and wait for idle code
More LOC reductions in VCE3 code.  This patch simplifies the is_idle and
wait_for_idle logic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:13 -05:00
Tom St Denis 1dab5f067e amdgpu/vce3: Cleanup harvest config function.
Basic LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:04 -05:00
Chunming Zhou e1de741529 drm/amdgpu: fix NULL in vm_grab_id while S3 back
vm_manager_fini shouldn't be in suspend phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
2016-01-04 17:17:49 -05:00
Dan Carpenter 7c9574f262 drm/amd/powerplay: precedence bug in init_non_clock_fields()
The cast to uint8_t happens before the right shift so this always sets
.m3arb to zero.  The cast is actually a no-op so we can remove it.

Fixes: 3bace35914 ('drm/amd/powerplay: add hardware manager sub-component')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:21:44 -05:00
Dan Carpenter b92c26d180 drm/amdgpu/cgs: cleanup some indenting
This code is indented too far.  Also we normally use spaces to align if
statement conditions.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:18:36 -05:00
Dan Carpenter 2500a3c9e0 drm/amd/powerplay: fix a reversed condition
This test was reversed so it would end up leading to a NULL dereference.

Fixes: 4630f0faae ('drm/amd/powerplay: add Carrizo smu support')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:16:59 -05:00
Arnd Bergmann 6a53b31349 drm: powerplay: use div64_s64 instead of do_div
The newly added code for Fiji creates a correct compiler warning
about invalid use of the do_div macro:

In file included from powerplay/hwmgr/ppatomctrl.c:31:0:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h: In function 'fDivide':
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h:382:89: warning: comparison of distinct pointer types lacks a cast
     do_div(longlongX, longlongY); /*Q(32,32) divided by Q(16,16) = Q(16,16) Back to original format */

do_div() divides an unsigned 64-bit number by an unsigned 32-bit number.
The code instead wants to divide two signed 64-bit numbers, which is done
using the div64_s64 function.

Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 770911a3cf ("drm/amd/powerplay: add/update headers for Fiji SMU and DPM")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 10:36:58 -05:00
Dave Airlie 20f8e032e6 Backmerge drm-fixes merge into Linus's tree into drm-next.
This merges '5b726e06d6e8309e5c9ef4109a32caf27c71dfc8' into drm-next

Just to resolve some merges to make Daniel's life easier.

Signed-off-by: DAve Airlie <airlied@redhat.com>
2015-12-24 08:08:47 +10:00
Takashi Iwai 59c8231089 Merge branch 'for-linus' into for-next
Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
2015-12-23 08:33:34 +01:00
Dave Airlie fd3e14ffbd Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next
[airlied: fixup build problems on arm - added errno.h include]
* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (152 commits)
  amd/powerplay: fix copy paste typo in hardwaremanager.c
  amd/powerplay: disable powerplay by default initially
  amd/powerplay: don't enable ucode fan control if vbios has no fan table
  drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
  drm/amd/powerplay: check whether need to enable thermal control. (v2)
  drm/amd/powerplay: add point check to avoid NULL point hang.
  drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
  drm/amd/powerplay: Don't return an error if fan table is missing
  drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
  drm/powerplay: add debugging output to processpptables.c
  drm/powerplay: add debugging output to tonga_processpptables.c
  amd/powerplay: Add structures required to report configuration change
  amd/powerplay: Fix get dal power level
  amd\powerplay Implement get dal power level
  drm/amd/powerplay: display gpu load when print performance for tonga.
  drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
  drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
  drm/amd/powerplay: check whether enable dpm in powerplay.
  drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
  drm/amd/powerplay: fix boolreturn.cocci warnings
  ...
2015-12-23 14:15:26 +10:00
Alex Deucher eafbbd9883 amd/powerplay: fix copy paste typo in hardwaremanager.c
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 17:13:05 -05:00
Alex Deucher 53d8eabe3d amd/powerplay: disable powerplay by default initially
Hopefully we can enable this by default once we get more
upstream feedback on stability, etc.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 17:07:40 -05:00
Alex Deucher 45b0cf54bc amd/powerplay: don't enable ucode fan control if vbios has no fan table
Some systems have a single fan controlled by ACPI or some other
method.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:58 -05:00
Rex Zhu 605ed21929 drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
Show GPU load in in the debugfs output.

v2: integrate Tom's optimization

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:58 -05:00
Rex Zhu cae9b9c81b drm/amd/powerplay: check whether need to enable thermal control. (v2)
In I+A platform(skylake), it is controlled by intel.

v2: integrate Tom's fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:57 -05:00
Rex Zhu 88b8dcbe21 drm/amd/powerplay: add point check to avoid NULL point hang.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:57 -05:00
David Rokhvarg c90e5d20fc drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
This replaces programming of a hardcoded value.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:56 -05:00
Alex Deucher 283b1a8bfb drm/amd/powerplay: Don't return an error if fan table is missing
It's a valid configuration on some laptops.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:56 -05:00
Alex Deucher aa22ae4b1f drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
Helpful in debugging init issues.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:55 -05:00
Alex Deucher a71e06d972 drm/powerplay: add debugging output to processpptables.c
To help track down init errors.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:55 -05:00
Alex Deucher 1d5498c23e drm/powerplay: add debugging output to tonga_processpptables.c
To help track down init errors.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:54 -05:00
Eric Yang 14f634110f amd/powerplay: Add structures required to report configuration change
Add required structures for amd_powerplay_display_configuration_change

Signed-off-by: Eric Yang <eric.yang2@amd.com>
2015-12-21 16:42:54 -05:00
Vitaly Prosyak 1c9a90820b amd/powerplay: Fix get dal power level
Simplify data struct for get dal power level

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2015-12-21 16:42:53 -05:00
Vitaly Prosyak c4dd206be1 amd\powerplay Implement get dal power level
Implement get dal power level and simple clock info

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2015-12-21 16:42:52 -05:00
Rex Zhu 9c5f8de6ef drm/amd/powerplay: display gpu load when print performance for tonga.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:52 -05:00
Alex Deucher 898b1dead9 drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
To avoid users accessing them before the module has finished
initializing them and make sure they are only created if
dpm has properly initialized.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:51 -05:00
Rex Zhu 17c00a2fed drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
v2: agd: rebase on upstream

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:51 -05:00
Rex Zhu 1ea6c1e8e4 drm/amd/powerplay: check whether enable dpm in powerplay.
Change-Id: I0a2dbf8ef7d4a3e9788fe211fc5964dd2487c519
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:50 -05:00
Rex Zhu 7ad4e7f093 drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
in dpm module, sysfs init func move to late_init from sw_init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Change-Id: Ice4a73212d8e3106d05f04a27043820ffd32929e
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:50 -05:00
kbuild test robot 195567e99b drm/amd/powerplay: fix boolreturn.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:475:10-11: WARNING: return of 0/1 in function 'atomctrl_lookup_gpio_pin' with return type bool

 Return statements in functions returning bool should use
 true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci

CC: yanyang1 <young.yang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:49 -05:00
Eric Huang db18ce397c drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:49 -05:00
Eric Huang 9dcfc1936a drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Tonga.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:48 -05:00
Eric Huang 7ae0a66134 drm/amd/powerplay: Fix a bug in fan control setting default mode for Tonga and Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:48 -05:00
Eric Huang 601038142f drm/amd/powerplay: Add thermal protection support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:47 -05:00
Eric Huang ea617bc9f9 drm/amd/powerplay: add display configeration changed function in hwmgr for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:47 -05:00
Qiang Yu bd90dd89e5 drm/amdgpu: Prepare DKMS build for powerplay module.
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang 0bbb817618 drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang 0689a57013 drm/amd/amdgpu: add vce3.0 clock gating support. (v2)
v2: fix grbm locking

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang 9b08a30647 drm/amd/amdgpu: add uvd6.0 clock gating support. (v2)
v2: fix bug in register mask setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang 91c4c98155 drm/amd/powerplay: add multimedia power gating support for Fiji.
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou b57fd5663e drm/amdgpu: rename fiji_smumgr.h to fiji_smum.h
This conflicts with fiji_smumgr.h from powerplay
in DKMS environment

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou dbd29f0d85 drm/amdgpu: rename tonga_smumgr.h to tonga_smum.h
This conflicts with the tonga_smumgr.h from powerplay
in DKMS environement

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:43 -05:00
David Rokhvarg 6bd48d2404 drm/amd/powerplay: Add PPLib debug print macro.
- The macro is silent by default.
- Use the macro to print Display Configuration - related changes.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu 0f8b106e11 drm/amd/powerplay: enable/disable NB pstate feature for Carrizo.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu 73afe62101 drm/amd/powerplay: enable set_cpu_power_state task. (v2)
v2: integrate Jammy's crash fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Rex Zhu 7fb72a1fc0 drm/amd/powerplay: export interface to DAL to init/change display configuration.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Rex Zhu aceae1bfd9 drm/amd/powerplay: add smc msg for NB P-State switch
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:40 -05:00
Rex Zhu 73c9f22288 drm/amd/powerplay: add new function point in hwmgr.
1. for set_cpu_power_state
2. restore display configuration

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:40 -05:00
Tom St Denis 9c97e75f0f amdgpu/powerplay: Add Stoney to list of early init cases
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
Rex Zhu c9fe74e68b drm/amd/powerplay: fix warning of cast to pointer from integer of different size.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
rezhu 09b7a98622 drm/amd/powerplay: fix warning of cast to pointer from integer of different size.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Alex Deucher 9c0bad9074 drm/amd/powerplay: implement smc state upload for CZ
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Alex Deucher d39d5c2c9d drm/amd/powerplay: add atomctrl function to calculate CZ sclk dividers
Use atombios to calculate the values.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:37 -05:00
Eric Huang 92b05d827d drm/amd/powerplay: enable clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:37 -05:00
Eric Huang 6cec2655fa drm/amd/powerplay: add parts of system clock gating support for Fiji. (v2)
Removed fiji_mgcg_cgcg_init that is affected and redundant for new implementation.

v2: re-add mgcg_cgcg init

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang 3c997d2412 drm/amdgpu: add sdma clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang a0d69786b5 drm/amd/amdgpu: add gmc clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Eric Huang 6e378858df drm/amd/amdgpu: add gfx clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Alex Deucher 0104aa21a9 drm/amd/powerplay/tonga: Add UVD DPM init
Load the UVD DPM state into the SMC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:34 -05:00
kbuild test robot 62a03f6d58 drm/amd/powerplay: fix boolreturn.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2653:9-10: WARNING: return of 0/1 in function 'is_pcie_gen2_supported' with return type bool
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2645:9-10: WARNING: return of 0/1 in function 'is_pcie_gen3_supported' with return type bool

 Return statements in functions returning bool should use
 true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci

CC: yanyang1 <young.yang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:34 -05:00
Alex Deucher 464cea3e35 drm/amdgpu/powerplay/fiji: query supported pcie info from cgs (v2)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:33 -05:00
Alex Deucher 834b694cc3 drm/amdgpu/powerplay/tonga: query supported pcie info from cgs (v2)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:33 -05:00
Alex Deucher cfd316d59e drm/amdgpu/cgs: add sys info query for pcie gen and link width
Needed by powerplay to properly handle pcie dpm switching.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher d0dd7f0cc3 drm/amdgpu: store pcie gen mask and link width
We'll need this later for pcie dpm.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher 16881da6c0 drm/amdgpu: extract pcie helpers to common header
These will be used by multiple powerplay drivers and
other IP modules.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:30 -05:00
Alex Deucher 74c577b031 drm/amd/powerplay/fiji: enable pcie and mclk forcing for low
When forcing the lowest state also force mclk and pcie.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:30 -05:00
Alex Deucher 9fe1837d18 drm/amd/powerplay/tonga: enable pcie and mclk forcing for low
When forcing the lowest state also force mclk and pcie.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:29 -05:00
Rex Zhu f4caf3e584 drm/amd/powerplay: refine the logic of whether need to update power state.
Better handle power state changes.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:29 -05:00
Rex Zhu e829ecdb15 drm/amd/powerplay: implement new funcs to check current states for tonga.
Implement the new callbacks for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:28 -05:00
Rex Zhu 09b4c872fe drm/amd/powerplay: add and export hwmgr interface to eventmgr to check hw states.
Interface between hwmgr and eventmgr.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:28 -05:00
Jammy Zhou e61710c59d drm/amdgpu: support per device powerplay enablement (v2)
The amdgu_powerplay variable is global for multiple GPU instances.

v2: fold in Flora's module option change, protect adev reference in
macros

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu 8804b8d5b0 drm/amdgpu: enable sysfs interface for powerplay
Same interface exposed in pre-powerplay dpm code.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu 3af76f23a4 drm/amdgpu: export fan control functions to amdgpu
Hook up the amdgpu thermal control callbacks for powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu cac9a19919 drm/amdgpu/powerplay: implement fan control interface in amd_powerplay_funcs
This adds the interface needed to expose powerplay fan control to sysfs
via hwmon.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu 1e4854e96c drm/amdgpu/powerplay: implement thermal control for tonga.
Implement thermal and fan control for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:25 -05:00
Rex Zhu 2dfea9cd1f drm/amdgpu/powerplay: enable thermal interrupt task in eventmgr.
Add thermal handling to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:25 -05:00
Rex Zhu fba4eef584 drm/amdgpu/powerplay: add thermal control interface in hwmgr.
Thermal controller interface.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:24 -05:00
Rex Zhu 251bb34fa4 drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule.
Redefine interrupt callback function in accordance with cgs.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:24 -05:00
Rex Zhu c28eae26b5 drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control
Add the interface for fan and thermal control.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:23 -05:00
Rex Zhu 0859ed3db9 drm/amd/powerplay: Add CG and PG support for tonga
Implement clock and power gating support for tonga.  On Tonga
this is handles by the SMU rather than direct register settings
in the driver.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:23 -05:00
Rex Zhu b1132013ce drm/amd/powerplay: add new function point in hwmgr_func for CG/PG.
Add callbacks interface for clock and powergating.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:22 -05:00
Rex Zhu 3cec76f973 drm/amdgpu/powerplay: add some definition for other ip block to update cg pg.
Interface for clock and power gating handling.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:22 -05:00
Rex Zhu edb611c1e1 drm/amdgpu: enable powerplay module by default for fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu 76c8cc6b3b drm/amdgpu: enable powerplay module by default for tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu bbb207f3da drm/amdgpu/powerplay: program display gap for tonga.
Implement displaygap programming for tonga.  This is
required for properly mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:20 -05:00
Rex Zhu 2f4afc5733 drm/amdgpu/powerplay: implement pem_task for display_configuration_change
Add support for display configuration changes to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:19 -05:00
Rex Zhu 6f3bf7474c drm/amdgpu/poweprlay: export program display gap function to eventmgr
This allows the eventmgr to properly update the displaygap on
certain power events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:19 -05:00
Rex Zhu e8c7de5bf6 drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap
Displaygap support is required for proper mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:18 -05:00
Eric Huang 899fa4c04e drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.
Switch over to handling in the powerplay module.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:18 -05:00
Jammy Zhou 3a74f6f273 drm/amdgpu: add amdgpu.powerplay module option
This option can be used to enable the new powerplay implementation,
and it is disabled by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang aabcb7c11e drm/amd/powerplay: add Fiji DPM support.
This enabled DPM support for Fiji.  DPM is dynamic
clock and voltage scaling.

v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init
v3: (agd) fold in endian fix, additional function addition

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang 74785623db drm/amd/powerplay: add Fiji SMU support.
Add support for the SMU manager for Fiji. This handles the
firmware loading for other IP blocks (GFX, SDMA, etc.).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:16 -05:00
Eric Huang 3ec2cdb85f drm/amd/powerplay: update atomctrl for fiji
Add some new functions to support Fiji.  Split out
from the previous patch.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:16 -05:00
Eric Huang 770911a3cf drm/amd/powerplay: add/update headers for Fiji SMU and DPM
New headers for Fiji.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
yanyang1 c82baa2818 drm/amd/powerplay: add Tonga dpm support (v3)
This implements DPM for tonga.  DPM handles dynamic
clock and voltage scaling.

v2: merge all the patches related with tonga dpm
v3: merge dpm force level fix, cgs display fix, spelling fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
Jammy Zhou 1060029fae drm/amd/powerplay: Add Tonga SMU support
The SMU manager handles firmware loading for other IP
blocks (GFX, SDMA, etc.).  This implements it for Tonga.

v3: delete peci sub-module
v2: use cgs interface directly

Signed-off-by: Young Yang <Young.Yang@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1 306d8db3e7 drm/amd/powerplay: add header file for tonga smu and dpm
These headers provide the SMU interface used by the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1 7ff1d70a40 drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:13 -05:00
yanyang1 3a287055ae drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h
Add ixSWRST_COMMAND_1 in bif_5_0_d.h.  Required by
new powerplay code for tonga and fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:12 -05:00
Rex Zhu 577bbe0183 drm/amd/powerplay: implement functions of amd_powerplay_func
This is the common interface for interacting with the powerplay
module.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:12 -05:00
Rex Zhu e92a037057 drm/amd/powerplay: add event manager sub-component
The event manager handles power related driver events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Rex Zhu 28a18bab2e drm/amd/powerplay: add CG and PG support for carrizo
This adds clock and powergating support for CZ.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Jammy Zhou bdecc20a98 drm/amd/powerplay: add Carrizo dpm support
This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.

v3: delete peci sub-module
v2: use cgs interface directly
    correct define SMU_EnabledFeatureScoreboard_SclkDpmOn

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Jammy Zhou 4630f0faae drm/amd/powerplay: add Carrizo smu support
This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.

v3: delete peci sub-module.
v2: use cgs interface directly
    add load_mec_firmware function

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Jammy Zhou 3bace35914 drm/amd/powerplay: add hardware manager sub-component
The hwmgr handles all hardware related calls, including clock/power
gating control, DPM, read and parse PPTable, etc.

v5: squash in fixes
v4: implement acpi's atcs function use cgs interface
v3: fix code style error and add big-endian mode support.
v2: use cgs interface directly in hwmgr sub-module

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:09 -05:00
Jammy Zhou ac885b3a20 drm/amd/powerplay: add SMU manager sub-component
The SMUMGR is one sub-component of powerplay for SMU firmware support.
The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.)
on VI parts.  The adds the core powerplay infrastructure to handle that.

v3: direct use printk in powerplay module.
v2: direct use cgs_read/write_register functions in smu-modules

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:09 -05:00
Rex Zhu 1b5708ffb1 drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block
Update amdgpu to deal with the new powerplay module properly.

v2: squash in fixes
v3: squash in Rex's power state reporting fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Rex Zhu ba5c2a87b0 drm/amdgpu: disable legacy path of firmware check if powerplay is enabled
Powerplay will use a different interface once it's integrated.  These
legacy pathes will be removed once powerplay is enabled by default.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Alex Deucher 1f7371b2a5 drm/amd/powerplay: add basic powerplay framework
amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.

CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.

v4: squash in fixes
v3: register debugfs file when powerplay module enable
v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu 47bf18b5b2 drm/amdgpu: add new cgs interface to get display info (v2)
Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.

v2: (agd): fold in refresh rate fix, rebase

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu 5e6186991a drm/amdgpu: implement cgs interface to query system info
Add a query to get the bus number and function of the
device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu 3f1d35a03b drm/amdgpu: implement new cgs interface for acpi function
Add a new driver internal interface for accessing ACPI
methods.  These will be used by various new components
including powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu 66dc0ddd02 drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h
This will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu 7e85be9948 drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h
These will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu 3a2c788d95 drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
rename amdgpu_pm_state_type to amd_pm_state_type

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:04 -05:00
Felix Kuehling 005ae95e6e drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_map
eaddr is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-12-21 16:39:14 -05:00
Alex Deucher 41869c1c7f drm/amdgpu: fix dp link rate selection (v2)
Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:38:51 -05:00
Christian König ee1782c3f2 drm/amdgpu: keep the PTs validation list in the VM v2
This avoids allocating it on the fly.

v2: fix grammar in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:46 -05:00
Christian König 56467ebfb2 drm/amdgpu: split VM PD and PT handling during CS
This way we avoid the extra allocation for the page directory entry.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:45 -05:00
Christian König 3c0eea6c35 drm/amdgpu: put VM page tables directly into duplicates list
They share the reservation object with the page directory anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:45 -05:00
Chunming Zhou 5b0112356c drm/amdgpu: restrict the sched jobs number to power of two
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
2015-12-18 17:29:44 -05:00
Alex Deucher a1493cd575 drm/amdgpu: limit visible vram if it's smaller than the BAR
In some cases the amount of vram may be less than the BAR size,
if so, limit visible vram to the amount of actual vram, not the
BAR size.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-17 11:56:41 -05:00
Christian König 91acbeb68a drm/amdgpu: fix user fence handling
This fixes a random corruption under memory pressure. We need to fence
the BO for the user fence as well, otherwise it might be swapped out
and the GPU could write the fence value to an undesired location.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-12-16 17:48:59 -05:00
Chunming Zhou b70f014d58 drm/amdgpu: change default sched jobs to 32
Change the default scheduler queue size from 16 to 32.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:47:17 -05:00
Chunming Zhou 37cd0ca204 drm/amdgpu: unify AMDGPU_CTX_MAX_CS_PENDING and amdgpu_sched_jobs
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:45:24 -05:00
Chunming Zhou c648ed7c5c drm/amdgpu: handle error case for ctx
Properly handle ctx init failure.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:42:11 -05:00
Chunming Zhou e8deea2d4b drm/amdgpu: add entity only when first job come
umd somtimes will create a context for every ring,
that means some entities wouldn't be used at all.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:41:19 -05:00
Alex Deucher 2c1a278403 drm/amdgpu: add more debugging output for driver failures
Add more fine grained debugging output for init/fini/suspend/
resume failures.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-11 11:13:42 -05:00
Flora Cui abdfb850ca drm/amdgpu: update rev id register for VI
Change-Id: I2ae9bb4a929f7c0c8783e0be563ae04be77596e2
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-11 11:13:41 -05:00
Flora Cui c27816a883 drm/amdgpu/gfx8: update PA_SC_RASTER_CONFIG:PKR_MAP only
Use default value as a base.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-11 11:13:41 -05:00
Flora Cui 3b55ddadef drm/amdgpu/gfx8: Enable interrupt on ME1_PIPE3
Otherwise FW cannot see the RLC ACK for the memory clean request
It's for Stoney.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-11 11:13:40 -05:00
Ville Syrjälä 13a3d91f17 drm: Pass 'name' to drm_encoder_init()
Done with coccinelle for the most part. However, it thinks '...' is
part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
in its place and got rid of it with sed afterwards.

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      )
{ ... }

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      );

@@
expression E1, E2, E3, E4;
@@
 drm_encoder_init(E1, E2, E3, E4
+                 ,NULL
                  )

v2: Add ', or NULL...' to @name kernel doc (Jani)
    Annotate the function with __printf() attribute (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670818-2966-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-11 09:13:20 +01:00
Chunming Zhou e410b5cbab drm/amdgpu: fix the lost duplicates checking
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Cc: stable@vger.kernel.org
2015-12-09 00:18:33 -05:00
Daniel Vetter b516a9efb7 drm: Move LEAVE/ENTER_ATOMIC_MODESET to fbdev helpers
This is only used for kgdb (and previously panic) handlers in
the fbdev emulation, so belongs there.

Note that this means we'll leave behind a forward declaration, but
once all the helper vtables are consolidated (in the next patch) that
will make more sense.

v2: fixup radone/amdgpu.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449218769-16577-3-git-send-email-daniel.vetter@ffwll.ch
Reviewed-by: Thierry Reding <treding@nvidia.com> (v2)
2015-12-08 16:07:51 +01:00
Dave Airlie e876b41ab0 Linux 4.4-rc4
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Back merge tag 'v4.4-rc4' into drm-next

We've picked up a few conflicts and it would be nice
to resolve them before we move onwards.
2015-12-08 11:04:26 +10:00
Alex Deucher 8e36f9d33c drm/amdgpu: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v3)
commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many
vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core
more fragile to drivers which don't update hw vblank counters and
vblank timestamps in sync with firing of the vblank irq and
essentially at leading edge of vblank.

This exposed a problem with radeon-kms/amdgpu-kms which do not
satisfy above requirements:

The vblank irq fires a few scanlines before start of vblank, but
programmed pageflips complete at start of vblank and
vblank timestamps update at start of vblank, whereas the
hw vblank counter increments only later, at start of vsync.

This leads to problems like off by one errors for vblank counter
updates, vblank counters apparently going backwards or vblank
timestamps apparently having time going backwards. The net result
is stuttering of graphics in games, or little hangs, as well as
total failure of timing sensitive applications.

See bug #93147 for an example of the regression on Linux 4.4-rc:

https://bugs.freedesktop.org/show_bug.cgi?id=93147

This patch tries to align all above events better from the
viewpoint of the drm core / of external callers to fix the problem:

1. The apparent start of vblank is shifted a few scanlines earlier,
so the vblank irq now always happens after start of this extended
vblank interval and thereby drm_update_vblank_count() always samples
the updated vblank count and timestamp of the new vblank interval.

To achieve this, the reporting of scanout positions by
radeon_get_crtc_scanoutpos() now operates as if the vblank starts
radeon_crtc->lb_vblank_lead_lines before the real start of the hw
vblank interval. This means that the vblank timestamps which are based
on these scanout positions will now update at this earlier start of
vblank.

2. The driver->get_vblank_counter() function will bump the returned
vblank count as read from the hw by +1 if the query happens after
the shifted earlier start of the vblank, but before the real hw increment
at start of vsync, so the counter appears to increment at start of vblank
in sync with the timestamp update.

3. Calls from vblank irq-context and regular non-irq calls are now
treated identical, always simulating the shifted vblank start, to
avoid inconsistent results for queries happening from vblank irq vs.
happening from drm_vblank_enable() or vblank_disable_fn().

4. The radeon_flip_work_func will delay mmio programming a pageflip until
the start of the real vblank iff it happens to execute inside the shifted
earlier start of the vblank, so pageflips now also appear to execute at
start of the shifted vblank, in sync with vblank counter and timestamp
updates. This to avoid some races between updates of vblank count and
timestamps that are used for swap scheduling and pageflip execution which
could cause pageflips to execute before the scheduled target vblank.

The lb_vblank_lead_lines "fudge" value is calculated as the size of
the display controllers line buffer in scanlines for the given video
mode: Vblank irq's are triggered by the line buffer logic when the line
buffer refill for a video frame ends, ie. when the line buffer source read
position enters the hw vblank. This means that a vblank irq could fire at
most as many scanlines before the current reported scanout position of the
crtc timing generator as the number of scanlines the line buffer can
maximally hold for a given video mode.

This patch has been successfully tested on a RV730 card with DCE-3 display
engine and on a evergreen card with DCE-4 display engine, in single-display
and dual-display configuration, with different video modes.

A similar patch is needed for amdgpu-kms to fix the same problem.

Limitations:

- Maybe replace the udelay() in the flip_work_func() by a suitable
  usleep_range() for a bit better efficiency? Will try that.

- Line buffer sizes in pixels are hard-coded on < DCE-4 to a value
  i just guessed to be high enough to work ok, lacking info on the true
  sizes atm.

Probably fixes: fdo#93147

Port of Mario's radeon fix to amdgpu.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(v1) Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>

(v2) Refine amdgpu_flip_work_func() for better efficiency.

     In amdgpu_flip_work_func, replace the busy waiting udelay(5)
     with event lock held by a more performance and energy efficient
     usleep_range() until at least predicted true start of hw vblank,
     with some slack for scheduler happiness. Release the event lock
     during waits to not delay other outputs in doing their stuff, as
     the waiting can last up to 200 usecs in some cases.

     Also small fix to code comment and formatting in that function.

(v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>

(v3) Fix crash in crtc disabled case
2015-12-04 15:15:07 -05:00
jimqu 81d75a30c6 drm/amdgpu: add spin lock to protect freed list in vm (v2)
there is a protection fault about freed list when OCL test.
add a spin lock to protect it.

v2: drop changes in vm_fini

Signed-off-by: JimQu <jim.qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 13:08:13 -05:00
Christian König 9c97b5ab4a drm/amdgpu: partially revert "drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR" v2
The gtt_end is already inclusive, we don't need to subtract one here.

v2 (chk): keep the fix for the VM code, cause here it really applies.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Anatoli Antonovitch <anatoli.antonovitch@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 13:06:59 -05:00
Christian König f3f1769283 drm/amdgpu: take a BO reference for the user fence
No need for a GEM reference here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 13:05:44 -05:00
Christian König e9d951a832 drm/amdgpu: take a BO reference in the display code
No need for the GEM reference here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 12:32:47 -05:00
Christian König 6d99905a8c drm/amdgpu: set snooped flags only on system addresses v2
Not necessary for VRAM.

v2: no need to check if ttm is NULL.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 12:31:46 -05:00
jimqu 9c4153b1ee drm/amdgpu: add spin lock to protect freed list in vm (v2)
there is a protection fault about freed list when OCL test.
add a spin lock to protect it.

v2: drop changes in vm_fini

Signed-off-by: JimQu <jim.qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 12:23:38 -05:00
Tom St Denis eb64526f5a amdgpu/gfxv8: Remove magic numbers from function gfx_v8_0_tiling_mode_table_init()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:52 -05:00
Nicolai Hähnle 786b521908 drm/amdgpu: fix race condition in amd_sched_entity_push_job
As soon as we leave the spinlock after the job has been added to the job
queue, we can no longer rely on the job's data to be available.

I have seen a null-pointer dereference due to sched == NULL in
amd_sched_wakeup via amd_sched_entity_push_job and
amd_sched_ib_submit_kernel_helper. Since the latter initializes
sched_job->sched with the address of the ring scheduler, which is
guaranteed to be non-NULL, this race appears to be a likely culprit.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=93079
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 11:26:52 -05:00
Chunming Zhou ba98f9e56c drm/amdgpu: add err check for pin userptr
Missing error check if the operation failed.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 11:26:51 -05:00
Tom St Denis 0d07db7e10 amdgpu/gfxv8: Simplification in gfx_v8_0_enable_gui_idle_interrupt()
Simplified the function by folding the two paths into one.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:50 -05:00
Tom St Denis 544b8a74c7 amdgpu/gfxv8: Simplification of gfx_v8_0_create_bitmask()
Simplification of the function gfx_v8_0_create_bitmask().

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:50 -05:00
Tom St Denis 90bea0abf6 amdgpu/gfxv8: Cleanup of gfx_v8_0_tiling_mode_table_init() (v2)
Simplification and LOC reduction of function gfx_v8_0_tiling_mode_table_init()

v2: remove spurious break
bug: https://bugs.freedesktop.org/show_bug.cgi?id=93236

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:49 -05:00
Tom St Denis 8cdacf4457 amdgpu/gfxv8: Add missing break to switch statement from states init code
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-02 15:54:33 -05:00
Chunming Zhou d033a6de80 drm/amd: abstract kernel rq and normal rq to priority of run queue
Allows us to set priorities in the scheduler.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-12-02 15:54:33 -05:00
Alex Deucher ccba7691a5 drm/amdgpu: add EDC support for CZ (v3)
This adds EDC support for CZ.
EDC = Error Correction and Detection
This code properly initializes the EDC hardware and
resets the error counts.  This is done in late_init
since it requires the IB pool which is not initialized
during hw_init.

v2: fix the IB size as noted by Felix, fix shader pgm
register programming
v3: use the IB for the shaders as suggested by Christian

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 15:54:26 -05:00
Alex Deucher aa5e24e5f8 drm/amd: add new gfx8 register definitions for EDC
EDC is a RAS feature for on chip memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 15:54:18 -05:00
Nicolai Hähnle 07df04dfcf drm/amdgpu: fix race condition in amd_sched_entity_push_job
As soon as we leave the spinlock after the job has been added to the job
queue, we can no longer rely on the job's data to be available.

I have seen a null-pointer dereference due to sched == NULL in
amd_sched_wakeup via amd_sched_entity_push_job and
amd_sched_ib_submit_kernel_helper. Since the latter initializes
sched_job->sched with the address of the ring scheduler, which is
guaranteed to be non-NULL, this race appears to be a likely culprit.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=93079
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-02 15:04:04 -05:00
Chunming Zhou e2f784fa8a drm/amdgpu: add err check for pin userptr
Missing error check if the operation failed.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-02 15:03:54 -05:00
Daniel Vetter a9906fde57 drm/amdgpu: Use unlocked gem unreferencing
For drm_gem_object_unreference callers are required to hold
dev->struct_mutex, which these paths don't. Enforcing this requirement
has become a bit more strict with

commit ef4c6270bf
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Oct 15 09:36:25 2015 +0200

    drm/gem: Check locking in drm_gem_object_unreference

Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:46:00 -05:00
monk.liu f930b2e862 drm/amdgpu: Use new read bios from rom callback
Read the vbios directly from the rom.  In some cases,
e.g., virtualization, the rom is not available via
the BAR or other means.  Access it directly.

This is an updated version of Monks original patch which
uses family specific callbacks and unifies some of the
validation checking.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:59 -05:00
Alex Deucher 95addb2ae0 drm/amdgpu: add read_bios_from_rom callback for VI parts
Read the vbios image directly from the rom.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:58 -05:00
Alex Deucher 1eb22bd38a drm/amdgpu: add read_bios_from_rom callback for CI parts
Read the vbios image directly from the rom.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:58 -05:00
Alex Deucher 7946b87803 drm/amdgpu: add a callback for reading the bios from the rom directly
This is necessary when the vbios image is not directly accessible via
the rom BAR or legacy vga location.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:57 -05:00
Jammy Zhou 288912cb95 drm/amdgpu: use $(src) in Makefile (v2)
This can solve the path problem when compile amdgpu with DKMS.

v2: agd: rebase on current drm-next

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:56 -05:00
Alex Deucher 54fb2a5cd0 drm/amdgpu: call hpd_irq_event on resume
Need to call this on resume if displays changes during
suspend in order to properly be notified of changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-12-02 12:45:54 -05:00
Dave Airlie aeb745e9b5 Merge tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel into drm-next
Here's the first drm-misc pull, with really mostly misc stuff all over.
Somewhat invasive is only Ville's change to mark the arg struct for
fb_create const - that might conflict with a new driver pull. So better to
get in fast.

* tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel:
  drm/mm: use list_next_entry
  drm/i915: fix potential dangling else problems in for_each_ macros
  drm: fix potential dangling else problems in for_each_ macros
  drm/sysfs: Send out uevent when connector->force changes
  drm/atomic: Small documentation fix.
  drm/mm: rewrite drm_mm_for_each_hole
  drm/sysfs: Grab lock for edid/modes_show
  drm: Print the src/dst/clip rectangles in error in drm_plane_helper
  drm: Add "prefix" parameter to drm_rect_debug_print()
  drm: Keep coordinates in the typical x, y, w, h order instead of x, y, h, w
  drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create()
  drm: modes: replace simple_strtoul by kstrtouint
  drm: Describe the Rotation property bits.
  drm: Remove unused fbdev_list members
  GPU-DRM: Delete unnecessary checks before drm_property_unreference_blob()
  drm/dp: add eDP DPCD backlight control bit definitions
  drm/tegra: Remove local fbdev emulation Kconfig option
  drm/imx: Remove local fbdev emulation Kconfig option
  drm/gem: Update/Polish docs
  drm: Update GEM refcounting docs
2015-12-01 08:01:18 +10:00
Christian König 82b9c55b1e drm/amdgpu: fix VM page table reference counting
We use the reservation object of the page directory for the page tables as
well, because of this the page directory should be freed last. Ensure that
by keeping a reference from the page tables to the directory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-30 14:41:33 -05:00
Christian König 585116c5fa drm/amdgpu: fix userptr flags check
That got messed up while porting it from Radeon.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-30 14:38:47 -05:00
Ville Syrjälä 1eb83451ba drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create()
Drivers shouldn't clobber the passed in addfb ioctl parameters.
i915 was doing just that. To prevent it from happening again,
pass the struct around as const, starting all the way from
internal_framebuffer_create().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-11-24 11:47:38 +01:00
Lukas Wunner cb1197173f drm: Remove unused fbdev_list members
I noticed that intel_fbdev->our_mode is unused. Introduced by
79e539453b ("DRM: i915: add mode setting support").

Then I noticed that intel_fbdev->fbdev_list is unused as well.
Introduced by 386516744b ("drm/fb: fix fbdev object model +
cleanup properly.") in i915, nouveau and radeon.

Subsequently cargo culted to amdgpu, ast, cirrus, qxl, udl,
virtio and mgag200.

Already removed from the latter with cc59487a05 ("drm/mgag200:
'fbdev_list' in 'struct mga_fbdev' is not used").

Remove it from the others.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-11-24 11:41:52 +01:00
Christian König 3d65193635 drm/amdgpu: move dependency handling out of atomic section v2
This way the driver isn't limited in the dependency handling callback.

v2: remove extra check in amd_sched_entity_pop_job()

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-23 12:20:15 -05:00
Christian König 393a0bd437 drm/amdgpu: optimize scheduler fence handling
We only need to wait for jobs to be scheduled when
the dependency is from the same scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-23 12:19:58 -05:00
Chunming Zhou e98c1b0de6 drm/amdgpu: remove vm->mutex
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-20 18:22:28 -05:00
Chunming Zhou 69b576a1bc drm/amdgpu: add mutex for ba_va->valids/invalids
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-20 18:22:23 -05:00
Leo Liu d66f8e48f1 drm/amdgpu: adapt vce session create interface changes
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:21:20 -05:00
Leo Liu 3c0ff9f18f drm/amdgpu: vce use multiple cache surface starting from stoney
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:21:04 -05:00
Leo Liu d6c29c30ea drm/amdgpu: reset vce trap interrupt flag
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:20:55 -05:00
Chunming Zhou 49b02b180a drm/amdgpu: reserve/unreserve objects out of map/unmap operations
Change-Id: Id6514f2fb6e002437fdbe99353d5d35f4ac736c7
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-18 11:41:20 -05:00
Chunming Zhou ef9f0a83d6 drm/amdgpu: move bo_reserve out of amdgpu_vm_clear_bo
Change-Id: Ifbb0c06680494bfa04d0be5e5941d31ae2e5ef28
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-18 11:41:02 -05:00
Chunming Zhou c25867dfab drm/amdgpu: add lock for interval tree in vm
Change-Id: I62b892a22af37b32e6b4aefca80a25cf45426ed2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-18 11:40:55 -05:00
Christian König 1c16c0a7b2 drm/amdgpu: keep the owner for VMIDs
We don't need the last VM use any more, keep the owner directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
2015-11-18 11:40:37 -05:00
Christian König ea89f8c9e8 drm/amdgpu: move VM manager clean into the VM code again
It's not a good idea to duplicate that code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-18 11:40:27 -05:00
Christian König 8b4fb00b5d drm/amdgpu: cleanup VM coding style
Fix the indentation and move the VM functions to the structures.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-18 11:40:00 -05:00
Christian König eeed25ab83 drm/amdgpu: remove unused VM manager field
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-11-18 11:39:34 -05:00
Christian König 984810fc45 drm/amdgpu: cleanup scheduler command submission
Unify the two code path again, cause they do pretty much the same thing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-11-18 11:39:12 -05:00
Christian König 2269a39579 drm/amdgpu: fix typo in firmware name
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-18 09:33:29 -05:00
Junwei Zhang bbf0b34578 drm/amdgpu: remove the unnecessary parameter adev for amdgpu_sa_bo_new()
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 17:01:32 -05:00
Christian König 680513cc0a drm/amdgpu: wait interruptible when semaphores are disabled v2
Otherwise debugging locked up processes isn't possible.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
2015-11-16 17:01:15 -05:00
Chunming Zhou 43c27fb5c2 drm/amdgpu: update pd while updating vm as well
Change-Id: I93a861cd6707f7d91672b9e19757cc50008cd7a2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:06:00 -05:00
Christian König 5d82730af7 drm/amdgpu: fix handling order in scheduler CS
We need to clear parser.ibs and num_ibs before amd_sched_fence_create,
otherwise the IB could be freed twice if fence creates fails.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:59 -05:00
Christian König e284022163 drm/amdgpu: fix incorrect mutex usage v3
Before this patch the scheduler fence was created when we push the job
into the queue, so we could only get the fence after pushing it.

The mutex now was necessary to prevent the thread pushing the jobs to
the hardware from running faster than the thread pushing the jobs into
the queue.

Otherwise the thread pushing jobs into the queue would have accessed
possible freed up memory when it tries to get a reference to the fence.

So what you get in the end is thread A:
mutex_lock(&job->lock);
...
Kick of thread B.
...
mutex_unlock(&job->lock);

And thread B:
mutex_lock(&job->lock);
....
mutex_unlock(&job->lock);
kfree(job);

I'm actually not sure if I'm still up to date on this, but this usage
pattern used to be not allowed with mutexes. See here as well
https://lwn.net/Articles/575460/.

v2: remove unrelated changes, fix missing owner
v3: rebased, add more commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Christian König 4a56228337 drm/amdgpu: cleanup scheduler fence get/put dance
The code was correct, but getting two references when the ownership
is linearly moved on is a bit awkward and just overhead.

Signed: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Chunming Zhou 7034decf6a drm/amdgpu: add command submission workflow tracepoint
OGL needs these tracepoints to investigate performance issue.

Change-Id: I5e58187d061253f7d665dfce8e4e163ba91d3e2b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
2015-11-16 11:05:57 -05:00