Commit Graph

14 Commits

Author SHA1 Message Date
Bob Moore a8357b0c95 ACPICA: Update all ACPICA copyrights and signons to 2010
Add 2010 copyright to all module headers and signons, including
the Linux header. This affects virtually every file in the ACPICA
core subsystem, iASL compiler, and all utilities.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22 12:30:05 -05:00
Bob Moore c6b5774caa ACPICA: Add 64-bit support to acpi_read and acpi_write
Needed by drivers for new ACPi tables.  Internal versions of
these functions still use 32-bit max transfers, in order to
minimize disruption and stack use for the standard ACPI registers
(FADT-based).

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-08-27 10:17:14 -04:00
Bob Moore 8eb7b2477c ACPICA: Fix a few warnings for gcc 3.4.4
Mostly for acpiexec, one in the core subsystem.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-05-27 00:30:48 -04:00
Lin Ming c3dd25f4c1 ACPICA: Clear PM register write-only bits on reading
Affects PM1 Control register only. When reading the register, zero
the write-only bits as per the ACPI spec.  ACPICA BZ 443. Lin Ming.

http://www.acpica.org/bugzilla/show_bug.cgi?id=443

Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27 12:11:03 -04:00
Bob Moore 7f07190390 ACPICA: New: I/O port protection
Protect certain I/O ports from reads/writes. Provides MS
compatibility. New module, hwvalid.c

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27 12:11:03 -04:00
Bob Moore 20869dcfde ACPICA: Preserve all PM control reserved and ignored bits
As per the ACPI specification, preserve (read/modify/write) all
bits that are defined as either reserved or ignored (PM control
control registers only.)

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27 12:11:03 -04:00
Bob Moore 8636f8d257 ACPICA: Change handling of PM1 Status register ignored bit
Ignored bits must be preserved according to the ACPI spec.
Usually this means a read/modify/write when writing to the
register.  However, for status registers, writing a one means
clear the event.  Writing a zero means preserve the event (do not
clear.) This behavior is clarified in the ACPI 4.0 spec, and the
ACPICA code now simply always writes a zero to the ignored bit.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27 12:11:03 -04:00
Bob Moore 32c9ef994d ACPICA: Add function to handle PM1 control registers
Added acpi_hw_write_pm1_control. This function writes both of the PM1
control registers (A/B). These registers are different than than
the PM1 A/B status and enable registers in that different values
can be written to the A/B registers.  Most notably, the SLP_TYP
bits can be different, as per the values returned from the _Sx
predefined methods.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26 16:38:26 -04:00
Bob Moore aefc7f9a02 ACPICA: For PM1B registers, do not shift value read or written
The PM1B registers are mirrors of the PM1A registers with
different bits actually implemented. From the ACPI specification:
"Although the bits can be split between the two register blocks
(each register block has a unique pointer within the FADT), the bit
positions are maintained. The register block with unimplemented
bits (that is, those implemented in the other register block)
always returns zeros, and writes have no side effects"

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26 16:38:25 -04:00
Bob Moore 227243a04d ACPICA: Remove extra write for acpi_hw_clear_acpi_status
This function was writing an optional PM1B status register
twice.  The existing call to the low-level acpi_hw_register_write
automatically handles a possibly split PM1 A/B register.
ACPICA BZ 751.

http://www.acpica.org/bugzilla/show_bug.cgi?id=751

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26 16:38:24 -04:00
Bob Moore c520abadbc ACPICA: Fix writes to optional PM1B registers
On read, shift B register bits above the A bits. On write,
shift B bits down to zero before writing the B register. New:
acpi_hw_read_multiple, acpi_hw_write_multiple. These two functions now
transparently handle the (possible) split registers for PM1 Status,
Enable, and Control.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26 16:38:24 -04:00
Bob Moore 531c633d2b ACPICA: Split out PM1 status registers from the FADT
Add new globals for the PM1 status registers (A/B), similar to the
way the PM1 enable registers are handled. Instead of overloading
the FADT Event Register blocks. This makes the code clearer and
less prone to error.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26 16:38:22 -04:00
Len Brown e2f7a77728 ACPICA: hide private headers
Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-09 03:31:01 -05:00
Len Brown 95b482a8d3 ACPICA: create acpica/ directory
also, delete sleep/ and delete ACPI_CFLAGS from Makefile

Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-09 03:30:47 -05:00