Commit Graph

277140 Commits

Author SHA1 Message Date
Ilija Hadzic 09b4ea47d1 drm: make DRM_UNLOCKED ioctls with their own mutex
drm_getclient, drm_getstats and drm_getmap (with a few minor
adjustments) do not need global mutex, so fix that and
make the said ioctls DRM_UNLOCKED. Details:

  drm_getclient: the only thing that should be protected here
  is dev->filelist and that is already protected everywhere with
  dev->struct_mutex.

  drm_getstats: there is no need for any mutex here because the
  loop runs through quasi-static (set at load time only)
  data, and the actual count access is done with atomic_read()

  drm_getmap already uses dev->struct_mutex to protect
  dev->maplist, which also used to protect the same structure
  everywhere else except at three places:
  * drm_getsarea, which doesn't grab *any* mutex before
    touching dev->maplist (so no drm_global_mutex doesn't help
    here either; different issue for a different patch).
    However, drivers seem to call it only at
    initialization time so it probably doesn't matter
  * drm_master_destroy, which is called from drm_master_put,
    which in turn is protected with dev->struct_mutex
    everywhere else in drm module, so we are good here too.
  * drm_getsareactx, which releases the dev->struct_mutex
    too early, but this patch includes the fix for that.

v2: * incorporate comments received from Daniel Vetter
    * include the (long) explanation above to make it clear what
      we are doing (and why), also at Daniel Vetter's request
    * tighten up mutex grab/release locations to only
      encompass real critical sections, rather than some
      random code around them

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 14:43:02 +00:00
Ilija Hadzic 53fead966a drm: no need to hold global mutex for static data
drm_getcap and drm_version ioctls only reads static data,
there is no need to protect them with drm_global_mutex,
so make them DRM_UNLOCKED

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 14:42:52 +00:00
Chen Jie d7d0a75c44 drm/radeon/benchmark: common modes sweep ignores 640x480@32
Sweep common_modes array should start with index 0.

Signed-off-by: Chen Jie <chenj@lemote.com>
Reviewed-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 14:40:49 +00:00
Alex Deucher 28eebb703e drm/radeon/kms: disable writeback on pre-R300 asics
We often end up missing fences on older asics with
writeback enabled which leads to delays in the userspace
accel code, so just disable it by default on those asics.

Reported-by: Helge Deller <deller@gmx.de>
Reported-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 10:07:10 +00:00
Jerome Glisse c1341e5280 drm/radeon: allocate semaphore from the ib pool
This allow to share the ib pool with semaphore and avoid
having more bo around.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 10:03:53 +00:00
Jerome Glisse 69e130a6a4 drm/radeon: make ib size variable
This avoid to waste ib pool size and avoid a bunch of wait for
previous ib to finish.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 10:03:33 +00:00
Alex Deucher 1f2e124df9 drm/radeon/kms: add missing ring ready check in sync tests
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 10:02:42 +00:00
Rob Clark 0a7eb243db drm: add support for private planes
In cases where the scanout hw is sufficiently similar between "overlay"
and traditional crtc layers, it might be convenient to allow the driver
to create internal drm_plane helper objects used by the drm_crtc
implementation, rather than duplicate code between the plane and crtc.
A private plane is not exposed to userspace.

Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 10:00:16 +00:00
Rob Clark a9971157b6 drm: disconnect plane from fb/crtc when disabled
Since plane->fb and plane->crtc are set in drm_mode_setplane()
after update_plane(), They should be cleared after disable().

Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-05 09:24:39 +00:00
Jesse Barnes d8e70a254d drm/i915: only set the intel_crtc DPMS mode to on if the mode set succeeded
If it failed, leave it in the "off" state.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 14:55:52 -08:00
Jesse Barnes 7a4198664d drm/i915: don't disable a PCH DPLL that's in use
If a PCH pipe PLL is being used by transcoder C, don't disable it.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 14:55:47 -08:00
Daniel Vetter e6bfaf8542 drm/i915: don't bail out of intel_wait_ring_buffer too early
In the pre-gem days with non-existing hangcheck and gpu reset code,
this timeout of 3 seconds was pretty important to avoid stuck
processes.

But now we have the hangcheck code in gem that goes to great length
to ensure that the gpu is really dead before declaring it wedged.

So there's no need for this timeout anymore. Actually it's even harmful
because we can bail out too early (e.g. with xscreensaver slip)
when running giant batchbuffers. And our code isn't robust enough
to properly unroll any state-changes, we pretty much rely on the gpu
reset code cleaning up the mess (like cache tracking, fencing state,
active list/request tracking, ...).

With this change intel_begin_ring can only fail when the gpu is
wedged, and it will return -EAGAIN (like wait_request in case the
gpu reset is still outstanding).

v2: Chris Wilson noted that on resume timers aren't running and hence
we won't ever get kicked out of this loop by the hangcheck code. Use
an insanely large timeout instead for the HAS_GEM case to prevent
resume bugs from totally hanging the machine.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 10:26:31 -08:00
Daniel Vetter 4e0e90dcb8 drm/i915: kicking rings stuck on semaphores considered harmful
If our semaphore logic gets confused and we have a ring stuck waiting
for one, there's a decent chance it'll just execute garbage when being
kicked. Also, kicking the ring obscures the place where the error
first occured, making error_state decoding much harder.

So drop this an let gpu reset handle this mess in a clean fashion.

In contrast, kicking rings stuck on MI_WAIT is rather harmless, at
worst there'll be a bit of screen-flickering. There's also old
broken userspace out there which needs this as a  work-around.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@hchris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 10:26:07 -08:00
Eric Anholt ae662d3126 drm/i915: Add support for resetting the SO write pointers on gen7.
These registers are automatically incremented by the hardware during
transform feedback to track where the next streamed vertex output
should go.  Unlike the previous generation, which had a packet for
setting the corresponding registers to a defined value, gen7 only has
MI_LOAD_REGISTER_IMM to do so.  That's a secure packet (since it loads
an arbitrary register), so we need to do it from the kernel, and it
needs to be settable atomically with the batchbuffer execution so that
two clients doing transform feedback don't stomp on each others'
state.

Instead of building a more complicated interface involcing setting the
registers to a specific value, just set them to 0 when asked and
userland can tweak its pointers accordingly.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:18 -08:00
Eric Anholt e959b5db4a drm/i915: Make the fallback IRQ wait not sleep.
The waits we do here are generally so short that sleeping is a bad
idea unless we have an IRQ to wake us up.  Improves regression test
performance from 18 minutes to 3.5 minutes on gen7, which is now
consistent with the previous generation.

Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:16 -08:00
Eric Anholt 42ff6572e5 drm/i915: Work around gen7 BLT ring synchronization issues.
Previous to this commit, testing easily reproduced a failure where the
seqno would apparently arrive after the IRQ associated with it, with test programs as simple as:

for (;;) {
    glCopyPixels(0, 0, 1, 1);
    glFinish();
}

Various workarounds we've seen for previous generations didn't work to
fix this issue, so until new information comes in, replace the IRQ
waits on the BLT ring with polling.

Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:15 -08:00
Eric Anholt 7ea29b13e5 drm/i915: Do the fallback non-IRQ wait in ring throttle, too.
As a workaround for IRQ synchronization issues in the gen7 BLT ring,
we want to turn the two wait functions into polling loops.

Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:14 -08:00
Eric Anholt 116ac8d261 drm/i915: Set two chicken bits implicated in missed IRQs on Ivybridge.
They don't fix our problems alone, but we're told to set them.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:13 -08:00
Jesse Barnes 8ea3086422 drm/i915: add color key support v4
Add new ioctls for getting and setting the current destination color
key.  This allows for simple overlay display control by matching a color
key value in the primary plane before blending the overlay on top.

v2: remove unnecessary mutex acquire/release around reg accesses
v3: add support for full color key management
v4: fix copy & paste bug in snb_get_colorkey
    don't bother checking min/max values against docs as the docs are likely
    wrong (how could we handle 10bpc surface formats?)

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-01-03 09:31:12 -08:00
Jesse Barnes 175bd4204e drm/i915: track sprite coverage and disable primary plane if possible
To save power when the sprite is full screen, we can disable the primary
plane on the same pipe.  Track the sprite status and enable/disable the
primary opportunistically.

v2: remove primary plane enable/disable hooks; they're identical

Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:10 -08:00
Jesse Barnes b840d907fc drm/i915: add SNB and IVB video sprite support v6
The video sprites support various video surface formats natively and can
handle scaling as well.  So add support for them using the new DRM core
sprite support functions.

v2: use drm specific fourcc header and defines
v3: address Daniel's comments:
  - don't take struct mutex around register access (only needed for
    regs in the GT power well)
  - don't hold struct mutex across vblank waits
  - fix up update_plane API (pass obj instead of GTT offset)
  - add interlaced defines for sprite regs
  - drop unnecessary 'reg' variables
  - comment double buffered reg flushing
  Also fix w/h confusion when writing the scaling reg.
v4: more fixes, address more comments from Daniel, and include Hai's fix
  - prevent divide by zero in scaling calculation (Hai Lan)
  - update to Ville's new DRM_FORMAT_* types
  - fix sprite watermark handling (calc based on CRTC size, separate
    from normal display wm)
  - remove private refcounts now that the fb cleanups handles things
v5: add linear surface support
v6: remove color key clearing & setting from update_plane

For this version, I tested DPMS since it came up in the last review;
DPMS off/on works ok when a video player is working under X, but for
power saving we'll probably want to do something smarter.  I'll leave
that for a separate patch on top.  Likewise with the refcounting/fb
layer handling, which are really separate cleanups.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:31:09 -08:00
Keith Packard c7dffff7cc drm/i915: Clean up multi-threaded forcewake patch
We learned that the ECOBUS register was inside the GT power well, and
so *did* need force wake to be read, so it gets removed from the list
of 'doesn't need force wake' registers.

That means the code reading ECOBUS after forcing the mt_force_wake
function to be called needs to use I915_READ_NOTRACE; it doesn't need
to do more force wake fun as it's already done it manually.

This also adds a comment explaining why the MT forcewake testing code
only needs to call mt_forcewake_get/put and not disable RC6 manually
-- the ECOBUS read will return 0 if the device is in RC6 and isn't
using MT forcewake, causing the test to work correctly.

Signed-off-by: Keith Packard <keithp@keithp.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-01-03 09:09:45 -08:00
Ben Widawsky 4d85529d58 drm/i915: drpc debugfs update for gen6
Many of the old fields from Ironlake have gone away. Strip all those
fields, and try to update to fields people care about. RC information
isn't exactly ideal anymore. All we can guarantee when we read the
register is that we're not using forcewake, ie. the software isn't
forcing the hardware to stay awake. The downside is that in doing this
we may wait a while and that causes an unnaturally idle state on the
GPU.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42578
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:09:45 -08:00
Ben Widawsky 6ed55ee7da drm/i915: Update GEN6_RP_CONTROL definitions
This matches the modern specs more accurately.

This will be used by the following patch to fix the way we display RC
status.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:09:45 -08:00
Ben Widawsky 84f9f938be drm/i915: Force sync command ordering (Gen6+)
The docs say this is required for Gen7, and since the bit was added for
Gen6, we are also setting it there pit pf paranoia. Particularly as
Chris points out, if PIPE_CONTROL counts as a 3d state packet.

This was found through doc inspection by Ken and applies to Gen6+;

Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:09:44 -08:00
Ben Widawsky e2971bdab2 drm/i915: relative_constants_mode race fix
dev_priv keeps track of the current addressing mode that gets set at
execbuffer time. Unfortunately the existing code was doing this before
acquiring struct_mutex which leaves a race with another thread also
doing an execbuffer. If that wasn't bad enough, relocate_slow drops
struct_mutex which opens a much more likely error where another thread
comes in and modifies the state while relocate_slow is being slow.

The solution here is to just defer setting this state until we
absolutely need it, and we know we'll have struct_mutex for the
remainder of our code path.

v2: Keith noticed a bug in the original patch.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-03 09:09:44 -08:00
Dave Airlie 7a7e8734ac Merge branch 'drm-radeon-testing' of ../drm-radeon-next into drm-core-next
This merges the evergreen HDMI audio support.

* 'drm-radeon-testing' of ../drm-radeon-next:
  drm/radeon/kms: define TMDS/LVTM HDMI enabling bits
  drm/radeon/kms: workaround invalid AVI infoframe checksum issue
  drm/radeon/kms: setup HDMI mode on Evergreen encoders
  drm/radeon/kms: support for audio on Evergreen
  drm/radeon/kms: minor HDMI audio cleanups
  drm/radeon/kms: do not force DVI mode on DCE4 if audio is on
ridge

Conflicts:
	drivers/gpu/drm/radeon/evergreen.c
2012-01-03 09:45:12 +00:00
Rafał Miłecki 93a4ed878a drm/radeon/kms: define TMDS/LVTM HDMI enabling bits
The names has been taken from free M76 specs.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-03 09:40:47 +00:00
Rafał Miłecki 92db7f6c86 drm/radeon/kms: workaround invalid AVI infoframe checksum issue
This change was verified to fix both issues with no video I've
investigated. I've also checked checksum calculation with fglrx on:
RV620, HD54xx, HD5450, HD6310, HD6320.

Cc: stable@vger.kernel.org
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-03 09:40:10 +00:00
Rafał Miłecki f83d926aca drm/radeon/kms: setup HDMI mode on Evergreen encoders
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-03 09:39:18 +00:00
Dave Airlie 2318fcd65c Merge branch 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux into drm-core-next
* 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux:
  drm/i915: check ACTHD of all rings
  drm/i915: DisplayPort hot remove notification to audio driver
  drm/i915: HDMI hot remove notification to audio driver
  drm/i915: dont trigger hotplug events on unchanged ELD
  drm/i915: rename audio ELD registers
  drm/i915: fix ELD writing for SandyBridge
2012-01-03 09:34:43 +00:00
Alan Cox f9f23a77f0 gma500: remove no_fb bits
This doesn't work and isn't of any use. It was inherited from the older
driver code and can go away. Kill it off before it becomes part of mainstream
as we don't want to support it in future.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-03 09:30:29 +00:00
Alan Cox b6195aab9c gma500: Fix Cedarview support (Correct version)
And update to the actual product naming as the press release is now out.

http://newsroom.intel.com/docs/DOC-2553#pressmaterials

- Fixes the wrong ifdef check
- Fixes the missing crtc count declaration

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-03 09:30:07 +00:00
Alan Cox 56125db1ee gma500: Add the E6xx PCI identifier we are missing
Oaktrail Atom E620 has a different PCI identifier we need to cover

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-03 09:29:13 +00:00
Dave Airlie 863f78b5ff Merge branch 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung into drm-core-next
these patch sets include the following features:
- add Samsung SoC Exynos based HDMI support.
- add pm feature for fimd driver.
- add multi buffer plane pixel formats to drm/drm_fourcc.h.
  multi buffer plane pixel format has seperated memory spaces for each
  plane. for exampme, NV12M has Y plane and CbCr plane and these are in
  non-continuous memory region. compared with NV12, NV12M's memory shape
  is like following.
  NV12  : ______(Y)(CbCr)_______
  NV12M : __(Y)_ ..... _(CbCr)__
- bug fix to vblank.
- code clean to exynos gem framework.

* 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung:
  drm/exynos: added hdmi display support
  drm/exynos: added mutex lock and code clean.
  drm/exynos: extend vblank off delay time.
  drm/exynos: change driver name.
  drm/exynos: Support multi buffers
  drm: Add multi buffer plane pixel formats
  drm/exynos: added pm support.
  drm/exynos: remove buffer creation of fbdev from drm framebuffer creation
  drm/exynos: Split creation of gem object and gem handle
  drm/exynos: Fix a fake mmap offset creation
  drm/exynos: gem code cleanup
2012-01-03 09:25:26 +00:00
Seung-Woo Kim d84083268b drm/exynos: added hdmi display support
This patch is hdmi display support for exynos drm driver.

There is already v4l2 based exynos hdmi driver in drivers/media/video/s5p-tv
and some low level code is already in s5p-tv and even headers for register
define are almost same. but in this patch, we decide not to consider separated
common code with s5p-tv.

Exynos HDMI is composed of 5 blocks, mixer, vp, hdmi, hdmiphy and ddc.

1. mixer. The piece of hardware responsible for mixing and blending multiple
data inputs before passing it to an output device.  The mixer is capable of
handling up to three image layers. One is the output of VP.  Other two are
images in RGB format.  The blending factor, and layers' priority are controlled
by mixer's registers. The output is passed to HDMI.

2. vp (video processor). It is used for processing of NV12/NV21 data.  An image
stored in RAM is accessed by DMA. The output in YCbCr444 format is send to
mixer.

3. hdmi. The piece of HW responsible for generation of HDMI packets. It takes
pixel data from mixer and transforms it into data frames. The output is send
to HDMIPHY interface.

4. hdmiphy. Physical interface for HDMI. Its duties are sending HDMI packets to
HDMI connector. Basically, it contains a PLL that produces source clock for
mixer, vp and hdmi.

5. ddc (display data channel). It is dedicated i2c channel to exchange display
information as edid with display monitor.

With plane support, exynos hdmi driver fully supports two mixer layes and vp
layer. Also vp layer supports multi buffer plane pixel formats having non
contigus memory spaces.

In exynos drm driver, common drm_hdmi driver to interface with drm framework
has opertion pointers for mixer and hdmi. this drm_hdmi driver is registered as
sub driver of exynos_drm. hdmi has hdmiphy and ddc i2c clients and controls
them. mixer controls all overlay layers in both mixer and vp.

Vblank interrupts for hdmi are handled by mixer internally because drm
framework cannot support multiple irq id. And pipe number is used to check
which display device irq happens.

History
v2: this version
 - drm plane feature support to handle overlay layers.
 - multi buffer plane pixel format support for vp layer.
 - vp layer support

RFCv1: original
 - at https://lkml.org/lkml/2011/11/4/164

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:42 +09:00
Inki Dae c32b06ef7d drm/exynos: added mutex lock and code clean.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2011-12-29 11:21:42 +09:00
Inki Dae 52c68814cd drm/exynos: extend vblank off delay time.
some platform could be entering to sleep after short time once lcd panel off
but before that vblank could be off by vblank off delay feature. at that time,
vblank doesn't have the pair between vblank_get/put. so this path makes vblank
off delay to have enough.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
2011-12-29 11:21:42 +09:00
Inki Dae 0edf9936d5 drm/exynos: change driver name.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:42 +09:00
Seung-Woo Kim 229d3534f5 drm/exynos: Support multi buffers
These formats(NV12M, NV12MT and YUV420M) have non contiguous  multi
planes, so each plane uses different buffer. The exynos drm should
support multi buffer for them.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:42 +09:00
Seung-Woo Kim 83052d4d5c drm: Add multi buffer plane pixel formats
Multi buffer plane pixel format has seperated memory spaces for each
plane. For example, NV12M has Y plane and CbCr plane and these are in
non contiguous memory region. Compared with NV12, NV12M's memory shape
is like following.
NV12  : ______(Y)(CbCr)_______
NV12M : __(Y)_ ..... _(CbCr)__

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:42 +09:00
Inki Dae e30d4bcf79 drm/exynos: added pm support.
this patch adds pm feature for fimd driver.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:41 +09:00
Joonyoung Shim e1533c086f drm/exynos: remove buffer creation of fbdev from drm framebuffer creation
The fbdev fb and the user fb is created from same function -
exynos_drm_fb_create, but this function creates not only drm framebuffer
but buffer of fbdev. Remove it because it complicates codes and use
exynos_drm_gem_create() than exynos_drm_buf_create() to create buffer of
fbdev, it give better consistency of codes and more clear
implementation.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:41 +09:00
Joonyoung Shim 2364839a1a drm/exynos: Split creation of gem object and gem handle
exynos_drm_gem_create function created gem object with gem handle but it
can be called externally without gem handle creation through this patch.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:41 +09:00
Joonyoung Shim 2d91cf17b5 drm/exynos: Fix a fake mmap offset creation
Make a fake mmap offset only when it needs.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:41 +09:00
Joonyoung Shim ee5e770ef4 drm/exynos: gem code cleanup
This cleans codes of exynos gem - indents and order function and so on.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:41 +09:00
Dave Airlie 5c2a5ce689 drm: add missing exports for i810 driver.
Brown paper bag of danvet.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-12-22 19:09:01 +00:00
Dave Airlie 5c72765ed0 Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm into drm-core-next
* 'for-airlied' of git://people.freedesktop.org/~danvet/drm:
  drm/i810: don't acces hw regs in lastclose
  drm/i810: cleanup reclaim_buffers
  drm: kill drm_sman
  drm/sis: use drm_mm instead of drm_sman
  drm/via: use drm_mm instead of drm_sman
  drm/sman: kill user_hash_tab
  drm/sis: track user->memblock mapping with idr
  drm/via: track user->memblock mapping with idr
  drm/sman: rip out owner tracking
  drm/sman: kill owner tracking interface functions
  drm/via: track obj->drm_fd relations in the driver
  drm/sis: track obj->drm_fd relations in the driver
2011-12-22 19:05:01 +00:00
Daniel Vetter 40c34d042d drm/i810: don't acces hw regs in lastclose
i810 uses a userspace provided mmio map using the drm core map
infrastructure. By the time we reach lastclose, this is all gone
and our mmio_map pointer points at freed memory. Depending upon
luck that still works, most often it just oopses.

Aside: drm maps aren't refcounted, so userspace can essentially oops
the kernel any time it wants to. Who cares.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-12-22 19:54:58 +01:00
Daniel Vetter 87499ffdcb drm/i810: cleanup reclaim_buffers
My dear old i815 always hits the deadlocked on reclaim_buffers
warning. Switch over to the idlelock duct-tape on hope that
works better. I've fired up my i815 and now closing glxgears doesn't
take 5 seconds anymore. \o/

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-12-22 19:54:43 +01:00