Commit Graph

660 Commits

Author SHA1 Message Date
Maxime Ripard 6e20602032 clocksource/drivers/sun5i: Fix cpufreq interaction with sched_clock()
The sun5i timer is used as the sched-clock on certain systems, and ever
since we started using cpufreq, the cpu clock (that is one of the
timer's clock indirect parent) now changes as well, along with the
actual sched_clock() rate.

This is not accurate and not desirable.

We can safely remove the sun5i sched-clock on those systems, since we
have other reliable sched_clock() sources in the system.

Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[ Improved the changelog. ]
Cc: richard@nod.at
Link: http://lkml.kernel.org/r/1427362029-6511-4-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-03-26 10:59:40 +01:00
Richard Weinberger 11bc26fe37 clocksource/drivers: Fix various !CONFIG_HAS_IOMEM build errors
Fix !CONFIG_HAS_IOMEM related build failures in three clocksource drivers.

The build failures have the pattern of:

  drivers/clocksource/sh_cmt.c: In function ‘sh_cmt_map_memory’: drivers/clocksource/sh_cmt.c:920:2:
  error: implicit declaration of function ‘ioremap_nocache’ [-Werror=implicit-function-declaration]   cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem));

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: maxime.ripard@free-electrons.com
Link: http://lkml.kernel.org/r/1427362029-6511-1-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-03-26 10:59:40 +01:00
Yongbae Park 1096be084a clockevents: sun5i: Fix setup_irq init sequence
The interrupt is enabled before the handler is set. Even this bug
did not appear, it is potentially dangerous as it can lead to a
NULL pointer dereference.

Fix the error by enabling the interrupt after
clockevents_config_and_register() is called.

Cc: stable@vger.kernel.org
Signed-off-by: Yongbae Park <yongbae2@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-03-05 15:01:37 +01:00
Yongbae Park 7b8f10da3b clocksource: efm32: Fix a NULL pointer dereference
The initialisation of the efm32 clocksource first sets up the irq and only
after that initialises the data needed for irq handling. In case this
initialisation is delayed the irq handler would dereference a NULL pointer.

I'm not aware of anything that could delay the process in such a way, but it's
better to be safe than sorry, so setup the irq only when the clock event device
is ready.

Cc: stable@vger.kernel.org
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Yongbae Park <yongbae2@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-03-05 15:01:36 +01:00
Robert Jarzmik 6f2116ebe2 clocksource: pxa: Fix section mismatch
As pxa_timer_common_init() is only called in init context, mark it as
such, and quiesce the compiler warnings :
WARNING: vmlinux.o(.text.unlikely+0x45d4): Section mismatch in reference
from the function pxa_timer_common_init() to the function
.init.text:sched_clock_register()

WARNING: vmlinux.o(.text.unlikely+0x4610): Section mismatch in reference
from the function pxa_timer_common_init() to the function
.init.text:clocksource_mmio_init()

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-02-25 10:28:55 +01:00
Matthias Brugger d4a19eb3b1 clocksource: mtk: Fix race conditions in probe code
We have two race conditions in the probe code which could lead to a null
pointer dereference in the interrupt handler.

The interrupt handler accesses the clockevent device, which may not yet be
registered.

First race condition happens when the interrupt handler gets registered before
the interrupts get disabled. The second race condition happens when the
interrupts get enabled, but the clockevent device is not yet registered.

Fix that by disabling the interrupts before we register the interrupt and enable
the interrupts after the clockevent device got registered.

Reported-by: Gongbae Park <yongbae2@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-02-25 10:28:49 +01:00
Daniel Lezcano a8b1b9fc92 clockevents: asm9260: Fix compilation error with sparc/sparc64 allyesconfig
The Kconfig options for the asm9260 timer is wrong as it can be selected by
another platform with allyes config and thus leading to a compilation failure
as some non arch related code is pulled by the compilation.

Fix this by having the platform Kconfig to select the timer as it is done for
the others drivers.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Oleksij Rempel <linux@rempel-privat.de>

Conflicts:
	drivers/clocksource/Kconfig
2015-02-25 10:28:22 +01:00
Linus Torvalds 878ba61aa9 ARM: SoC platform changes
New and updated SoC support. Also included are some cleanups where the
 platform maintainers hadn't separated cleanups from new developent in
 separate branches.
 
 Some of the larger things worth pointing out:
 
 - A large set of changes from Alexandre Belloni and Nicolas Ferre
   preparing at91 platforms for multiplatform and cleaning up quite a
   bit in the process.
 - Removal of CSR's "Marco" SoC platform that never made it out to the
   market. We love seeing these since it means the vendor published
   support before product was out, which is exactly what we want!
 
 New platforms this release are:
 
 - Conexant Digicolor (CX92755 SoC)
 - Hisilicon HiP01 SoC
 - CSR/sirf Atlas7 SoC
 - ST STiH418 SoC
 - Common code changes for Nvidia Tegra132 (64-bit SoC)
 
 We're seeing more and more platforms having a harder time labelling
 changes as cleanups vs new development -- which is a good sign that
 we've come quite far on the cleanup effort. So over time we might start
 combining the cleanup and new-development branches more.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
2015-02-17 09:27:54 -08:00
Linus Torvalds 8c334ce8f0 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull clocksource updates from Ingo Molnar:
 "The main change in this tree is the addition of various new SoC
  clocksource/clockevents drivers: Conexant Digicolor SoCs, rockchip
  rk3288 board, asm9260 for MIPS and versatile AB/PB boards"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  dts: versatile: Add sysregs node
  clocksource: versatile: Adapt for Versatile AB and PB boards
  dt/bindings: Add binding for Versatile system registers
  clocksource: Driver for Conexant Digicolor SoC timer
  clocksource: devicetree: Document Conexant Digicolor timer binding
  clockevents: rockchip: Add rockchip timer for rk3288
  ARM: clocksource: Add asm9260_timer driver
  clocksource: marco: Rename marco to atlas7
  clocksource: sirf: Remove unused variable
2015-02-16 15:26:10 -08:00
Linus Torvalds 42cf0f203e Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:

 - clang assembly fixes from Ard

 - optimisations and cleanups for Aurora L2 cache support

 - efficient L2 cache support for secure monitor API on Exynos SoCs

 - debug menu cleanup from Daniel Thompson to allow better behaviour for
   multiplatform kernels

 - StrongARM SA11x0 conversion to irq domains, and pxa_timer

 - kprobes updates for older ARM CPUs

 - move probes support out of arch/arm/kernel to arch/arm/probes

 - add inline asm support for the rbit (reverse bits) instruction

 - provide an ARM mode secondary CPU entry point (for Qualcomm CPUs)

 - remove the unused ARMv3 user access code

 - add driver_override support to AMBA Primecell bus

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (55 commits)
  ARM: 8256/1: driver coamba: add device binding path 'driver_override'
  ARM: 8301/1: qcom: Use secondary_startup_arm()
  ARM: 8302/1: Add a secondary_startup that assumes ARM mode
  ARM: 8300/1: teach __asmeq that r11 == fp and r12 == ip
  ARM: kprobes: Fix compilation error caused by superfluous '*'
  ARM: 8297/1: cache-l2x0: optimize aurora range operations
  ARM: 8296/1: cache-l2x0: clean up aurora cache handling
  ARM: 8284/1: sa1100: clear RCSR_SMR on resume
  ARM: 8283/1: sa1100: collie: clear PWER register on machine init
  ARM: 8282/1: sa1100: use handle_domain_irq
  ARM: 8281/1: sa1100: move GPIO-related IRQ code to gpio driver
  ARM: 8280/1: sa1100: switch to irq_domain_add_simple()
  ARM: 8279/1: sa1100: merge both GPIO irqdomains
  ARM: 8278/1: sa1100: split irq handling for low GPIOs
  ARM: 8291/1: replace magic number with PAGE_SHIFT macro in fixup_pv code
  ARM: 8290/1: decompressor: fix a wrong comment
  ARM: 8286/1: mm: Fix dma_contiguous_reserve comment
  ARM: 8248/1: pm: remove outdated comment
  ARM: 8274/1: Fix DEBUG_LL for multi-platform kernels (without PL01X)
  ARM: 8273/1: Seperate DEBUG_UART_PHYS from DEBUG_LL on EP93XX
  ...
2015-02-12 08:51:56 -08:00
Russell King df9ab9771c Merge branch 'devel-stable' into for-next 2015-02-10 10:26:38 +00:00
Rob Herring f2fa0299d3 clocksource: versatile: Adapt for Versatile AB and PB boards
The same 24MHz counter is also present on Versatile AB and PB boards, so
add the compatible string for them.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-29 14:02:16 +01:00
Baruch Siach 9b8bb7736b clocksource: Driver for Conexant Digicolor SoC timer
Add clocksource driver to the Conexant CX92755 SoC, part of the Digicolor SoCs
series. Hardware provides 8 timers, A to H. Timer A is dedicated to a future
watchdog driver so we don't use it here. Use timer B for sched_clock, and timer
C for clock_event.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-29 14:02:15 +01:00
Daniel Lezcano 468b8c4cf3 clockevents: rockchip: Add rockchip timer for rk3288
The rk3288 board uses the architected timers and these ones are shutdown when
the cpu is powered down. There is a need of a broadcast timer in this case to
ensure proper wakeup when the cpus are in sleep mode and a timer expires.

This driver provides the basic timer functionnality as a backup for the local
timers at sleep time.

The timer belongs to the alive subsystem. It includes two programmables 64 bits
timer channels but the driver only uses 32bits. It works with two operations
mode: free running and user defined count.

Programing sequence:

1. Timer initialization:
 * Disable the timer by writing '0' to the CONTROLREG register
 * Program the timer mode by writing the mode to the CONTROLREG register
 * Set the interrupt mask

2. Setting the count value:
 * Load the count value to the registers COUNT0 and COUNT1 (not used).

3. Enable the timer
 * Write '1' to the CONTROLREG register with the mode (free running or user)

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2015-01-29 14:02:13 +01:00
Oleksij Rempel 8d8bd7be8b ARM: clocksource: Add asm9260_timer driver
In some cases asm9260 looks similar to iMX2x. One of exceptions is
timer controller. So this patch introduces new driver for this special case.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-29 14:02:06 +01:00
Barry Song 5833ac9865 clocksource: marco: Rename marco to atlas7
marco project is replaced by atlas7 and we should obliterate
its all traces.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-29 14:02:06 +01:00
David S. Miller 95f873f2ff Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
	arch/arm/boot/dts/imx6sx-sdb.dts
	net/sched/cls_bpf.c

Two simple sets of overlapping changes.

Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-27 16:59:56 -08:00
Linus Torvalds b73f0c8f4b Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner:
 "A set of small fixes:

   - regression fix for exynos_mct clocksource

   - trivial build fix for kona clocksource

   - functional one liner fix for the sh_tmu clocksource

   - two validation fixes to prevent (root only) data corruption in the
     kernel via settimeofday and adjtimex.  Tagged for stable"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  time: adjtimex: Validate the ADJ_FREQUENCY values
  time: settimeofday: Validate the values of tv from user
  clocksource: sh_tmu: Set cpu_possible_mask to fix SMP broadcast
  clocksource: kona: fix __iomem annotation
  clocksource: exynos_mct: Fix bitmask regression for exynos4_mct_write
2015-01-25 17:47:34 -08:00
Thierry Reding d072c9658c clocksource: sirf: Remove unused variable
Commit ef89af1f43 ("clocksource: sirf: Remove hard-coded clock rate")
removes all uses of the timer_div variable. Since the variable is no
longer used it should be removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-25 22:32:31 +01:00
Olof Johansson 82483ad67e ARM: tegra: Core code changes for v3.20
This contains a couple of preparatory patches for 64-bit support. A new
 feature is implemented in the power-management controller which allows
 it to switch off the SoC if it overheats.
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Merge tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc

Merge "ARM: tegra: Core code changes for v3.20" from Thierry Reding:

This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.

* tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc: tegra: Add thermal reset (thermtrip) support to PMC
  ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
  of: Add descriptions of thermtrip properties to Tegra PMC bindings
  soc/tegra: pmc: Add Tegra132 support
  soc/tegra: fuse: Add Tegra132 support
  soc/tegra: fuse: Constify tegra_fuse_info structures
  soc/tegra: Add Tegra132 support
  clocksource: Build Tegra timer on 32-bit ARM only
  soc/tegra: pmc: restrict compilation of suspend-related support to ARM

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-01-23 14:53:54 -08:00
Dmitry Eremin-Solenikov e074ff86e8 ARM: 8251/1: clocksource: enable pxa_timer for SA-1100 platform
SA-11x0 platform used the same IP block as was used on PXA. Consequently
it makes sense to have only one driver. Enable pxa_timer clocksource for
StrongARM platform.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-14 11:28:29 +00:00
Thierry Reding 910978e753 clocksource: Build Tegra timer on 32-bit ARM only
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this
driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which
can be selected by the various SoCs.

This is useful to disable building the driver on Tegra132 (64-bit ARM)
where it doesn't currently compile but also isn't needed (yet).

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-09 14:45:43 +01:00
David S. Miller 44d84d7272 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 2015-01-06 22:29:20 -05:00
Richard Cochran 7c8f1e7861 arm_arch_timer: include clocksource.h directly
This driver makes use of the clocksource code. Previously it had only
included the proper header indirectly, but that chain was inadvertently
broken by 74d23cc "time: move the timecounter/cyclecounter code into its
own file."

This patch fixes the issue by including clocksource.h directly.

Signed-off-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-06 13:18:50 -05:00
Magnus Damm f2a5473861 clocksource: sh_tmu: Set cpu_possible_mask to fix SMP broadcast
Update the TMU driver to use cpu_possible_mask as cpumask to make
r8a7779 SMP work as expected with or without the ARM TWD timer.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-05 14:43:37 +01:00
Olof Johansson ff4bcc84a9 clocksource: kona: fix __iomem annotation
It makes no sense to hide the __iomem annotation from the function
that uses it, especially since it causes a sparse warning:

drivers/clocksource/bcm_kona_timer.c:118:38: warning: incorrect type in argument 1 (different address spaces)
drivers/clocksource/bcm_kona_timer.c:118:38:    expected void *timer_base
drivers/clocksource/bcm_kona_timer.c:118:38:    got void [noderef] <asn:2>*static [toplevel] tmr_regs

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-05 14:43:36 +01:00
Tobias Jakobi 8c38d28ba8 clocksource: exynos_mct: Fix bitmask regression for exynos4_mct_write
EXYNOS4_MCT_L_MASK is defined as 0xffffff00, so applying this bitmask
produces a number outside the range 0x00 to 0xff, which always results
in execution of the default switch statement.

Obviously this is wrong and git history shows that the bitmask inversion
was incorrectly set during a refactoring of the MCT code.

Fix this by putting the inversion at the correct position again.

Cc: stable@vger.kernel.org
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reported-by: GP Orcullo <kinsamanka@gmail.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-01-05 14:43:35 +01:00
Arnd Bergmann 7ebdfaa52d Fixes for 3.19
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Merge tag 'mvebu-fixes-3.19' of git://git.infradead.org/linux-mvebu into fixes

Pull "Fixes for 3.19" from Andrew Lunn:

Jason is taking a back seat this cycle and i'm doing all the patch
wrangling for mvebu.

* tag 'mvebu-fixes-3.19' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: Fix pinctrl configuration for Armada 370 DB

Also update to Linux 3.19-rc1, which this was based on.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-30 15:27:20 +01:00
Catalin Marinas d6ad369130 clocksource: arch_timer: Only use the virtual counter (CNTVCT) on arm64
Commit 0b46b8a718 (clocksource: arch_timer: Fix code to use physical
timers when requested) introduces the use of physical counters in the
ARM architected timer driver. However, he arm64 kernel uses CNTVCT in
VDSO. When booting in EL2, the kernel switches to the physical timers to
make things easier for KVM but it continues to use the virtual counter
both in user and kernel. While in such scenario CNTVCT == CNTPCT (since
CNTVOFF is initialised by the kernel to 0), we want to spot firmware
bugs corrupting CNTVOFF early (which would affect CNTVCT).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-16 22:26:44 +01:00
Linus Torvalds c0222ac086 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is an unusually large pull request for MIPS - in parts because
  lots of patches missed the 3.18 deadline but primarily because some
  folks opened the flood gates.

   - Retire the MIPS-specific phys_t with the generic phys_addr_t.
   - Improvments for the backtrace code used by oprofile.
   - Better backtraces on SMP systems.
   - Cleanups for the Octeon platform code.
   - Cleanups and fixes for the Loongson platform code.
   - Cleanups and fixes to the firmware library.
   - Switch ATH79 platform to use the firmware library.
   - Grand overhault to the SEAD3 and Malta interrupt code.
   - Move the GIC interrupt code to drivers/irqchip
   - Lots of GIC cleanups and updates to the GIC code to use modern IRQ
     infrastructures and features of the kernel.
   - OF documentation updates for the GIC bindings
   - Move GIC clocksource driver to drivers/clocksource
   - Merge GIC clocksource driver with clockevent driver.
   - Further updates to bring the GIC clocksource driver up to date.
   - R3000 TLB code cleanups
   - Improvments to the Loongson 3 platform code.
   - Convert pr_warning to pr_warn.
   - Merge a bunch of small lantiq and ralink fixes that have been
     staged/lingering inside the openwrt tree for a while.
   - Update archhelp for IP22/IP32
   - Fix a number of issues for Loongson 1B.
   - New clocksource and clockevent driver for Loongson 1B.
   - Further work on clk handling for Loongson 1B.
   - Platform work for Broadcom BMIPS.
   - Error handling cleanups for TurboChannel.
   - Fixes and optimization to the microMIPS support.
   - Option to disable the FTLB.
   - Dump more relevant information on machine check exception
   - Change binfmt to allow arch to examine PT_*PROC headers
   - Support for new style FPU register model in O32
   - VDSO randomization.
   - BCM47xx cleanups
   - BCM47xx reimplement the way the kernel accesses NVRAM information.
   - Random cleanups
   - Add support for ATH25 platforms
   - Remove pointless locking code in some PCI platforms.
   - Some improvments to EVA support
   - Minor Alchemy cleanup"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits)
  MIPS: Add MFHC0 and MTHC0 instructions to uasm.
  MIPS: Cosmetic cleanups of page table headers.
  MIPS: Add CP0 macros for extended EntryLo registers
  MIPS: Remove now unused definition of phys_t.
  MIPS: Replace use of phys_t with phys_addr_t.
  MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT
  PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig.
  MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery
  MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO
  MIPS: <asm/types.h> fix indentation.
  MAINTAINERS: Add entry for BMIPS multiplatform kernel
  MIPS: Enable VDSO randomization
  MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
  MIPS: Remove declaration of obsolete arch_init_clk_ops()
  MIPS: atomic.h: Reformat to fit in 79 columns
  MIPS: Apply `.insn' to fixup labels throughout
  MIPS: Fix microMIPS LL/SC immediate offsets
  MIPS: Kconfig: Only allow 32-bit microMIPS builds
  MIPS: signal.c: Fix an invalid cast in ISA mode bit handling
  MIPS: mm: Only build one microassembler that is suitable
  ...
2014-12-11 17:56:37 -08:00
Linus Torvalds a157508c97 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer core updates from Thomas Gleixner:
 "The time(r) departement provides:

   - more infrastructure work on the year 2038 issue

   - a few fixes in the Armada SoC timers

   - the usual pile of fixlets and improvements"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource: armada-370-xp: Use the reference clock on A375 SoC
  watchdog: orion: Use the reference clock on Armada 375 SoC
  clocksource: armada-370-xp: Add missing clock enable
  time: Fix sign bug in NTP mult overflow warning
  time: Remove timekeeping_inject_sleeptime()
  rtc: Update suspend/resume timing to use 64bit time
  rtc/lib: Provide y2038 safe rtc_tm_to_time()/rtc_time_to_tm() replacement
  time: Fixup comments to reflect usage of timespec64
  time: Expose get_monotonic_coarse64() for in-kernel uses
  time: Expose getrawmonotonic64 for in-kernel uses
  time: Provide y2038 safe mktime() replacement
  time: Provide y2038 safe timekeeping_inject_sleeptime() replacement
  time: Provide y2038 safe do_settimeofday() replacement
  time: Complete NTP adjustment threshold judging conditions
  time: Avoid possible NTP adjustment mult overflow.
  time: Rename udelay_test.c to test_udelay.c
  clocksource: sirf: Remove hard-coded clock rate
2014-12-10 08:18:32 -08:00
Linus Torvalds 3a647c1d7a ARM: SoC driver updates for 3.19
These are changes for drivers that are intimately tied to some SoC
 and for some reason could not get merged through the respective
 subsystem maintainer tree.
 
 The largest single change here this time around is the Tegra
 iommu/memory controller driver, which gets updated to the new
 iommu DT binding. More drivers like this are likely to follow
 for the following merge window, but we should be able to do
 those through the iommu maintainer.
 
 Other notable changes are:
 * reset controller drivers from the reset maintainer (socfpga, sti, berlin)
 * fixes for the keystone navigator driver merged last time
 * at91 rtc driver changes related to the at91 cleanups
 * ARM perf driver changes from Will Deacon
 * updates for the brcmstb_gisb driver
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are changes for drivers that are intimately tied to some SoC and
  for some reason could not get merged through the respective subsystem
  maintainer tree.

  The largest single change here this time around is the Tegra
  iommu/memory controller driver, which gets updated to the new iommu DT
  binding.  More drivers like this are likely to follow for the
  following merge window, but we should be able to do those through the
  iommu maintainer.

  Other notable changes are:
   - reset controller drivers from the reset maintainer (socfpga, sti,
     berlin)
   - fixes for the keystone navigator driver merged last time
   - at91 rtc driver changes related to the at91 cleanups
   - ARM perf driver changes from Will Deacon
   - updates for the brcmstb_gisb driver"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
  clocksource: arch_timer: Fix code to use physical timers when requested
  memory: Add NVIDIA Tegra memory controller support
  bus: brcmstb_gisb: Add register offset tables for older chips
  bus: brcmstb_gisb: Look up register offsets in a table
  bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
  bus: brcmstb_gisb: Make the driver buildable on MIPS
  of: Add NVIDIA Tegra memory controller binding
  ARM: tegra: Move AHB Kconfig to drivers/amba
  amba: Add Kconfig file
  clk: tegra: Implement memory-controller clock
  serial: samsung: Fix serial config dependencies for exynos7
  bus: brcmstb_gisb: resolve section mismatch
  ARM: common: edma: edma_pm_resume may be unused
  ARM: common: edma: add suspend resume hook
  powerpc/iommu: Rename iommu_[un]map_sg functions
  rtc: at91sam9: add DT bindings documentation
  rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK
  ARM: at91: add clk_lookup entry for RTT devices
  rtc: at91sam9: rework the Kconfig description
  ...
2014-12-09 14:48:22 -08:00
Linus Torvalds 6cd94d5e57 ARM: SoC platform changes for 3.19
New and updated SoC support, notable changes include:
 
 * bcm: brcmstb SMP support
 * bcm: initial iproc/cygnus support
 * exynos: Exynos4415 SoC support
 * exynos: PMU and suspend support for Exynos5420
 * exynos: PMU support for Exynos3250
 * exynos: pm related maintenance
 * imx: new LS1021A SoC support
 * imx: vybrid 610 global timer support
 * integrator: convert to using multiplatform configuration
 * mediatek: earlyprintk support for mt8127/mt8135
 * meson: meson8 soc and l2 cache controller support
 * mvebu: Armada 38x CPU hotplug support
 * mvebu: drop support for prerelease Armada 375 Z1 stepping
 * mvebu: extended suspend support, now works on Armada 370/XP
 * omap: hwmod related maintenance
 * omap: prcm cleanup
 * pxa: initial pxa27x DT handling
 * rockchip: SMP support for rk3288
 * rockchip: add cpu frequency scaling support
 * shmobile: r8a7740 power domain support
 * shmobile: various small restart, timer, pci apmu changes
 * sunxi: Allwinner A80 (sun9i) earlyprintk support
 * ux500: power domain support
 
 Overall, a significant chunk of changes, coming mostly from
 the usual suspects: omap, shmobile, samsung and mvebu, all of
 which already contain a lot of platform specific code in
 arch/arm.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support, notable changes include:

   - bcm:
        brcmstb SMP support
        initial iproc/cygnus support
   - exynos:
        Exynos4415 SoC support
        PMU and suspend support for Exynos5420
        PMU support for Exynos3250
        pm related maintenance
   - imx:
        new LS1021A SoC support
        vybrid 610 global timer support
   - integrator:
        convert to using multiplatform configuration
   - mediatek:
        earlyprintk support for mt8127/mt8135
   - meson:
        meson8 soc and l2 cache controller support
   - mvebu:
        Armada 38x CPU hotplug support
        drop support for prerelease Armada 375 Z1 stepping
        extended suspend support, now works on Armada 370/XP
   - omap:
        hwmod related maintenance
        prcm cleanup
   - pxa:
        initial pxa27x DT handling
   - rockchip:
        SMP support for rk3288
        add cpu frequency scaling support
   - shmobile:
        r8a7740 power domain support
        various small restart, timer, pci apmu changes
   - sunxi:
        Allwinner A80 (sun9i) earlyprintk support
   - ux500:
        power domain support

  Overall, a significant chunk of changes, coming mostly from the usual
  suspects: omap, shmobile, samsung and mvebu, all of which already
  contain a lot of platform specific code in arch/arm"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
  ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
  soc: integrator: Add terminating entry for integrator_cm_match
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  ARM: add lolevel debug support for asm9260
  ARM: add mach-asm9260
  ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
  power: reset: imx-snvs-poweroff: add power off driver for i.mx6
  ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
  ...
2014-12-09 14:38:28 -08:00
Linus Torvalds 0563fdc0d9 ARM: SoC cleanup on mach-at91 for 3.19
On Atmel AT91, the conversion to device tree is now considered complete,
 and all machines that were not already converted in 3.18 are assumed to
 be unused and dropped by the maintainer.
 
 All remaining board files that were written in C are dropped, and the
 ancient at91x40 sub-platform (based on an MMU-less ARM7) is removed
 altogether.  Cleaning up the last pieces was great fun, so I took the
 time to do some of the coding myself and removed several hundred code
 lines that ended up unused after the board files were done.
 
 There are still a couple of AT91 specific device drivers that are not
 converted to DT (CF, USB-OTG) and currently not working, and the platform
 itself is not "multiplatform"-enabled, but both issues are going to be
 taken care of in the 3.20 cycle.
 
 This is split out from the other cleanups purely based on the size
 of the branch.
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Merge tag 'at91-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanup on mach-at91 from Arnd Bergmann:
 "On Atmel AT91, the conversion to device tree is now considered
  complete, and all machines that were not already converted in 3.18 are
  assumed to be unused and dropped by the maintainer.

  All remaining board files that were written in C are dropped, and the
  ancient at91x40 sub-platform (based on an MMU-less ARM7) is removed
  altogether.  Cleaning up the last pieces was great fun, so I took the
  time to do some of the coding myself and removed several hundred code
  lines that ended up unused after the board files were done.

  There are still a couple of AT91 specific device drivers that are not
  converted to DT (CF, USB-OTG) and currently not working, and the
  platform itself is not "multiplatform"-enabled, but both issues are
  going to be taken care of in the 3.20 cycle.

  This is split out from the other cleanups purely based on the size of
  the branch"

* tag 'at91-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (33 commits)
  ARM: at91: remove unused board.h file
  ARM: at91: remove unneeded header files
  ARM: at91/clocksource: remove !DT PIT initializations
  ARM: at91: at91rm9200 ST initialization is now DT only
  ARM: at91: remove old AT91-specific drivers
  ARM: at91: cleanup initilisation code by removing dead code
  ARM: at91/Kconfig: select board files automatically
  ARM: at91: remove unused IRQ function declarations
  ARM: at91: remove legacy IRQ driver and related code
  ARM: at91: remove old at91-specific clock driver
  ARM: at91: remove clock data in at91sam9n12.c and at91sam9x5.c files
  ARM: at91: remove all !DT related configuration options
  ARM: at91/trivial: update Kconfig comment to mention SAMA5
  ARM: at91: always USE_OF from now on
  ARM: at91/Kconfig: remove ARCH_AT91RM9200 option for drivers
  ARM: at91: switch configuration option to SOC_AT91RM9200
  ARM: at91: remove at91rm9200 legacy board support
  ARM: at91: remove at91rm9200 legacy boards files
  ARM: at91/Kconfig: remove useless fbdev Kconfig options
  ARM: at91: remove at91sam9261/at91sam9g10 legacy board support
  ...
2014-12-09 14:17:12 -08:00
Arnd Bergmann 5db4500257 Merge branch 'at91/cleanup5' into next/drivers
The at91 cleanups changed a lot of files, this merges in the
latest cleanups to resolve the conflicts

Conflicts:
	arch/arm/mach-at91/at91sam9260.c
	arch/arm/mach-at91/at91sam9261.c
	arch/arm/mach-at91/at91sam9263.c
	arch/arm/mach-at91/clock.c
	arch/arm/mach-at91/clock.h
	drivers/rtc/Kconfig

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-08 18:29:20 +01:00
Olof Johansson 6b34df9e30 Merge branch 'clocksource/physical-timers' into next/drivers
* clocksource/physical-timers:
  clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
  clocksource: arch_timer: Fix code to use physical timers when requested
2014-12-04 23:32:16 -08:00
Doug Anderson 65b5732d24 clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
Some 32-bit (ARMv7) systems are architected like this:

* The firmware doesn't know and doesn't care about hypervisor mode and
  we don't want to add the complexity of hypervisor there.

* The firmware isn't involved in SMP bringup or resume.

* The ARCH timer come up with an uninitialized offset (CNTVOFF)
  between the virtual and physical counters.  Each core gets a
  different random offset.

* The device boots in "Secure SVC" mode.

* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
  CNTHCTL.PL1PCTEN (both default to 1 at reset)

On systems like the above, it doesn't make sense to use the virtual
counter.  There's nobody managing the offset and each time a core goes
down and comes back up it will get reinitialized to some other random
value.

This adds an optional property which can inform the kernel of this
situation, and firmware is free to remove the property if it is going
to initialize the CNTVOFF registers when each CPU comes out of reset.

Currently, the best course of action in this case is to use the
physical timer, which is why it is important that CNTHCTL hasn't been
changed from its reset value and it's a reasonable assumption given
that the firmware has never entered HYP mode.

Note that it's been said that on ARMv8 systems the firmware and
kernel really can't be architected as described above.  That means
using the physical timer like this really only makes sense for ARMv7
systems.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:31:55 -08:00
Sonny Rao 0b46b8a718 clocksource: arch_timer: Fix code to use physical timers when requested
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false.  It restores the
arch_counter_get_cntpct() function after removal in

0d651e4e "clocksource: arch_timer: use virtual counters"

We need this on certain ARMv7 systems which are architected like this:

* The firmware doesn't know and doesn't care about hypervisor mode and
  we don't want to add the complexity of hypervisor there.

* The firmware isn't involved in SMP bringup or resume.

* The ARCH timer come up with an uninitialized offset between the
  virtual and physical counters.  Each core gets a different random
  offset.

* The device boots in "Secure SVC" mode.

* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
  CNTHCTL.PL1PCTEN (both default to 1 at reset)

One example of such as system is RK3288 where it is much simpler to
use the physical counter since there's nobody managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.

Fixes: 0d651e4e65 ("clocksource: arch_timer: use virtual counters")
Cc: stable@vger.kernel.org
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:30:26 -08:00
Arnd Bergmann ab64920c37 mvebu SoC suspend changes for v3.19
- Armada 370/XP suspend/resume support
 
  - mvebu SoC driver suspend/resume support
     - irqchip
     - clocksource
     - mbus
     - clk
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Merge tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu into next/soc

Pull "mvebu SoC suspend changes for v3.19" from Jason Cooper:

 - Armada 370/XP suspend/resume support

 - mvebu SoC driver suspend/resume support
    - irqchip
    - clocksource
    - mbus
    - clk

* tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-04 16:46:43 +01:00
Arnd Bergmann 50755f6f03 ARM: at91/clocksource: remove !DT PIT initializations
As AT91 !DT code is now removed, cleanup the PIT clocksource driver.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[nicolas.ferre@atmel.com: split patch]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-12-03 14:15:52 +01:00
Thomas Petazzoni f9a49ab53a clocksource: time-armada-370-xp: add suspend/resume support
This commit adds a set of suspend/resume syscore_ops to respectively
save and restore a number of timer registers, in order to make sure
the clockevent and clocksource devices continue to work properly
across a suspend/resume cycle.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lkml.kernel.org/r/1416585613-2113-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-30 16:40:09 +00:00
Thomas Gleixner 89de77a8c5 Merge branch 'clockevents/3.19' of http://git.linaro.org/people/daniel.lezcano/linux into timers/core
Daniel Lezcano muttered:

 * Marvell timer updates from Ezequiel Garcia
   - Add missing clock enable calls for armada
   - Change source clock for clocksource and watchdog
 * SIRF timer updates from Yanchang Li
   - Make clock rate configurable
2014-11-27 11:47:38 +01:00
Ezequiel Garcia 4a22d9c93a clocksource: armada-370-xp: Use the reference clock on A375 SoC
The 25 MHz reference clock has better stability so its use is preferred over the
core clock.

This commit takes advantage of the already introduced Armada 375 devicetree
compatible string and adds a new timer initialization. If available, the timer
will use the reference clock (named as 'fixed'). Otherwise, it falls back to the
previous behavior.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-11-26 13:51:08 +01:00
Ezequiel Garcia 551f2fd5c6 clocksource: armada-370-xp: Add missing clock enable
This commit makes sure the timer clock is prepared and enabled
before retrieving its rate.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-11-26 13:51:07 +01:00
Andrew Bresticker e12aa828ff clocksource: mips-gic: Add device-tree support
Parse the GIC timer frequency and interrupt from the device-tree.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8421/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:30 +01:00
Andrew Bresticker a45da56598 clocksource: mips-gic: Bump up rating of GIC timer
Bump up the rating of the GIC timer so that it gets prioritized
over the CP0 timer.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8141/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:16 +01:00
Andrew Bresticker b695d8e6ad clocksource: mips-gic: Use clockevents_config_and_register
Use clockevents_config_and_register to setup the clock_event_device
based on frequency and min/max ticks instead of doing it ourselves.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8140/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:16 +01:00
Andrew Bresticker e4752dbbc3 clocksource: mips-gic: Use CPU notifiers to setup the timer
Instead of requiring an explicit call to gic_clockevent_init in the SMP
startup path, use CPU notifiers to register and enable the GIC timer on
CPU startup.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8139/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:16 +01:00
Andrew Bresticker f7ea3060b6 clocksource: mips-gic: Use percpu_dev_id
Since the GIC timer IRQ is a percpu IRQ, we can use percpu_dev_id
to pass the IRQ handler the correct clock_event_device.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8138/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:15 +01:00
Andrew Bresticker 001f5fe72c clocksource: mips-gic: Remove gic_event_handler
Remove gic_event_handler since it is completely unnecessary.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8136/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:15 +01:00