Relevant changes concerning the kernel are:
- different placement of the SR_VS bit for the vector unit status
- different encoding of the vsetvli instruction
- different instructions for loads and stores
And a fixed VLEN of 128.
The in-kernel access to vector instances is limited to the save and
restore of process states so the above mentioned areas can simply be
handled via the alternatives framework, similar to other T-Head specific
issues.
TODO:
FIXME: Do real vstate discard in __riscv_v_vstate_discard!
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Guo Ren <guoren@kernel.org>
Tested-by: Chen Pei <cp0613@linux.alibaba.com>
Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
RISC-V was lacking a membarrier implementation for the store/fetch
ordering, which is a bit tricky because of the deferred icache flushing
we use in RISC-V.
* b4-shazam-merge:
membarrier: riscv: Provide core serializing command
locking: Introduce prepare_sync_core_cmd()
membarrier: Create Documentation/scheduler/membarrier.rst
membarrier: riscv: Add full memory barrier in switch_mm()
Link: https://lore.kernel.org/r/20240131144936.29190-1-parri.andrea@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Modified the gpio clock-names in GPIO nodes so mango dts could
adapt to Designware gpio controller driver, then gpio bus clock
and gpio debounce clock would be enabled.
I also force enable the gpio interrupt clock in sophgo clock
system so that the gpio interrupt trigger could take effect.
Signed-off-by: chunzhi.lin <chunzhi.lin@sophgo.com>
- support KVM
- support IPMI System Interface (KCS)
- exchange messages and data between the AST2600 BMC and the Host SG2042
over PCIe link using BAR1. Have to set the KCS channel offset is
0x0e80 according to the AST2600 User Guide.
- drivers/rtc: Add rtc-astbmc module.
- drivers/char/ipmi: Initialize ipmi_si module using hardcode method.
- rtc-astbmc module is initialized before ipmi_si module.
Signed-off-by: jingyu.li01 <jingyu.li01@sophgo.com>
Signed-off-by: zhaohui-yan <zhaohui.yan@sophgo.com>
These are loop counters which is inherently unsigned. Therefore make
them unsigned. Moreover it also fixes alloc-size-larger-than
error with gcc-13, where malloc can be called with (-1) due to tmp_len
being an int type.
Fixes
| cpumap.c:366:20: error: argument 1 range [18446744065119617024, 18446744073709551612] exceeds maximum object size 9223372036854775807 [-Werror=alloc-size-larger-than=]
| 366 | tmp_cpus = malloc(tmp_len * sizeof(struct perf_cpu));
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Upstream-Status: Submitted [https://lore.kernel.org/linux-perf-users/20230123211310.127532-1-raj.khem@gmail.com/T/#u]
kexec to another kernel without deinit device will cause power
management part init failed in new kernel.
when reading from system file 'freq1_input', an oops occur.
Signed-off-by: Chao Wei <chao.wei@sophgo.com>
"warning Unfortunate NUMA and NUMA Balancing config,
growing page-frame for last_cpupid"
because MAX_PHYSMEM_BITS is too large,
when LAST_CPUPID_NOT_IN_PAGE_FLAGS is defined.
To solve the problem of asynchronous multi-chip clocks,
the local timer has been replaced with an APB timer.
Signed-off-by: haijiao.liu <haijiao.liu@sophgo.com>
High memory function is developed because T-HEAD C920
supports max 39-bit virtual address spaces(sv39).
High memory function can remove when other RISCV64 SoC
supports sv48 or higher.
RISC-V uses kernel_fpu_begin()/kernel_fpu_end() like several other
architectures. Enabling hardware FP requires overriding the ISA string
for the relevant compilation units.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Since it is not possible to incrementally add/remove extensions from the
compiler's ISA string by appending arguments, any code that wants to
modify the ISA string must recreate the whole thing. To support this,
factor out the logic for generating the -march argument so it can be
reused where needed.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
This is needed to support recent hardware in the amdgpu DRM driver. The
FPU code in that driver is not performance-critical, so only provide the
minimal support.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Turn on msi-x for top intr. Create msi-x whitelist,
Limited the number of msi-x interrupts for inter x520 and wangxun NIC.
Signed-off-by: chengjun.li <chengjun.li@sophgo.com>
Sophgo SPI Flash Master Controller (SPIFMC) is a master controller to
control serial SPI Flash. Enable CONFIG_SPI_SOPHGO_SPIFMC if you have a
device with a SPIFMC controller and want to access the Flash as a mtd
device.
There is GD25LB512ME Serial Flash on SG2042 EVB, controlled by
SPIFMC.
Signed-off-by: jingyu.li01 <jingyu.li01@sophgo.com>
zhencheng.zhang