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linux-sg2042
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Merge branch '83xx' into for_paulus

This commit is contained in:
Kumar Gala 2007-02-17 16:32:41 -06:00
parent 834aba0959 5af68af5bc
commit ffd8488171
29 changed files with 648 additions and 693 deletions
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9
Documentation/powerpc/booting-without-of.txt
View File

@ -509,7 +509,6 @@ looks like in practice.
o chosen
|- name = "chosen"
|- bootargs = "root=/dev/sda2"
|- linux,platform = <00000600>
|- linux,phandle = <4>
This tree is almost a minimal tree. It pretty much contains the
@ -733,8 +732,7 @@ address which can extend beyond that limit.
that typically get driven by the same platform code in the
kernel, you would use a different "model" property but put a
value in "compatible". The kernel doesn't directly use that
value (see /chosen/linux,platform for how the kernel chooses a
platform type) but it is generally useful.
value but it is generally useful.
The root node is also generally where you add additional properties
specific to your board like the serial number if any, that sort of
@ -842,11 +840,6 @@ address which can extend beyond that limit.
the prom_init() trampoline when booting with an OF client interface,
but that you have to provide yourself when using the flattened format.
Required properties:
- linux,platform : This is your platform number as assigned by the
architecture maintainers
Recommended properties:
- bootargs : This zero-terminated string is passed as the kernel

62
arch/powerpc/boot/dts/mpc8313erdb.dts
View File

@ -11,7 +11,7 @@
/ {
model = "MPC8313ERDB";
compatible = "MPC83xx";
compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
#address-cells = <1>;
#size-cells = <1>;
@ -59,7 +59,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -68,7 +68,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -77,7 +77,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -88,8 +88,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
phy_type = "utmi_wide";
};
@ -99,18 +99,15 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <700>;
interrupts = <13 2>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
interrupts = <13 8>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@4 {
linux,phandle = <2452004>;
interrupt-parent = <700>;
interrupts = <14 2>;
phy4: ethernet-phy@4 {
interrupt-parent = < &ipic >;
interrupts = <14 8>;
reg = <4>;
device_type = "ethernet-phy";
};
@ -123,8 +120,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <25 8 24 8 23 8>;
interrupt-parent = <700>;
phy-handle = <2452001>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1 >;
};
ethernet@25000 {
@ -134,8 +131,8 @@
reg = <25000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <22 8 21 8 20 8>;
interrupt-parent = <700>;
phy-handle = <2452004>;
interrupt-parent = < &ipic >;
phy-handle = < &phy4 >;
};
serial@4500 {
@ -144,7 +141,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -153,7 +150,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8500 {
@ -161,17 +158,17 @@
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
7000 0 0 1 700 12 8
7000 0 0 2 700 12 8
7000 0 0 3 700 12 8
7000 0 0 4 700 12 8
7000 0 0 1 &ipic 12 8
7000 0 0 2 &ipic 12 8
7000 0 0 3 &ipic 12 8
7000 0 0 4 &ipic 12 8
/* IDSEL 0x0F - PCI slot */
7800 0 0 1 700 11 8
7800 0 0 2 700 12 8
7800 0 0 3 700 11 8
7800 0 0 4 700 12 8>;
interrupt-parent = <700>;
7800 0 0 1 &ipic 11 8
7800 0 0 2 &ipic 12 8
7800 0 0 3 &ipic 11 8
7800 0 0 4 &ipic 12 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 90000000 90000000 0 10000000
@ -192,7 +189,7 @@
compatible = "talitos";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <18>;
@ -206,8 +203,7 @@
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

119
arch/powerpc/boot/dts/mpc8323emds.dts → arch/powerpc/boot/dts/mpc832x_mds.dts
View File

@ -11,16 +11,14 @@
/ {
model = "MPC8323EMDS";
compatible = "MPC83xx";
compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8323@0 {
device_type = "cpu";
@ -33,13 +31,11 @@
bus-frequency = <0>;
clock-frequency = <0>;
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 08000000>;
};
@ -68,7 +64,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -78,7 +74,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -87,7 +83,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
@ -96,7 +92,7 @@
compatible = "talitos";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <18>;
@ -105,51 +101,50 @@
};
pci@8500 {
linux,phandle = <8500>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 AD18 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 AD19 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 AD21*/
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 AD22*/
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 AD23*/
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 AD24*/
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 90000000 0 10000000
@ -164,8 +159,7 @@
device_type = "pci";
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
@ -179,8 +173,7 @@
device_type = "par_io";
num-ports = <7>;
ucc_pin@03 {
linux,phandle = <140003>;
pio3: ucc_pin@03 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
@ -203,8 +196,7 @@
1 c 1 0 1 0 /* TX_EN */
1 d 2 0 1 0>;/* CRS */
};
ucc_pin@04 {
linux,phandle = <140004>;
pio4: ucc_pin@04 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
3 1f 2 0 1 0 /* RX_CLK (CLK7) */
@ -251,7 +243,7 @@
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -260,7 +252,7 @@
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -269,7 +261,7 @@
compatible = "qe_udc";
reg = <6c0 40 8B00 100>;
interrupts = <b>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "slave";
};
@ -280,12 +272,12 @@
device-id = <3>;
reg = <2200 200>;
interrupts = <22>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <19>;
tx-clock = <1a>;
phy-handle = <212003>;
pio-handle = <140003>;
phy-handle = < &phy3 >;
pio-handle = < &pio3 >;
};
ucc@3200 {
@ -295,12 +287,12 @@
device-id = <4>;
reg = <3000 200>;
interrupts = <23>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <17>;
tx-clock = <18>;
phy-handle = <212004>;
pio-handle = <140004>;
phy-handle = < &phy4 >;
pio-handle = < &pio4 >;
};
mdio@2320 {
@ -310,26 +302,23 @@
device_type = "mdio";
compatible = "ucc_geth_phy";
ethernet-phy@03 {
linux,phandle = <212003>;
interrupt-parent = <700>;
interrupts = <11 2>;
phy3: ethernet-phy@03 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
reg = <3>;
device_type = "ethernet-phy";
interface = <3>; //ENET_100_MII
};
ethernet-phy@04 {
linux,phandle = <212004>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy4: ethernet-phy@04 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <4>;
device_type = "ethernet-phy";
interface = <3>;
};
};
qeic@80 {
linux,phandle = <80>;
qeic: qeic@80 {
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
@ -338,7 +327,7 @@
built-in;
big-endian;
interrupts = <20 8 21 8>; //high:32 low:33
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
};
};

60
arch/powerpc/boot/dts/mpc8349emitx.dts
View File

@ -10,7 +10,7 @@
*/
/ {
model = "MPC8349EMITX";
compatible = "MPC834xMITX";
compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
#address-cells = <1>;
#size-cells = <1>;
@ -58,7 +58,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -67,7 +67,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -76,7 +76,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -86,8 +86,8 @@
reg = <22000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <27 2>;
interrupt-parent = < &ipic >;
interrupts = <27 8>;
phy_type = "ulpi";
port1;
};
@ -98,8 +98,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
phy_type = "ulpi";
};
@ -109,22 +109,19 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
/* Vitesse 8201 */
ethernet-phy@1c {
linux,phandle = <245201c>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1c: ethernet-phy@1c {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1c>;
device_type = "ethernet-phy";
};
/* Vitesse 7385 */
ethernet-phy@1f {
linux,phandle = <245201f>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1f: ethernet-phy@1f {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1f>;
device_type = "ethernet-phy";
};
@ -138,8 +135,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <245201c>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1c >;
};
ethernet@25000 {
@ -152,8 +149,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = <700>;
phy-handle = <245201f>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1f >;
};
serial@4500 {
@ -162,7 +159,7 @@
reg = <4500 100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -171,16 +168,16 @@
reg = <4600 100>;
clock-frequency = <0>; // from bootloader
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8500 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
8000 0 0 1 700 16 8 /* SATA_INTA */
8000 0 0 1 &ipic 16 8 /* SATA_INTA */
>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 10000000
@ -199,13 +196,13 @@
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
7000 0 0 1 700 15 8 /* PCI_INTA */
7000 0 0 1 &ipic 15 8 /* PCI_INTA */
/* IDSEL 0x0F - PCI Slot */
7800 0 0 1 700 14 8 /* PCI_INTA */
7800 0 0 2 700 15 8 /* PCI_INTB */
7800 0 0 1 &ipic 14 8 /* PCI_INTA */
7800 0 0 2 &ipic 15 8 /* PCI_INTB */
>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
interrupts = <43 8>;
bus-range = <1 1>;
ranges = <42000000 0 a0000000 a0000000 0 10000000
@ -226,15 +223,14 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
descriptor-types-mask = <01010ebf>;
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

39
arch/powerpc/boot/dts/mpc8349emitxgp.dts
View File

@ -10,7 +10,7 @@
*/
/ {
model = "MPC8349EMITXGP";
compatible = "MPC834xMITXGP";
compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
#address-cells = <1>;
#size-cells = <1>;
@ -58,7 +58,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -67,7 +67,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -76,7 +76,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -86,8 +86,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@ -98,13 +98,11 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
/* Vitesse 8201 */
ethernet-phy@1c {
linux,phandle = <245201c>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1c: ethernet-phy@1c {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1c>;
device_type = "ethernet-phy";
};
@ -117,8 +115,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <245201c>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1c >;
};
serial@4500 {
@ -127,7 +125,7 @@
reg = <4500 100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -136,17 +134,17 @@
reg = <4600 100>;
clock-frequency = <0>; // from bootloader
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8600 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
7800 0 0 1 700 14 8 /* PCI_INTA */
7800 0 0 2 700 15 8 /* PCI_INTB */
7800 0 0 1 &ipic 14 8 /* PCI_INTA */
7800 0 0 2 &ipic 15 8 /* PCI_INTB */
>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
interrupts = <43 8>;
bus-range = <1 1>;
ranges = <42000000 0 a0000000 a0000000 0 10000000
@ -167,15 +165,14 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
descriptor-types-mask = <01010ebf>;
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

164
arch/powerpc/boot/dts/mpc834x_mds.dts
View File

@ -11,7 +11,7 @@
/ {
model = "MPC8349EMDS";
compatible = "MPC834xMDS";
compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
#address-cells = <1>;
#size-cells = <1>;
@ -64,7 +64,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -73,7 +73,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -82,7 +82,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -94,8 +94,8 @@
reg = <22000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <27 2>;
interrupt-parent = < &ipic >;
interrupts = <27 8>;
phy_type = "ulpi";
port1;
};
@ -106,8 +106,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@ -118,18 +118,15 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <700>;
interrupts = <11 2>;
phy0: ethernet-phy@0 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1>;
device_type = "ethernet-phy";
};
@ -143,8 +140,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <2452000>;
interrupt-parent = < &ipic >;
phy-handle = < &phy0 >;
};
ethernet@25000 {
@ -157,8 +154,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = <700>;
phy-handle = <2452001>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1 >;
};
serial@4500 {
@ -167,7 +164,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -176,7 +173,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8500 {
@ -184,47 +181,47 @@
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 */
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 */
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 */
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 */
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
@ -244,47 +241,47 @@
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 */
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 */
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 */
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 */
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 b0000000 b0000000 0 10000000
@ -306,7 +303,7 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
@ -321,8 +318,7 @@
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

123
arch/powerpc/boot/dts/mpc8360emds.dts → arch/powerpc/boot/dts/mpc836x_mds.dts
View File

@ -15,17 +15,15 @@
*/
/ {
model = "MPC8360EPB";
compatible = "MPC83xx";
model = "MPC8360MDS";
compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8360@0 {
device_type = "cpu";
@ -38,13 +36,11 @@
bus-frequency = <FBC5200>;
clock-frequency = <1F78A400>;
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 10000000>;
};
@ -73,7 +69,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -82,7 +78,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -92,7 +88,7 @@
reg = <4500 100>;
clock-frequency = <FBC5200>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -101,7 +97,7 @@
reg = <4600 100>;
clock-frequency = <FBC5200>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
@ -110,7 +106,7 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
@ -119,52 +115,51 @@
};
pci@8500 {
linux,phandle = <8500>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 AD18 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 AD19 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 AD21*/
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 AD22*/
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 AD23*/
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 AD24*/
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
@ -179,8 +174,7 @@
device_type = "pci";
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
@ -194,8 +188,7 @@
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
linux,phandle = <140001>;
pio1: ucc_pin@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
0 3 1 0 1 0 /* TxD0 */
@ -222,8 +215,7 @@
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
2 8 2 0 1 0>; /* GTX125 - CLK9 */
};
ucc_pin@02 {
linux,phandle = <140002>;
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
0 11 1 0 1 0 /* TxD0 */
@ -280,7 +272,7 @@
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -289,7 +281,7 @@
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -298,7 +290,7 @@
compatible = "qe_udc";
reg = <6c0 40 8B00 100>;
interrupts = <b>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "slave";
};
@ -309,12 +301,12 @@
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <212000>;
pio-handle = <140001>;
phy-handle = < &phy0 >;
pio-handle = < &pio1 >;
};
ucc@3000 {
@ -324,12 +316,12 @@
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <212001>;
pio-handle = <140002>;
phy-handle = < &phy1 >;
pio-handle = < &pio2 >;
};
mdio@2120 {
@ -339,26 +331,23 @@
device_type = "mdio";
compatible = "ucc_geth_phy";
ethernet-phy@00 {
linux,phandle = <212000>;
interrupt-parent = <700>;
interrupts = <11 2>;
phy0: ethernet-phy@00 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@01 {
linux,phandle = <212001>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1: ethernet-phy@01 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
};
qeic@80 {
linux,phandle = <80>;
qeic: qeic@80 {
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
@ -367,7 +356,7 @@
built-in;
big-endian;
interrupts = <20 8 21 8>; //high:32 low:33
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
};

0
arch/powerpc/configs/mpc832xemds_defconfig → arch/powerpc/configs/mpc832x_mds_defconfig
View File

29
arch/powerpc/configs/mpc8360emds_defconfig → arch/powerpc/configs/mpc836x_mds_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Fri Jan 26 00:19:45 2007
# Linux kernel version: 2.6.20
# Sat Feb 17 10:09:26 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_6xx=y
CONFIG_83xx=y
@ -63,6 +63,7 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
@ -129,10 +130,11 @@ CONFIG_PPC_GEN550=y
#
# Platform support
#
# CONFIG_MPC8313_RDB is not set
# CONFIG_MPC832x_MDS is not set
# CONFIG_MPC834x_SYS is not set
# CONFIG_MPC834x_MDS is not set
# CONFIG_MPC834x_ITX is not set
CONFIG_MPC8360E_PB=y
CONFIG_MPC836x_MDS=y
CONFIG_PPC_MPC836x=y
# CONFIG_MPIC is not set
@ -162,6 +164,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
@ -171,6 +174,7 @@ CONFIG_ISA_DMA_API=y
#
# Bus options
#
CONFIG_ZONE_DMA=y
CONFIG_GENERIC_ISA_DMA=y
# CONFIG_MPIC_WEIRD is not set
# CONFIG_PPC_I8259 is not set
@ -219,6 +223,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
@ -528,6 +533,7 @@ CONFIG_UCC_GETH=y
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
@ -620,6 +626,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@ -690,6 +697,7 @@ CONFIG_I2C_MPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PASEMI is not set
# CONFIG_I2C_PROSAVAGE is not set
# CONFIG_I2C_SAVAGE4 is not set
# CONFIG_I2C_SIS5595 is not set
@ -804,6 +812,7 @@ CONFIG_FIRMWARE_EDID=y
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
@ -867,6 +876,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
@ -1011,7 +1024,8 @@ CONFIG_BITREVERSE=y
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
#
# Instrumentation Support
@ -1060,8 +1074,10 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
@ -1075,6 +1091,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
#

4
arch/powerpc/configs/ppc64_defconfig
View File

@ -500,7 +500,7 @@ CONFIG_BLK_DEV_AMD74XX=y
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
CONFIG_BLK_DEV_SL82C105=y
# CONFIG_BLK_DEV_SL82C105 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
@ -646,7 +646,7 @@ CONFIG_SATA_SVW=y
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
CONFIG_PATA_WINBOND=y
#
# Multi-device support (RAID and LVM)

4
arch/powerpc/configs/pseries_defconfig
View File

@ -483,7 +483,7 @@ CONFIG_BLK_DEV_AMD74XX=y
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
CONFIG_BLK_DEV_SL82C105=y
# CONFIG_BLK_DEV_SL82C105 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
@ -628,7 +628,7 @@ CONFIG_ATA=y
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
CONFIG_PATA_WINBOND=y
#
# Multi-device support (RAID and LVM)

40
arch/powerpc/kernel/prom_parse.c
View File

@ -5,6 +5,7 @@
#include <linux/pci_regs.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/etherdevice.h>
#include <asm/prom.h>
#include <asm/pci-bridge.h>
@ -1003,3 +1004,42 @@ int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq
return res;
}
EXPORT_SYMBOL_GPL(of_irq_map_one);
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
* address. If that isn't set, then 'local-mac-address' is checked next,
* because that is the default address. If that isn't set, then the obsolete
* 'address' is checked, just in case we're using an old device tree.
*
* Note that the 'address' property is supposed to contain a virtual address of
* the register set, but some DTS files have redefined that property to be the
* MAC address.
*
* All-zero MAC addresses are rejected, because those could be properties that
* exist in the device tree, but were not set by U-Boot. For example, the
* DTS could define 'mac-address' and 'local-mac-address', with zero MAC
* addresses. Some older U-Boots only initialized 'local-mac-address'. In
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*/
const void *of_get_mac_address(struct device_node *np)
{
struct property *pp;
pp = of_find_property(np, "mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "local-mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
return NULL;
}
EXPORT_SYMBOL(of_get_mac_address);

8
arch/powerpc/platforms/83xx/Kconfig
View File

@ -38,12 +38,12 @@ config MPC834x_ITX
Be aware that PCI initialization is the bootloader's
responsibility.
config MPC8360E_PB
bool "Freescale MPC8360E PB"
config MPC836x_MDS
bool "Freescale MPC836x MDS"
select DEFAULT_UIMAGE
select QUICC_ENGINE
help
This option enables support for the MPC836x EMDS Processor Board.
This option enables support for the MPC836x MDS Processor Board.
endchoice
@ -69,6 +69,6 @@ config PPC_MPC836x
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC8360E_PB
default y if MPC836x_MDS
endmenu

2
arch/powerpc/platforms/83xx/Makefile
View File

@ -6,5 +6,5 @@ obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o

11
arch/powerpc/platforms/83xx/mpc8313_rdb.c
View File

@ -74,16 +74,9 @@ void __init mpc8313_rdb_init_IRQ(void)
*/
static int __init mpc8313_rdb_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8313ERDB"))
return 0;
unsigned long root = of_get_flat_dt_root();
DBG("MPC8313 RDB found\n");
return 1;
return of_flat_dt_is_compatible(root, "MPC8313ERDB");
}
define_machine(mpc8313_rdb) {

65
arch/powerpc/platforms/83xx/mpc832x_mds.c
View File

@ -57,11 +57,6 @@ unsigned long isa_mem_base = 0;
static u8 *bcsr_regs = NULL;
u8 *get_bcsr(void)
{
return bcsr_regs;
}
/* ************************************************************************
*
* Setup the architecture
@ -74,17 +69,6 @@ static void __init mpc832x_sys_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc832x_sys_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
unsigned int *fp =
(int *)get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
if (np != 0) {
@ -121,34 +105,23 @@ static void __init mpc832x_sys_setup_arch(void)
iounmap(bcsr_regs);
of_node_put(np);
}
#endif /* CONFIG_QUICC_ENGINE */
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static struct of_device_id mpc832x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
{},
};
static int __init mpc832x_declare_of_platform_devices(void)
{
struct device_node *np;
if (!machine_is(mpc832x_mds))
return 0;
for (np = NULL; (np = of_find_compatible_node(np, "network",
"ucc_geth")) != NULL;) {
int ucc_num;
char bus_id[BUS_ID_SIZE];
ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
of_platform_device_create(np, bus_id, NULL);
}
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc832x_ids, NULL);
return 0;
}
@ -156,7 +129,6 @@ device_initcall(mpc832x_declare_of_platform_devices);
static void __init mpc832x_sys_init_IRQ(void)
{
struct device_node *np;
np = of_find_node_by_type(NULL, "ipic");
@ -189,6 +161,9 @@ static int __init mpc832x_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc832x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
@ -207,17 +182,9 @@ late_initcall(mpc832x_rtc_hookup);
*/
static int __init mpc832x_sys_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
unsigned long root = of_get_flat_dt_root();
if (model == NULL)
return 0;
if (strcmp(model, "MPC8323EMDS"))
return 0;
DBG("%s found\n", model);
return 1;
return of_flat_dt_is_compatible(root, "MPC832xMDS");
}
define_machine(mpc832x_mds) {

23
arch/powerpc/platforms/83xx/mpc834x_itx.c
View File

@ -55,28 +55,12 @@ static void __init mpc834x_itx_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc834x_itx_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static void __init mpc834x_itx_init_IRQ(void)
@ -100,10 +84,9 @@ static void __init mpc834x_itx_init_IRQ(void)
*/
static int __init mpc834x_itx_probe(void)
{
/* We always match for now, eventually we should look at the flat
dev tree to ensure this is the board we are suppose to run on
*/
return 1;
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC834xMITX");
}
define_machine(mpc834x_itx) {

27
arch/powerpc/platforms/83xx/mpc834x_mds.c
View File

@ -125,17 +125,6 @@ static void __init mpc834x_mds_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc834x_mds_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
@ -144,12 +133,6 @@ static void __init mpc834x_mds_setup_arch(void)
#endif
mpc834x_usb_cfg();
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static void __init mpc834x_mds_init_IRQ(void)
@ -176,6 +159,9 @@ static int __init mpc834x_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc834x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
@ -194,10 +180,9 @@ late_initcall(mpc834x_rtc_hookup);
*/
static int __init mpc834x_mds_probe(void)
{
/* We always match for now, eventually we should look at the flat
dev tree to ensure this is the board we are suppose to run on
*/
return 1;
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC834xMDS");
}
define_machine(mpc834x_mds) {

87
arch/powerpc/platforms/83xx/mpc8360e_pb.c → arch/powerpc/platforms/83xx/mpc836x_mds.c
View File

@ -5,7 +5,7 @@
* Yin Olivia <Hong-hua.Yin@freescale.com>
*
* Description:
* MPC8360E MDS PB board specific routines.
* MPC8360E MDS board specific routines.
*
* Changelog:
* Jun 21, 2006 Initial version
@ -62,33 +62,17 @@ unsigned long isa_mem_base = 0;
static u8 *bcsr_regs = NULL;
u8 *get_bcsr(void)
{
return bcsr_regs;
}
/* ************************************************************************
*
* Setup the architecture
*
*/
static void __init mpc8360_sys_setup_arch(void)
static void __init mpc836x_mds_setup_arch(void)
{
struct device_node *np;
if (ppc_md.progress)
ppc_md.progress("mpc8360_sys_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
ppc_md.progress("mpc836x_mds_setup_arch()", 0);
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
@ -128,40 +112,29 @@ static void __init mpc8360_sys_setup_arch(void)
}
#endif /* CONFIG_QUICC_ENGINE */
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static int __init mpc8360_declare_of_platform_devices(void)
static struct of_device_id mpc836x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
{},
};
static int __init mpc836x_declare_of_platform_devices(void)
{
struct device_node *np;
if (!machine_is(mpc836x_mds))
return 0;
for (np = NULL; (np = of_find_compatible_node(np, "network",
"ucc_geth")) != NULL;) {
int ucc_num;
char bus_id[BUS_ID_SIZE];
ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
of_platform_device_create(np, bus_id, NULL);
}
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc836x_ids, NULL);
return 0;
}
device_initcall(mpc8360_declare_of_platform_devices);
device_initcall(mpc836x_declare_of_platform_devices);
static void __init mpc8360_sys_init_IRQ(void)
static void __init mpc836x_mds_init_IRQ(void)
{
struct device_node *np;
np = of_find_node_by_type(NULL, "ipic");
@ -194,6 +167,9 @@ static int __init mpc8360_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc836x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
@ -210,25 +186,18 @@ late_initcall(mpc8360_rtc_hookup);
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc8360_sys_probe(void)
static int __init mpc836x_mds_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8360EPB"))
return 0;
unsigned long root = of_get_flat_dt_root();
DBG("MPC8360EMDS-PB found\n");
return 1;
return of_flat_dt_is_compatible(root, "MPC836xMDS");
}
define_machine(mpc8360_sys) {
.name = "MPC8360E PB",
.probe = mpc8360_sys_probe,
.setup_arch = mpc8360_sys_setup_arch,
.init_IRQ = mpc8360_sys_init_IRQ,
define_machine(mpc836x_mds) {
.name = "MPC836x MDS",
.probe = mpc836x_mds_probe,
.setup_arch = mpc836x_mds_setup_arch,
.init_IRQ = mpc836x_mds_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,

2
arch/powerpc/platforms/pseries/Makefile
View File

@ -4,7 +4,7 @@ endif
obj-y := pci.o lpar.o hvCall.o nvram.o reconfig.o \
setup.o iommu.o ras.o rtasd.o pci_dlpar.o \
firmware.o
firmware.o power.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_XICS) += xics.o
obj-$(CONFIG_SCANLOG) += scanlog.o

87
arch/powerpc/platforms/pseries/power.c Normal file
View File

@ -0,0 +1,87 @@
/*
* Interface for power-management for ppc64 compliant platform
*
* Manish Ahuja <mahuja@us.ibm.com>
*
* Feb 2007
*
* Copyright (C) 2007 IBM Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kobject.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/init.h>
unsigned long rtas_poweron_auto; /* default and normal state is 0 */
static ssize_t auto_poweron_show(struct subsystem *subsys, char *buf)
{
return sprintf(buf, "%lu\n", rtas_poweron_auto);
}
static ssize_t
auto_poweron_store(struct subsystem *subsys, const char *buf, size_t n)
{
int ret;
unsigned long ups_restart;
ret = sscanf(buf, "%lu", &ups_restart);
if ((ret == 1) && ((ups_restart == 1) || (ups_restart == 0))){
rtas_poweron_auto = ups_restart;
return n;
}
return -EINVAL;
}
static struct subsys_attribute auto_poweron_attr = {
.attr = {
.name = __stringify(auto_poweron),
.mode = 0644,
},
.show = auto_poweron_show,
.store = auto_poweron_store,
};
#ifndef CONFIG_PM
decl_subsys(power,NULL,NULL);
static struct attribute *g[] = {
&auto_poweron_attr.attr,
NULL,
};
static struct attribute_group attr_group = {
.attrs = g,
};
static int __init pm_init(void)
{
int error = subsystem_register(&power_subsys);
if (!error)
error = sysfs_create_group(&power_subsys.kset.kobj,&attr_group);
return error;
}
core_initcall(pm_init);
#else
extern struct subsystem power_subsys;
static int __init apo_pm_init(void)
{
return (subsys_create_file(&power_subsys, &auto_poweron_attr));
}
__initcall(apo_pm_init);
#endif

3
arch/powerpc/platforms/pseries/pseries.h
View File

@ -33,4 +33,7 @@ static inline void setup_kexec_cpu_down_xics(void) { }
static inline void setup_kexec_cpu_down_mpic(void) { }
#endif
/* Poweron flag used for enabling auto ups restart */
extern unsigned long rtas_poweron_auto;
#endif /* _PSERIES_PSERIES_H */

30
arch/powerpc/platforms/pseries/setup.c
View File

@ -486,6 +486,34 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
return PCI_PROBE_NORMAL;
}
/**
* pSeries_power_off - tell firmware about how to power off the system.
*
* This function calls either the power-off rtas token in normal cases
* or the ibm,power-off-ups token (if present & requested) in case of
* a power failure. If power-off token is used, power on will only be
* possible with power button press. If ibm,power-off-ups token is used
* it will allow auto poweron after power is restored.
*/
void pSeries_power_off(void)
{
int rc;
int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
if (rtas_flash_term_hook)
rtas_flash_term_hook(SYS_POWER_OFF);
if (rtas_poweron_auto == 0 ||
rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
printk(KERN_INFO "RTAS power-off returned %d\n", rc);
} else {
rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
}
for (;;);
}
define_machine(pseries) {
.name = "pSeries",
.probe = pSeries_probe,
@ -496,7 +524,7 @@ define_machine(pseries) {
.pcibios_fixup = pSeries_final_fixup,
.pci_probe_mode = pSeries_pci_probe_mode,
.restart = rtas_restart,
.power_off = rtas_power_off,
.power_off = pSeries_power_off,
.halt = rtas_halt,
.panic = rtas_os_term,
.get_boot_time = rtas_get_boot_time,

15
arch/powerpc/sysdev/fsl_soc.c
View File

@ -233,14 +233,7 @@ static int __init gfar_of_init(void)
goto err;
}
mac_addr = get_property(np, "local-mac-address", NULL);
if (mac_addr == NULL)
mac_addr = get_property(np, "mac-address", NULL);
if (mac_addr == NULL) {
/* Obsolete */
mac_addr = get_property(np, "address", NULL);
}
mac_addr = of_get_mac_address(np);
if (mac_addr)
memcpy(gfar_data.mac_addr, mac_addr, 6);
@ -646,7 +639,8 @@ static int __init fs_enet_of_init(void)
goto unreg;
}
mac_addr = get_property(np, "mac-address", NULL);
mac_addr = of_get_mac_address(np);
if (mac_addr)
memcpy(fs_enet_data.macaddr, mac_addr, 6);
ph = get_property(np, "phy-handle", NULL);
@ -931,7 +925,8 @@ static int __init fs_enet_of_init(void)
goto err;
r[0].name = enet_regs;
mac_addr = (void *)get_property(np, "mac-address", NULL);
mac_addr = of_get_mac_address(np);
if (mac_addr)
memcpy(fs_enet_data.macaddr, mac_addr, 6);
ph = (phandle *) get_property(np, "phy-handle", NULL);

145
arch/powerpc/sysdev/qe_lib/ucc_fast.c
View File

@ -1,13 +1,12 @@
/*
* arch/powerpc/sysdev/qe_lib/ucc_fast.c
*
* QE UCC Fast API Set - UCC Fast specific routines implementations.
*
* Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
*
* Authors: Shlomi Gridish <gridish@freescale.com>
* Li Yang <leoli@freescale.com>
*
* Description:
* QE UCC Fast API Set - UCC Fast specific routines implementations.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@ -27,65 +26,47 @@
#include <asm/ucc.h>
#include <asm/ucc_fast.h>
#define uccf_printk(level, format, arg...) \
printk(level format "\n", ## arg)
#define uccf_dbg(format, arg...) \
uccf_printk(KERN_DEBUG , format , ## arg)
#define uccf_err(format, arg...) \
uccf_printk(KERN_ERR , format , ## arg)
#define uccf_info(format, arg...) \
uccf_printk(KERN_INFO , format , ## arg)
#define uccf_warn(format, arg...) \
uccf_printk(KERN_WARNING , format , ## arg)
#ifdef UCCF_VERBOSE_DEBUG
#define uccf_vdbg uccf_dbg
#else
#define uccf_vdbg(fmt, args...) do { } while (0)
#endif /* UCCF_VERBOSE_DEBUG */
void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
{
uccf_info("UCC%d Fast registers:", uccf->uf_info->ucc_num);
uccf_info("Base address: 0x%08x", (u32) uccf->uf_regs);
printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
uccf_info("gumr : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "gumr : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
uccf_info("upsmr : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
uccf_info("utodr : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
uccf_info("udsr : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "udsr : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
uccf_info("ucce : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "ucce : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
uccf_info("uccm : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "uccm : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
uccf_info("uccs : addr - 0x%08x, val - 0x%02x",
printk(KERN_INFO "uccs : addr - 0x%08x, val - 0x%02x",
(u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
uccf_info("urfb : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "urfb : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
uccf_info("urfs : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "urfs : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
uccf_info("urfet : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
uccf_info("urfset: addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->urfset,
in_be16(&uccf->uf_regs->urfset));
uccf_info("utfb : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "utfb : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
uccf_info("utfs : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utfs : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
uccf_info("utfet : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
uccf_info("utftt : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
uccf_info("utpt : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utpt : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
uccf_info("urtry : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
uccf_info("guemr : addr - 0x%08x, val - 0x%02x",
printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
(u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
}
@ -153,84 +134,72 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
{
struct ucc_fast_private *uccf;
struct ucc_fast *uf_regs;
u32 gumr = 0;
u32 gumr;
int ret;
uccf_vdbg("%s: IN", __FUNCTION__);
if (!uf_info)
return -EINVAL;
/* check if the UCC port number is in range. */
if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
uccf_err("ucc_fast_init: Illegal UCC number!");
printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
return -EINVAL;
}
/* Check that 'max_rx_buf_length' is properly aligned (4). */
if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
uccf_err("ucc_fast_init: max_rx_buf_length not aligned.");
printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
return -EINVAL;
}
/* Validate Virtual Fifo register values */
if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfs too small.");
printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
return -EINVAL;
}
if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfs not aligned.");
printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfet not aligned.");
printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
return -EINVAL;
}
if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfset not aligned.");
printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register utfs not aligned.");
printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register utfet not aligned.");
printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register utftt not aligned.");
printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
return -EINVAL;
}
uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
if (!uccf) {
uccf_err
("ucc_fast_init: No memory for UCC slow data structure!");
printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
return -ENOMEM;
}
/* Fill fast UCC structure */
uccf->uf_info = uf_info;
/* Set the PHY base address */
uccf->uf_regs =
(struct ucc_fast *) ioremap(uf_info->regs, sizeof(struct ucc_fast));
uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
if (uccf->uf_regs == NULL) {
uccf_err
("ucc_fast_init: No memory map for UCC slow controller!");
printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
return -ENOMEM;
}
@ -249,7 +218,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* Init Guemr register */
if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
uccf_err("ucc_fast_init: Could not init the guemr register.");
printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
ucc_fast_free(uccf);
return ret;
}
@ -258,7 +227,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
if ((ret = ucc_set_type(uf_info->ucc_num,
(struct ucc_common *) (uf_regs),
UCC_SPEED_TYPE_FAST))) {
uccf_err("ucc_fast_init: Could not set type to fast.");
printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
ucc_fast_free(uccf);
return ret;
}
@ -267,10 +236,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* Set GUMR */
/* For more details see the hardware spec. */
/* gumr starts as zero. */
gumr = uf_info->ttx_trx;
if (uf_info->tci)
gumr |= UCC_FAST_GUMR_TCI;
gumr |= uf_info->ttx_trx;
if (uf_info->cdp)
gumr |= UCC_FAST_GUMR_CDP;
if (uf_info->ctsp)
@ -298,9 +266,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
uccf->ucc_fast_tx_virtual_fifo_base_offset =
qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
uccf_err
("ucc_fast_init: Can not allocate MURAM memory for "
"struct ucc_fastx_virtual_fifo_base_offset.");
printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
ucc_fast_free(uccf);
return -ENOMEM;
@ -309,13 +275,10 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* Allocate memory for Rx Virtual Fifo */
uccf->ucc_fast_rx_virtual_fifo_base_offset =
qe_muram_alloc(uf_info->urfs +
(u32)
UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
uccf_err
("ucc_fast_init: Can not allocate MURAM memory for "
"ucc_fast_rx_virtual_fifo_base_offset.");
printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
ucc_fast_free(uccf);
return -ENOMEM;
@ -342,37 +305,33 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* If NMSI (not Tsa), set Tx and Rx clock. */
if (!uf_info->tsa) {
/* Rx clock routing */
if (uf_info->rx_clock != QE_CLK_NONE) {
if (ucc_set_qe_mux_rxtx
(uf_info->ucc_num, uf_info->rx_clock,
if ((uf_info->rx_clock != QE_CLK_NONE) &&
ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
COMM_DIR_RX)) {
uccf_err
("ucc_fast_init: Illegal value for parameter 'RxClock'.");
printk(KERN_ERR "%s: illegal value for RX clock",
__FUNCTION__);
ucc_fast_free(uccf);
return -EINVAL;
}
}
/* Tx clock routing */
if (uf_info->tx_clock != QE_CLK_NONE) {
if (ucc_set_qe_mux_rxtx
(uf_info->ucc_num, uf_info->tx_clock,
if ((uf_info->tx_clock != QE_CLK_NONE) &&
ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
COMM_DIR_TX)) {
uccf_err
("ucc_fast_init: Illegal value for parameter 'TxClock'.");
printk(KERN_ERR "%s: illegal value for TX clock",
__FUNCTION__);
ucc_fast_free(uccf);
return -EINVAL;
}
}
}
/* Set interrupt mask register at UCC level. */
out_be32(&uf_regs->uccm, uf_info->uccm_mask);
/* First, clear anything pending at UCC level,
* otherwise, old garbage may come through
* as soon as the dam is opened
* Writing '1' clears
*/
* as soon as the dam is opened. */
/* Writing '1' clears */
out_be32(&uf_regs->ucce, 0xffffffff);
*uccf_ret = uccf;

133
arch/powerpc/sysdev/qe_lib/ucc_slow.c
View File

@ -19,7 +19,6 @@
#include <linux/stddef.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
@ -27,24 +26,6 @@
#include <asm/ucc.h>
#include <asm/ucc_slow.h>
#define uccs_printk(level, format, arg...) \
printk(level format "\n", ## arg)
#define uccs_dbg(format, arg...) \
uccs_printk(KERN_DEBUG , format , ## arg)
#define uccs_err(format, arg...) \
uccs_printk(KERN_ERR , format , ## arg)
#define uccs_info(format, arg...) \
uccs_printk(KERN_INFO , format , ## arg)
#define uccs_warn(format, arg...) \
uccs_printk(KERN_WARNING , format , ## arg)
#ifdef UCCS_VERBOSE_DEBUG
#define uccs_vdbg uccs_dbg
#else
#define uccs_vdbg(fmt, args...) do { } while (0)
#endif /* UCCS_VERBOSE_DEBUG */
u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
{
switch (uccs_num) {
@ -135,24 +116,21 @@ void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode)
int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret)
{
struct ucc_slow_private *uccs;
u32 i;
struct ucc_slow *us_regs;
u32 gumr;
u8 function_code = 0;
u8 *bd;
struct ucc_slow_private *uccs;
struct qe_bd *bd;
u32 id;
u32 command;
int ret;
uccs_vdbg("%s: IN", __FUNCTION__);
int ret = 0;
if (!us_info)
return -EINVAL;
/* check if the UCC port number is in range. */
if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) {
uccs_err("ucc_slow_init: Illegal UCC number!");
printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
return -EINVAL;
}
@ -164,22 +142,27 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
*/
if ((!us_info->rfw) &&
(us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) {
uccs_err("max_rx_buf_length not aligned.");
printk(KERN_ERR "max_rx_buf_length not aligned.");
return -EINVAL;
}
uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL);
if (!uccs) {
uccs_err
("ucc_slow_init: No memory for UCC slow data structure!");
printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
return -ENOMEM;
}
/* Fill slow UCC structure */
uccs->us_info = us_info;
/* Set the PHY base address */
uccs->us_regs = ioremap(us_info->regs, sizeof(struct ucc_slow));
if (uccs->us_regs == NULL) {
printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
return -ENOMEM;
}
uccs->saved_uccm = 0;
uccs->p_rx_frame = 0;
uccs->us_regs = us_info->regs;
us_regs = uccs->us_regs;
uccs->p_ucce = (u16 *) & (us_regs->ucce);
uccs->p_uccm = (u16 *) & (us_regs->uccm);
@ -190,24 +173,22 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
#endif /* STATISTICS */
/* Get PRAM base */
uccs->us_pram_offset = qe_muram_alloc(UCC_SLOW_PRAM_SIZE,
ALIGNMENT_OF_UCC_SLOW_PRAM);
uccs->us_pram_offset =
qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
if (IS_MURAM_ERR(uccs->us_pram_offset)) {
uccs_err
("ucc_slow_init: Can not allocate MURAM memory "
"for Slow UCC.");
printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__);
ucc_slow_free(uccs);
return -ENOMEM;
}
id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num);
qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED,
(u32) uccs->us_pram_offset);
uccs->us_pram_offset);
uccs->us_pram = qe_muram_addr(uccs->us_pram_offset);
/* Init Guemr register */
if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) {
uccs_err("ucc_slow_init: Could not init the guemr register.");
printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
ucc_slow_free(uccs);
return ret;
}
@ -216,7 +197,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
if ((ret = ucc_set_type(us_info->ucc_num,
(struct ucc_common *) (us_info->regs),
UCC_SPEED_TYPE_SLOW))) {
uccs_err("ucc_slow_init: Could not init the guemr register.");
printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
ucc_slow_free(uccs);
return ret;
}
@ -230,7 +211,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
QE_ALIGNMENT_OF_BD);
if (IS_MURAM_ERR(uccs->rx_base_offset)) {
uccs_err("ucc_slow_init: No memory for Rx BD's.");
printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__);
uccs->rx_base_offset = 0;
ucc_slow_free(uccs);
return -ENOMEM;
@ -240,7 +221,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
QE_ALIGNMENT_OF_BD);
if (IS_MURAM_ERR(uccs->tx_base_offset)) {
uccs_err("ucc_slow_init: No memory for Tx BD's.");
printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__);
uccs->tx_base_offset = 0;
ucc_slow_free(uccs);
return -ENOMEM;
@ -248,34 +229,33 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
/* Init Tx bds */
bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset);
for (i = 0; i < us_info->tx_bd_ring_len; i++) {
for (i = 0; i < us_info->tx_bd_ring_len - 1; i++) {
/* clear bd buffer */
out_be32(&(((struct qe_bd *)bd)->buf), 0);
out_be32(&bd->buf, 0);
/* set bd status and length */
out_be32((u32 *) bd, 0);
bd += sizeof(struct qe_bd);
bd++;
}
bd -= sizeof(struct qe_bd);
/* set bd status and length */
out_be32((u32*)bd, T_W); /* for last BD set Wrap bit */
/* for last BD set Wrap bit */
out_be32(&bd->buf, 0);
out_be32((u32 *) bd, cpu_to_be32(T_W));
/* Init Rx bds */
bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset);
for (i = 0; i < us_info->rx_bd_ring_len; i++) {
for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) {
/* set bd status and length */
out_be32((u32*)bd, 0);
/* clear bd buffer */
out_be32(&(((struct qe_bd *)bd)->buf), 0);
bd += sizeof(struct qe_bd);
out_be32(&bd->buf, 0);
bd++;
}
bd -= sizeof(struct qe_bd);
/* set bd status and length */
out_be32((u32*)bd, R_W); /* for last BD set Wrap bit */
/* for last BD set Wrap bit */
out_be32((u32*)bd, cpu_to_be32(R_W));
out_be32(&bd->buf, 0);
/* Set GUMR (For more details see the hardware spec.). */
/* gumr_h */
gumr = 0;
gumr |= us_info->tcrc;
gumr = us_info->tcrc;
if (us_info->cdp)
gumr |= UCC_SLOW_GUMR_H_CDP;
if (us_info->ctsp)
@ -295,7 +275,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
out_be32(&us_regs->gumr_h, gumr);
/* gumr_l */
gumr = 0;
gumr = us_info->tdcr | us_info->rdcr | us_info->tenc | us_info->renc |
us_info->diag | us_info->mode;
if (us_info->tci)
gumr |= UCC_SLOW_GUMR_L_TCI;
if (us_info->rinv)
@ -304,23 +285,14 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
gumr |= UCC_SLOW_GUMR_L_TINV;
if (us_info->tend)
gumr |= UCC_SLOW_GUMR_L_TEND;
gumr |= us_info->tdcr;
gumr |= us_info->rdcr;
gumr |= us_info->tenc;
gumr |= us_info->renc;
gumr |= us_info->diag;
gumr |= us_info->mode;
out_be32(&us_regs->gumr_l, gumr);
/* Function code registers */
/* function_code has initial value 0 */
/* if the data is in cachable memory, the 'global' */
/* in the function code should be set. */
function_code |= us_info->data_mem_part;
function_code |= QE_BMR_BYTE_ORDER_BO_MOT; /* Required for QE */
uccs->us_pram->tfcr = function_code;
uccs->us_pram->rfcr = function_code;
uccs->us_pram->tfcr = uccs->us_pram->rfcr =
us_info->data_mem_part | QE_BMR_BYTE_ORDER_BO_MOT;
/* rbase, tbase are offsets from MURAM base */
out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset);
@ -336,34 +308,29 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
/* If NMSI (not Tsa), set Tx and Rx clock. */
if (!us_info->tsa) {
/* Rx clock routing */
if (ucc_set_qe_mux_rxtx
(us_info->ucc_num, us_info->rx_clock, COMM_DIR_RX)) {
uccs_err
("ucc_slow_init: Illegal value for parameter"
" 'RxClock'.");
if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->rx_clock,
COMM_DIR_RX)) {
printk(KERN_ERR "%s: illegal value for RX clock",
__FUNCTION__);
ucc_slow_free(uccs);
return -EINVAL;
}
/* Tx clock routing */
if (ucc_set_qe_mux_rxtx(us_info->ucc_num,
us_info->tx_clock, COMM_DIR_TX)) {
uccs_err
("ucc_slow_init: Illegal value for parameter "
"'TxClock'.");
if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->tx_clock,
COMM_DIR_TX)) {
printk(KERN_ERR "%s: illegal value for TX clock",
__FUNCTION__);
ucc_slow_free(uccs);
return -EINVAL;
}
}
/*
* INTERRUPTS
*/
/* Set interrupt mask register at UCC level. */
out_be16(&us_regs->uccm, us_info->uccm_mask);
/* First, clear anything pending at UCC level, */
/* otherwise, old garbage may come through */
/* as soon as the dam is opened. */
/* First, clear anything pending at UCC level,
* otherwise, old garbage may come through
* as soon as the dam is opened. */
/* Writing '1' clears */
out_be16(&us_regs->ucce, 0xffff);
@ -400,3 +367,5 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
kfree(uccs);
}

4
drivers/serial/mpc52xx_uart.c
View File

@ -995,8 +995,10 @@ mpc52xx_uart_of_remove(struct of_device *op)
struct uart_port *port = dev_get_drvdata(&op->dev);
dev_set_drvdata(&op->dev, NULL);
if (port)
if (port) {
uart_remove_one_port(&mpc52xx_uart_driver, port);
irq_dispose_mapping(port->irq);
}
return 0;
}

2
include/asm-powerpc/prom.h
View File

@ -255,6 +255,8 @@ extern void kdump_move_device_tree(void);
/* CPU OF node matching */
struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
/* Get the MAC address */
extern const void *of_get_mac_address(struct device_node *np);
/*
* OF interrupt mapping

8
include/asm-powerpc/ucc_slow.h
View File

@ -150,7 +150,7 @@ struct ucc_slow_info {
int ucc_num;
enum qe_clock rx_clock;
enum qe_clock tx_clock;
struct ucc_slow *regs;
u32 regs;
int irq;
u16 uccm_mask;
int data_mem_part;
@ -199,9 +199,9 @@ struct ucc_slow_private {
and length for first BD in a frame */
u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */
u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */
u8 *confBd; /* next BD for confirm after Tx */
u8 *tx_bd; /* next BD for new Tx request */
u8 *rx_bd; /* next BD to collect after Rx */
struct qe_bd *confBd; /* next BD for confirm after Tx */
struct qe_bd *tx_bd; /* next BD for new Tx request */
struct qe_bd *rx_bd; /* next BD to collect after Rx */
void *p_rx_frame; /* accumulating receive frame */
u16 *p_ucce; /* a pointer to the event register in memory.
*/