- core: Make atomic_enable and disable optional for CRTC
- dw-hdmi: Lower max frequency for the Allwinner H6, SCDC configuration improvements for older controller versions - omap: a fix for the CEC clock management policy -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXK9aTQAKCRDj7w1vZxhR xXKwAP9vwrBuyG0j7nK/uVPEHZYUgb41i9t+dC38wAWDcbb4swEAzGs+VEkqKvSt T9dJNxd1lbdYTRTOKkiRT40tuoiR2Q0= =NuDF -----END PGP SIGNATURE----- Merge tag 'drm-misc-fixes-2019-04-11' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes - core: Make atomic_enable and disable optional for CRTC - dw-hdmi: Lower max frequency for the Allwinner H6, SCDC configuration improvements for older controller versions - omap: a fix for the CEC clock management policy Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190411151658.orm46ccd5zmrw27l@flea
This commit is contained in:
commit
ffb5d6fe14
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@ -1037,6 +1037,31 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
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}
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EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write);
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/* Filter out invalid setups to avoid configuring SCDC and scrambling */
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static bool dw_hdmi_support_scdc(struct dw_hdmi *hdmi)
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{
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struct drm_display_info *display = &hdmi->connector.display_info;
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/* Completely disable SCDC support for older controllers */
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if (hdmi->version < 0x200a)
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return false;
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/* Disable if SCDC is not supported, or if an HF-VSDB block is absent */
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if (!display->hdmi.scdc.supported ||
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!display->hdmi.scdc.scrambling.supported)
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return false;
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/*
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* Disable if display only support low TMDS rates and scrambling
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* for low rates is not supported either
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*/
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if (!display->hdmi.scdc.scrambling.low_rates &&
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display->max_tmds_clock <= 340000)
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return false;
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return true;
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}
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/*
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* HDMI2.0 Specifies the following procedure for High TMDS Bit Rates:
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* - The Source shall suspend transmission of the TMDS clock and data
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@ -1055,7 +1080,7 @@ void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi)
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unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
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/* Control for TMDS Bit Period/TMDS Clock-Period Ratio */
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if (hdmi->connector.display_info.hdmi.scdc.supported) {
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if (dw_hdmi_support_scdc(hdmi)) {
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if (mtmdsclock > HDMI14_MAX_TMDSCLK)
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drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 1);
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else
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@ -1579,8 +1604,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
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/* Set up HDMI_FC_INVIDCONF */
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inv_val = (hdmi->hdmi_data.hdcp_enable ||
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vmode->mtmdsclock > HDMI14_MAX_TMDSCLK ||
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hdmi_info->scdc.scrambling.low_rates ?
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(dw_hdmi_support_scdc(hdmi) &&
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(vmode->mtmdsclock > HDMI14_MAX_TMDSCLK ||
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hdmi_info->scdc.scrambling.low_rates)) ?
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HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
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HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
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@ -1646,7 +1672,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
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}
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/* Scrambling Control */
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if (hdmi_info->scdc.supported) {
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if (dw_hdmi_support_scdc(hdmi)) {
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if (vmode->mtmdsclock > HDMI14_MAX_TMDSCLK ||
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hdmi_info->scdc.scrambling.low_rates) {
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/*
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@ -1034,7 +1034,7 @@ disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state)
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funcs->atomic_disable(crtc, old_crtc_state);
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else if (funcs->disable)
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funcs->disable(crtc);
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else
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else if (funcs->dpms)
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funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
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if (!(dev->irq_enabled && dev->num_crtcs))
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@ -1277,10 +1277,9 @@ void drm_atomic_helper_commit_modeset_enables(struct drm_device *dev,
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if (new_crtc_state->enable) {
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DRM_DEBUG_ATOMIC("enabling [CRTC:%d:%s]\n",
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crtc->base.id, crtc->name);
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if (funcs->atomic_enable)
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funcs->atomic_enable(crtc, old_crtc_state);
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else
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else if (funcs->commit)
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funcs->commit(crtc);
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}
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}
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@ -175,6 +175,7 @@ static int hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
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REG_FLD_MOD(core->base, HDMI_CORE_SYS_INTR_UNMASK4, 0, 3, 3);
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hdmi_wp_clear_irqenable(core->wp, HDMI_IRQ_CORE);
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hdmi_wp_set_irqstatus(core->wp, HDMI_IRQ_CORE);
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REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0);
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hdmi4_core_disable(core);
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return 0;
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}
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@ -182,16 +183,24 @@ static int hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
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if (err)
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return err;
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/*
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* Initialize CEC clock divider: CEC needs 2MHz clock hence
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* set the divider to 24 to get 48/24=2MHz clock
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*/
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REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0);
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/* Clear TX FIFO */
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if (!hdmi_cec_clear_tx_fifo(adap)) {
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pr_err("cec-%s: could not clear TX FIFO\n", adap->name);
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return -EIO;
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err = -EIO;
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goto err_disable_clk;
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}
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/* Clear RX FIFO */
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if (!hdmi_cec_clear_rx_fifo(adap)) {
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pr_err("cec-%s: could not clear RX FIFO\n", adap->name);
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return -EIO;
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err = -EIO;
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goto err_disable_clk;
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}
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/* Clear CEC interrupts */
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@ -236,6 +245,12 @@ static int hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
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hdmi_write_reg(core->base, HDMI_CEC_INT_STATUS_1, temp);
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}
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return 0;
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err_disable_clk:
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REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0);
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hdmi4_core_disable(core);
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return err;
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}
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static int hdmi_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
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@ -333,11 +348,8 @@ int hdmi4_cec_init(struct platform_device *pdev, struct hdmi_core_data *core,
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return ret;
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core->wp = wp;
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/*
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* Initialize CEC clock divider: CEC needs 2MHz clock hence
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* set the devider to 24 to get 48/24=2MHz clock
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*/
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REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0);
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/* Disable clock initially, hdmi_cec_adap_enable() manages it */
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REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0);
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ret = cec_register_adapter(core->adap, &pdev->dev);
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if (ret < 0) {
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@ -708,7 +708,7 @@ int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
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else
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acore.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_RIGHT;
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/*
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* The I2S input word length is twice the lenght given in the IEC-60958
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* The I2S input word length is twice the length given in the IEC-60958
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* status word. If the word size is greater than
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* 20 bits, increment by one.
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*/
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@ -48,8 +48,13 @@ static enum drm_mode_status
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sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector,
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const struct drm_display_mode *mode)
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{
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/* This is max for HDMI 2.0b (4K@60Hz) */
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if (mode->clock > 594000)
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/*
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* Controller support maximum of 594 MHz, which correlates to
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* 4K@60Hz 4:4:4 or RGB. However, for frequencies greater than
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* 340 MHz scrambling has to be enabled. Because scrambling is
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* not yet implemented, just limit to 340 MHz for now.
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*/
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if (mode->clock > 340000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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@ -227,7 +227,7 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
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err_unregister_gates:
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for (i = 0; i < CLK_NUM; i++)
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if (clk_data->hws[i])
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if (!IS_ERR_OR_NULL(clk_data->hws[i]))
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clk_hw_unregister_gate(clk_data->hws[i]);
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clk_disable_unprepare(tcon_top->bus);
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err_assert_reset:
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@ -245,6 +245,7 @@ static void sun8i_tcon_top_unbind(struct device *dev, struct device *master,
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of_clk_del_provider(dev->of_node);
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for (i = 0; i < CLK_NUM; i++)
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if (clk_data->hws[i])
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clk_hw_unregister_gate(clk_data->hws[i]);
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clk_disable_unprepare(tcon_top->bus);
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@ -418,6 +418,8 @@ struct drm_crtc_helper_funcs {
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* Drivers can use the @old_crtc_state input parameter if the operations
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* needed to enable the CRTC don't depend solely on the new state but
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* also on the transition between the old state and the new state.
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*
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* This function is optional.
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*/
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void (*atomic_enable)(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state);
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@ -441,6 +443,8 @@ struct drm_crtc_helper_funcs {
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* parameter @old_crtc_state which could be used to access the old
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* state. Atomic drivers should consider to use this one instead
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* of @disable.
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*
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* This function is optional.
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*/
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void (*atomic_disable)(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state);
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