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ARM: SoC low-priority fixes for 3.16 

A small selection of fixes coming in late during the release cycle and
 not being critical enough for 3.15 inclusion.
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Merge tag 'fixes-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next

Pull ARM SoC low-priority fixes from Olof Johansson:
 "A small selection of fixes coming in late during the release cycle and
  not being critical enough for 3.15 inclusion"

* tag 'fixes-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: shmobile: armadillo800eva: fixup HDMI sound flags setting
  ARM: msm: Silence readb/writeb warnings due to missing IOMEM()
  ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition
  ARM: dts: am335x-boneblack: remove use of ti,vcc-aux-disable-is-sleep
  ARM: OMAP2+: free use_gptimer_clksrc variable after boot
  ARM: OMAP5: Redo THUMB mode switch on secondary CPU
  ARM: dts: AM4372: add l3-noc information
  ARM: dts: DRA7: Use dra7-l3-noc instead of omap4-l3-noc
  reset: Add of_reset_control_get to reset.h
This commit is contained in:
Linus Torvalds 2014-06-02 16:13:34 -07:00
parent 80081ec309 da98f44f27
commit ff933a0817
11 changed files with 25 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/am335x-boneblack.dts
View File

@ -26,7 +26,6 @@
pinctrl-0 = <&emmc_pins>; pinctrl-0 = <&emmc_pins>;
bus-width = <8>; bus-width = <8>;
status = "okay"; status = "okay";
ti,vcc-aux-disable-is-sleep;
}; };
&am33xx_pinmux { &am33xx_pinmux {

6
arch/arm/boot/dts/am4372.dtsi
View File

@ -67,11 +67,15 @@
}; };
ocp { ocp {
compatible = "simple-bus"; compatible = "ti,am4372-l3-noc", "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
ti,hwmods = "l3_main"; ti,hwmods = "l3_main";
reg = <0x44000000 0x400000
0x44800000 0x400000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
prcm: prcm@44df0000 { prcm: prcm@44df0000 {
compatible = "ti,am4-prcm"; compatible = "ti,am4-prcm";

2
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -341,7 +341,7 @@
}; };
partition@9 { partition@9 {
label = "NAND.file-system"; label = "NAND.file-system";
reg = <0x00800000 0x1F600000>; reg = <0x00a00000 0x1f600000>;
}; };
}; };
}; };

6
arch/arm/boot/dts/dra7.dtsi
View File

@ -99,13 +99,13 @@
* hierarchy. * hierarchy.
*/ */
ocp { ocp {
compatible = "ti,omap4-l3-noc", "simple-bus"; compatible = "ti,dra7-l3-noc", "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
ti,hwmods = "l3_main_1", "l3_main_2"; ti,hwmods = "l3_main_1", "l3_main_2";
reg = <0x44000000 0x2000>, reg = <0x44000000 0x1000000>,
<0x44800000 0x3000>; <0x45000000 0x1000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/mach-msm/board-trout-gpio.c
View File

@ -89,7 +89,7 @@ static int trout_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
.base = base_gpio, \ .base = base_gpio, \
.ngpio = 8, \ .ngpio = 8, \
}, \ }, \
.reg = (void *) reg_num + TROUT_CPLD_BASE, \ .reg = reg_num + TROUT_CPLD_BASE, \
.shadow = shadow_val, \ .shadow = shadow_val, \
} }

2
arch/arm/mach-msm/board-trout.c
View File

@ -78,7 +78,7 @@ static void __init trout_init(void)
static struct map_desc trout_io_desc[] __initdata = { static struct map_desc trout_io_desc[] __initdata = {
{ {
.virtual = TROUT_CPLD_BASE, .virtual = (unsigned long)TROUT_CPLD_BASE,
.pfn = __phys_to_pfn(TROUT_CPLD_START), .pfn = __phys_to_pfn(TROUT_CPLD_START),
.length = TROUT_CPLD_SIZE, .length = TROUT_CPLD_SIZE,
.type = MT_DEVICE_NONSHARED .type = MT_DEVICE_NONSHARED

2
arch/arm/mach-msm/board-trout.h
View File

@ -58,7 +58,7 @@
#define TROUT_4_TP_LS_EN 19 #define TROUT_4_TP_LS_EN 19
#define TROUT_5_TP_LS_EN 1 #define TROUT_5_TP_LS_EN 1
#define TROUT_CPLD_BASE 0xE8100000 #define TROUT_CPLD_BASE IOMEM(0xE8100000)
#define TROUT_CPLD_START 0x98000000 #define TROUT_CPLD_START 0x98000000
#define TROUT_CPLD_SIZE SZ_4K #define TROUT_CPLD_SIZE SZ_4K

6
arch/arm/mach-omap2/omap-headsmp.S
View File

@ -31,10 +31,6 @@
* register AuxCoreBoot0. * register AuxCoreBoot0.
*/ */
ENTRY(omap5_secondary_startup) ENTRY(omap5_secondary_startup)
.arm
THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode.
THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
THUMB( .thumb ) @ switch to Thumb now.
wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
ldr r0, [r2] ldr r0, [r2]
mov r0, r0, lsr #5 mov r0, r0, lsr #5
@ -43,7 +39,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
cmp r0, r4 cmp r0, r4
bne wait bne wait
b secondary_startup b secondary_startup
END(omap5_secondary_startup) ENDPROC(omap5_secondary_startup)
/* /*
* OMAP4 specific entry point for secondary CPU to jump from ROM * OMAP4 specific entry point for secondary CPU to jump from ROM
* code. This routine also provides a holding flag into which * code. This routine also provides a holding flag into which

2
arch/arm/mach-omap2/timer.c
View File

@ -361,7 +361,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
/* Clocksource code */ /* Clocksource code */
static struct omap_dm_timer clksrc; static struct omap_dm_timer clksrc;
static bool use_gptimer_clksrc; static bool use_gptimer_clksrc __initdata;
/* /*
* clocksource * clocksource

2
arch/arm/mach-shmobile/board-armadillo800eva.c
View File

@ -1017,7 +1017,7 @@ static struct asoc_simple_card_info fsi2_hdmi_info = {
.platform = "sh_fsi2", .platform = "sh_fsi2",
.cpu_dai = { .cpu_dai = {
.name = "fsib-dai", .name = "fsib-dai",
.fmt = SND_SOC_DAIFMT_CBM_CFM, .fmt = SND_SOC_DAIFMT_CBS_CFS,
}, },
.codec_dai = { .codec_dai = {
.name = "sh_mobile_hdmi-hifi", .name = "sh_mobile_hdmi-hifi",

10
include/linux/reset.h
View File

@ -2,6 +2,7 @@
#define _LINUX_RESET_H_ #define _LINUX_RESET_H_
struct device; struct device;
struct device_node;
struct reset_control; struct reset_control;
#ifdef CONFIG_RESET_CONTROLLER #ifdef CONFIG_RESET_CONTROLLER
@ -33,6 +34,9 @@ static inline struct reset_control *devm_reset_control_get_optional(
return devm_reset_control_get(dev, id); return devm_reset_control_get(dev, id);
} }
struct reset_control *of_reset_control_get(struct device_node *node,
const char *id);
#else #else
static inline int reset_control_reset(struct reset_control *rstc) static inline int reset_control_reset(struct reset_control *rstc)
@ -75,6 +79,12 @@ static inline struct reset_control *devm_reset_control_get_optional(
return ERR_PTR(-ENOSYS); return ERR_PTR(-ENOSYS);
} }
static inline struct reset_control *of_reset_control_get(
struct device_node *node, const char *id)
{
return ERR_PTR(-ENOSYS);
}
#endif /* CONFIG_RESET_CONTROLLER */ #endif /* CONFIG_RESET_CONTROLLER */
#endif #endif