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Device tree patches for the Nomadik machine: 

- Move clock registration to the device tree
 - Support probing the MTU timer from the device tree
 - Register user LED and user key in the device tree
 - Update defconfig to account for user LED and user key
 - Move pin control mappings to the device tree
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Merge tag 'nomadik-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

From Linus Walleij:
Device tree patches for the Nomadik machine:
- Move clock registration to the device tree
- Support probing the MTU timer from the device tree
- Register user LED and user key in the device tree
- Update defconfig to account for user LED and user key
- Move pin control mappings to the device tree

* tag 'nomadik-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: move the pin configuration to DT
  ARM: nomadik: add led and key for S8815
  ARM: nomadik: register clocksource from device tree
  ARM: nomadik: convert all clocks except timer to dt
  clocksource: nomadik-mtu: support of probe

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-05-27 21:20:17 -07:00
parent e4aa937ec7 49932f5ef1
commit ff753f43da
8 changed files with 288 additions and 116 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/devicetree/bindings/arm/ste-nomadik.txt
View File

@ -3,6 +3,11 @@ ST-Ericsson Nomadik Device Tree Bindings
For various board the "board" node may contain specific properties
that pertain to this particular board, such as board-specific GPIOs.
Required root node property: src
- Nomadik System and reset controller used for basic chip control, clock
and reset line control.
- compatible: must be "stericsson,nomadik,src"
Boards with the Nomadik SoC include:
S8815 "MiniKit" manufactured by Calao Systems:

63
arch/arm/boot/dts/ste-nomadik-s8815.dts
View File

@ -22,6 +22,43 @@
};
};
pinctrl {
/* Hog CD pins */
pinctrl-names = "default";
pinctrl-0 = <&cd_default_mode>;
mmcsd-cd {
cd_default_mode: cd_default {
cd_default_cfg1 {
/* CD input GPIO */
ste,pins = "GPIO111_H21";
ste,input = <0>;
};
cd_default_cfg2 {
/* CD GPIO biasing */
ste,pins = "GPIO112_J21";
ste,output = <0>;
};
};
};
user-led {
user_led_default_mode: user_led_default {
user_led_default_cfg {
ste,pins = "GPIO2_C5";
ste,output = <1>;
};
};
};
user-button {
user_button_default_mode: user_button_default {
user_button_default_cfg {
ste,pins = "GPIO3_A4";
ste,input = <0>;
};
};
};
};
/* Custom board node with GPIO pins to active etc */
usb-s8815 {
/* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
@ -33,4 +70,30 @@
gpios = <&gpio3 16 0x1>;
};
};
/* The user LED on the board is set up to be used for heartbeat */
leds {
compatible = "gpio-leds";
user-led {
label = "user_led";
gpios = <&gpio0 2 0x1>;
default-state = "off";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&user_led_default_mode>;
};
};
/* User key mapped in as "escape" */
gpio-keys {
compatible = "gpio-keys";
user-button {
label = "user_button";
gpios = <&gpio0 3 0x1>;
linux,code = <1>; /* KEY_ESC */
gpio-key,wakeup;
pinctrl-names = "default";
pinctrl-0 = <&user_button_default_mode>;
};
};
};

145
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
View File

@ -21,18 +21,23 @@
cache-level = <2>;
};
mtu0 {
mtu0: mtu@101e2000 {
/* Nomadik system timer */
compatible = "st,nomadik-mtu";
reg = <0x101e2000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <4>;
clocks = <&timclk>, <&pclk>;
clock-names = "timclk", "apb_pclk";
};
mtu1 {
mtu1: mtu@101e3000 {
/* Secondary timer */
reg = <0x101e3000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <5>;
clocks = <&timclk>, <&pclk>;
clock-names = "timclk", "apb_pclk";
};
gpio0: gpio@101e4000 {
@ -45,6 +50,7 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <0>;
clocks = <&pclk>;
};
gpio1: gpio@101e5000 {
@ -57,6 +63,7 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <1>;
clocks = <&pclk>;
};
gpio2: gpio@101e6000 {
@ -69,6 +76,7 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <2>;
clocks = <&pclk>;
};
gpio3: gpio@101e7000 {
@ -81,10 +89,117 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <3>;
clocks = <&pclk>;
};
pinctrl {
compatible = "stericsson,nmk-pinctrl-stn8815";
/* Pin configurations */
uart0 {
uart0_default_mux: uart0_mux {
u0_default_mux {
ste,function = "u0";
ste,pins = "u0_a_1";
};
};
};
uart1 {
uart1_default_mux: uart1_mux {
u1_default_mux {
ste,function = "u1";
ste,pins = "u1_a_1";
};
};
};
mmcsd {
mmcsd_default_mux: mmcsd_mux {
mmcsd_default_mux {
ste,function = "mmcsd";
ste,pins = "mmcsd_a_1";
};
};
mmcsd_default_mode: mmcsd_default {
mmcsd_default_cfg1 {
/* MCCLK */
ste,pins = "GPIO8_B10";
ste,output = <0>;
};
mmcsd_default_cfg2 {
/* MCCMDDIR, MCDAT0DIR, MCDAT31DIR */
ste,pins = "GPIO10_C11", "GPIO15_A12",
"GPIO16_C13";
ste,output = <1>;
};
mmcsd_default_cfg3 {
/* MCCMD, MCDAT3-0, MCMSFBCLK */
ste,pins = "GPIO9_A10", "GPIO11_B11",
"GPIO12_A11", "GPIO13_C12",
"GPIO14_B12", "GPIO24_C15";
ste,input = <1>;
};
};
};
i2c0 {
i2c0_default_mode: i2c0_default {
i2c0_default_cfg {
ste,pins = "GPIO62_D3", "GPIO63_D2";
ste,input = <1>;
};
};
};
i2c1 {
i2c1_default_mode: i2c1_default {
i2c1_default_cfg {
ste,pins = "GPIO53_L4", "GPIO54_L3";
ste,input = <1>;
};
};
};
i2c2 {
i2c2_default_mode: i2c2_default {
i2c2_default_cfg {
ste,pins = "GPIO73_C21", "GPIO74_C20";
ste,input = <1>;
};
};
};
};
src: src@101e0000 {
compatible = "stericsson,nomadik-src";
reg = <0x101e0000 0x1000>;
clocks {
/*
* Dummy clock for primecells
*/
pclk: pclk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
/*
* The 2.4 MHz TIMCLK reference clock is active at
* boot time, this is actually the MXTALCLK @19.2 MHz
* divided by 8. This clock is used by the timers and
* watchdog. See page 105 ff.
*/
timclk: timclk@2.4M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <2400000>;
};
/*
* At boot time, PLL2 is set to generate a set of
* fixed clocks, one of them is CLK48, the 48 MHz
* clock, routed to the UART, MMC/SD, I2C, IrDA,
* USB and SSP blocks.
*/
clk48: clk48@48M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <48000000>;
};
};
};
/* A NAND flash of 128 MiB */
@ -97,6 +212,7 @@
<0x41000000 0x2000>, /* NAND Base ADDR */
<0x40800000 0x2000>; /* NAND Base CMD */
reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
clocks = <&pclk>;
status = "okay";
partition@0 {
@ -144,6 +260,8 @@
<&gpio1 30 0>; /* scl */
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_default_mode>;
stw4811@2d {
compatible = "st,stw4811";
@ -158,6 +276,8 @@
<&gpio1 21 0>; /* scl */
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_default_mode>;
camera@2d {
compatible = "st,camera";
@ -180,6 +300,9 @@
<&gpio2 9 0>; /* scl */
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_default_mode>;
stw4811@2d {
compatible = "st,stw4811-usb";
reg = <0x2d>;
@ -211,6 +334,10 @@
reg = <0x101fd000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <12>;
clocks = <&clk48>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart0_default_mux>;
};
uart1: uart@101fb000 {
@ -218,6 +345,10 @@
reg = <0x101fb000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <17>;
clocks = <&clk48>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart1_default_mux>;
};
uart2: uart@101f2000 {
@ -225,17 +356,23 @@
reg = <0x101f2000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <28>;
clocks = <&clk48>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
rng: rng@101b0000 {
compatible = "arm,primecell";
reg = <0x101b0000 0x1000>;
clocks = <&clk48>, <&pclk>;
clock-names = "rng", "apb_pclk";
};
rtc: rtc@101e8000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x101e8000 0x1000>;
clocks = <&pclk>;
clock-names = "apb_pclk";
interrupt-parent = <&vica>;
interrupts = <10>;
};
@ -243,6 +380,8 @@
mmcsd: sdi@101f6000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x101f6000 0x1000>;
clocks = <&clk48>, <&pclk>;
clock-names = "mclk", "apb_pclk";
interrupt-parent = <&vica>;
interrupts = <22>;
max-frequency = <48000000>;
@ -251,6 +390,8 @@
mmc-cap-sd-highspeed;
cd-gpios = <&gpio3 15 0x1>;
cd-inverted;
pinctrl-names = "default";
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
};
};
};

6
arch/arm/configs/nhk8815_defconfig
View File

@ -81,6 +81,7 @@ CONFIG_PPP_SYNC_TTY=m
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_MOUSE_PS2 is not set
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
@ -96,6 +97,11 @@ CONFIG_DEBUG_GPIO=y
CONFIG_MMC=y
CONFIG_MMC_CLKGATE=y
CONFIG_MMC_ARMMMCI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PL031=y
CONFIG_DMADEVICES=y

1
arch/arm/mach-nomadik/Kconfig
View File

@ -6,6 +6,7 @@ config ARCH_NOMADIK
select ARM_VIC
select CLKSRC_NOMADIK_MTU
select CLKSRC_NOMADIK_MTU_SCHED_CLOCK
select CLKSRC_OF
select COMMON_CLK
select CPU_ARM926T
select GENERIC_CLOCKEVENTS

73
arch/arm/mach-nomadik/cpu-8815.c
View File

@ -27,9 +27,7 @@
#include <linux/dma-mapping.h>
#include <linux/irqchip.h>
#include <linux/platform_data/clk-nomadik.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/clocksource-nomadik-mtu.h>
#include <linux/clocksource.h>
#include <linux/of_irq.h>
#include <linux/of_gpio.h>
#include <linux/of_address.h>
@ -91,48 +89,6 @@
#define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
#define NOMADIK_UART1_VBASE 0xF01FB000
static unsigned long out_low[] = { PIN_OUTPUT_LOW };
static unsigned long out_high[] = { PIN_OUTPUT_HIGH };
static unsigned long in_nopull[] = { PIN_INPUT_NOPULL };
static unsigned long in_pullup[] = { PIN_INPUT_PULLUP };
static struct pinctrl_map __initdata nhk8815_pinmap[] = {
PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-stn8815", "u0_a_1", "u0"),
PIN_MAP_MUX_GROUP_DEFAULT("uart1", "pinctrl-stn8815", "u1_a_1", "u1"),
/* Hog in MMC/SD card mux */
PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-stn8815", "mmcsd_a_1", "mmcsd"),
/* MCCLK */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO8_B10", out_low),
/* MCCMD */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO9_A10", in_pullup),
/* MCCMDDIR */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO10_C11", out_high),
/* MCDAT3-0 */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO11_B11", in_pullup),
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO12_A11", in_pullup),
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO13_C12", in_pullup),
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO14_B12", in_pullup),
/* MCDAT0DIR */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO15_A12", out_high),
/* MCDAT31DIR */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO16_C13", out_high),
/* MCMSFBCLK */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO24_C15", in_pullup),
/* CD input GPIO */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO111_H21", in_nopull),
/* CD bias drive */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO112_J21", out_low),
/* I2C0 */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO62_D3", in_pullup),
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO63_D2", in_pullup),
/* I2C1 */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO53_L4", in_pullup),
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO54_L3", in_pullup),
/* I2C2 */
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO73_C21", in_pullup),
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO74_C20", in_pullup),
};
/* This is needed for LL-debug/earlyprintk/debug-macro.S */
static struct map_desc cpu8815_io_desc[] __initdata = {
{
@ -172,7 +128,7 @@ static void __init cpu8815_timer_init_of(void)
/* We need this to be up now */
nomadik_clk_init();
mtu = of_find_node_by_path("/mtu0");
mtu = of_find_node_by_path("/mtu@101e2000");
if (!mtu)
return;
base = of_iomap(mtu, 0);
@ -188,7 +144,7 @@ static void __init cpu8815_timer_init_of(void)
src_cr |= SRC_CR_INIT_VAL;
writel(src_cr, base);
nmdk_timer_init(base, irq);
clocksource_of_init();
}
static struct fsmc_nand_timings cpu8815_nand_timings = {
@ -280,28 +236,10 @@ device_initcall(cpu8815_mmcsd_init);
/* These are mostly to get the right device names for the clock lookups */
static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO0_BASE,
"gpio.0", NULL),
OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO1_BASE,
"gpio.1", NULL),
OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO2_BASE,
"gpio.2", NULL),
OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO3_BASE,
"gpio.3", NULL),
OF_DEV_AUXDATA("stericsson,nmk-pinctrl-stn8815", 0,
"pinctrl-stn8815", NULL),
OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART0_BASE,
"uart0", NULL),
OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART1_BASE,
"uart1", NULL),
OF_DEV_AUXDATA("arm,primecell", NOMADIK_RNG_BASE,
"rng", NULL),
OF_DEV_AUXDATA("arm,primecell", NOMADIK_RTC_BASE,
"rtc-pl031", NULL),
OF_DEV_AUXDATA("stericsson,fsmc-nand", NOMADIK_FSMC_BASE,
"fsmc-nand", &cpu8815_nand_data),
NULL, &cpu8815_nand_data),
OF_DEV_AUXDATA("arm,primecell", NOMADIK_SDI_BASE,
"mmci", &mmcsd_plat_data),
NULL, &mmcsd_plat_data),
{ /* sentinel */ },
};
@ -311,7 +249,6 @@ static void __init cpu8815_init_of(void)
/* At full speed latency must be >=2, so 0x249 in low bits */
l2x0_of_init(0x00730249, 0xfe000fff);
#endif
pinctrl_register_mappings(nhk8815_pinmap, ARRAY_SIZE(nhk8815_pinmap));
of_platform_populate(NULL, of_default_bus_match_table,
cpu8815_auxdata_lookup, NULL);
}

41
drivers/clk/clk-nomadik.c
View File

@ -3,46 +3,19 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
/*
* The Nomadik clock tree is described in the STN8815A12 DB V4.2
* reference manual for the chip, page 94 ff.
*/
static const __initconst struct of_device_id cpu8815_clk_match[] = {
{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
{ /* sentinel */ }
};
void __init nomadik_clk_init(void)
{
struct clk *clk;
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
clk_register_clkdev(clk, "apb_pclk", NULL);
clk_register_clkdev(clk, NULL, "gpio.0");
clk_register_clkdev(clk, NULL, "gpio.1");
clk_register_clkdev(clk, NULL, "gpio.2");
clk_register_clkdev(clk, NULL, "gpio.3");
clk_register_clkdev(clk, NULL, "rng");
clk_register_clkdev(clk, NULL, "fsmc-nand");
/*
* The 2.4 MHz TIMCLK reference clock is active at boot time, this is
* actually the MXTALCLK @19.2 MHz divided by 8. This clock is used
* by the timers and watchdog. See page 105 ff.
*/
clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT,
2400000);
clk_register_clkdev(clk, NULL, "mtu0");
clk_register_clkdev(clk, NULL, "mtu1");
/*
* At boot time, PLL2 is set to generate a set of fixed clocks,
* one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD
* I2C, IrDA, USB and SSP blocks.
*/
clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT,
48000000);
clk_register_clkdev(clk, NULL, "uart0");
clk_register_clkdev(clk, NULL, "uart1");
clk_register_clkdev(clk, NULL, "mmci");
clk_register_clkdev(clk, NULL, "ssp");
clk_register_clkdev(clk, NULL, "nmk-i2c.0");
clk_register_clkdev(clk, NULL, "nmk-i2c.1");
of_clk_init(cpu8815_clk_match);
}

70
drivers/clocksource/nomadik-mtu.c
View File

@ -13,6 +13,9 @@
#include <linux/io.h>
#include <linux/clockchips.h>
#include <linux/clocksource.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/clk.h>
#include <linux/jiffies.h>
#include <linux/delay.h>
@ -188,22 +191,15 @@ static struct irqaction nmdk_timer_irq = {
.dev_id = &nmdk_clkevt,
};
void __init nmdk_timer_init(void __iomem *base, int irq)
static void __init __nmdk_timer_init(void __iomem *base, int irq,
struct clk *pclk, struct clk *clk)
{
unsigned long rate;
struct clk *clk0, *pclk0;
mtu_base = base;
pclk0 = clk_get_sys("mtu0", "apb_pclk");
BUG_ON(IS_ERR(pclk0));
BUG_ON(clk_prepare(pclk0) < 0);
BUG_ON(clk_enable(pclk0) < 0);
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
BUG_ON(clk_prepare(clk0) < 0);
BUG_ON(clk_enable(clk0) < 0);
BUG_ON(clk_prepare_enable(pclk));
BUG_ON(clk_prepare_enable(clk));
/*
* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
@ -213,7 +209,7 @@ void __init nmdk_timer_init(void __iomem *base, int irq)
* to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
* with 16 gives too low timer resolution.
*/
rate = clk_get_rate(clk0);
rate = clk_get_rate(clk);
if (rate > 32000000) {
rate /= 16;
clk_prescale = MTU_CRn_PRESCALE_16;
@ -247,3 +243,53 @@ void __init nmdk_timer_init(void __iomem *base, int irq)
mtu_delay_timer.freq = rate;
register_current_timer_delay(&mtu_delay_timer);
}
void __init nmdk_timer_init(void __iomem *base, int irq)
{
struct clk *clk0, *pclk0;
pclk0 = clk_get_sys("mtu0", "apb_pclk");
BUG_ON(IS_ERR(pclk0));
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
__nmdk_timer_init(base, irq, pclk0, clk0);
}
static struct of_device_id nmdk_timer_match[] __initconst = {
{ .compatible = "st,nomadik-mtu" },
{}
};
static void __init nmdk_timer_of_init(void)
{
struct device_node *node;
struct clk *pclk;
struct clk *clk;
void __iomem *base;
int irq;
node = of_find_matching_node(NULL, nmdk_timer_match);
if (!node)
panic("No timer node");
base = of_iomap(node, 0);
if (!base)
panic("Can't remap registers");
pclk = of_clk_get_by_name(node, "apb_pclk");
if (IS_ERR(pclk))
panic("could not get apb_pclk");
clk = of_clk_get_by_name(node, "timclk");
if (IS_ERR(clk))
panic("could not get timclk");
irq = irq_of_parse_and_map(node, 0);
if (irq <= 0)
panic("Can't parse IRQ");
__nmdk_timer_init(base, irq, pclk, clk);
}
CLOCKSOURCE_OF_DECLARE(nomadik_mtu, "st,nomadik-mtu",
nmdk_timer_of_init);