dma: Add support to program MIC x100 status descriptiors
The MIC X100 DMA engine has a special status descriptor which writes an 8 byte value to a destination location. This is used to signal completion of all DMA descriptors prior to the status descriptor. This patch add a new DMA engine API which enables updating a destination address with an 8 byte immediate data value. Reviewed-by: Nikhil Rao <nikhil.rao@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Lawrynowicz, Jacek <jacek.lawrynowicz@intel.com> Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: Siva Yerramreddy <yshivakrishna@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -193,8 +193,16 @@ static void mic_dma_prog_intr(struct mic_dma_chan *ch)
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static int mic_dma_do_dma(struct mic_dma_chan *ch, int flags, dma_addr_t src,
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dma_addr_t dst, size_t len)
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{
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if (-ENOMEM == mic_dma_prog_memcpy_desc(ch, src, dst, len))
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if (len && -ENOMEM == mic_dma_prog_memcpy_desc(ch, src, dst, len)) {
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return -ENOMEM;
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} else {
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/* 3 is the maximum number of status descriptors */
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int ret = mic_dma_avail_desc_ring_space(ch, 3);
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if (ret < 0)
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return ret;
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}
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/* Above mic_dma_prog_memcpy_desc() makes sure we have enough space */
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if (flags & DMA_PREP_FENCE) {
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mic_dma_prep_status_desc(&ch->desc_ring[ch->head], 0,
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@ -270,6 +278,33 @@ allocate_tx(struct mic_dma_chan *ch)
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return tx;
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}
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/* Program a status descriptor with dst as address and value to be written */
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static struct dma_async_tx_descriptor *
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mic_dma_prep_status_lock(struct dma_chan *ch, dma_addr_t dst, u64 src_val,
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unsigned long flags)
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{
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struct mic_dma_chan *mic_ch = to_mic_dma_chan(ch);
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int result;
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spin_lock(&mic_ch->prep_lock);
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result = mic_dma_avail_desc_ring_space(mic_ch, 4);
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if (result < 0)
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goto error;
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mic_dma_prep_status_desc(&mic_ch->desc_ring[mic_ch->head], src_val, dst,
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false);
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mic_dma_hw_ring_inc_head(mic_ch);
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result = mic_dma_do_dma(mic_ch, flags, 0, 0, 0);
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if (result < 0)
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goto error;
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return allocate_tx(mic_ch);
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error:
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dev_err(mic_dma_ch_to_device(mic_ch),
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"Error enqueueing dma status descriptor, error=%d\n", result);
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spin_unlock(&mic_ch->prep_lock);
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return NULL;
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}
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/*
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* Prepare a memcpy descriptor to be added to the ring.
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* Note that the temporary descriptor adds an extra overhead of copying the
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@ -587,6 +622,8 @@ static int mic_dma_register_dma_device(struct mic_dma_device *mic_dma_dev,
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mic_dma_free_chan_resources;
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mic_dma_dev->dma_dev.device_tx_status = mic_dma_tx_status;
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mic_dma_dev->dma_dev.device_prep_dma_memcpy = mic_dma_prep_memcpy_lock;
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mic_dma_dev->dma_dev.device_prep_dma_imm_data =
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mic_dma_prep_status_lock;
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mic_dma_dev->dma_dev.device_prep_dma_interrupt =
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mic_dma_prep_interrupt_lock;
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mic_dma_dev->dma_dev.device_issue_pending = mic_dma_issue_pending;
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@ -645,6 +645,7 @@ enum dmaengine_alignment {
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* The function takes a buffer of size buf_len. The callback function will
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* be called after period_len bytes have been transferred.
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* @device_prep_interleaved_dma: Transfer expression in a generic way.
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* @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address
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* @device_config: Pushes a new configuration to a channel, return 0 or an error
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* code
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* @device_pause: Pauses any transfer happening on a channel. Returns
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@ -727,6 +728,9 @@ struct dma_device {
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struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
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struct dma_chan *chan, struct dma_interleaved_template *xt,
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unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)(
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struct dma_chan *chan, dma_addr_t dst, u64 data,
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unsigned long flags);
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int (*device_config)(struct dma_chan *chan,
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struct dma_slave_config *config);
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