x86/dma: Use DMA-direct (CONFIG_DMA_DIRECT_OPS=y)
The generic DMA-direct (CONFIG_DMA_DIRECT_OPS=y) implementation is now functionally equivalent to the x86 nommu dma_map implementation, so switch over to using it. That includes switching from using x86_dma_supported in various IOMMU drivers to use dma_direct_supported instead, which provides the same functionality. Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Jon Mason <jdmason@kudzu.us> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Muli Ben-Yehuda <mulix@mulix.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: iommu@lists.linux-foundation.org Link: http://lkml.kernel.org/r/20180319103826.12853-4-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
parent
038d07a283
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fec777c385
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@ -83,6 +83,7 @@ config X86
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select CLOCKSOURCE_VALIDATE_LAST_CYCLE
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select CLOCKSOURCE_WATCHDOG
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select DCACHE_WORD_ACCESS
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select DMA_DIRECT_OPS
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select EDAC_ATOMIC_SCRUB
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select EDAC_SUPPORT
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select GENERIC_CLOCKEVENTS
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@ -36,14 +36,6 @@ int arch_dma_supported(struct device *dev, u64 mask);
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bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp);
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#define arch_dma_alloc_attrs arch_dma_alloc_attrs
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extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_addr, gfp_t flag,
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unsigned long attrs);
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extern void dma_generic_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_addr,
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unsigned long attrs);
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static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
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{
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if (dev->coherent_dma_mask <= DMA_BIT_MASK(24))
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@ -2,13 +2,10 @@
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#ifndef _ASM_X86_IOMMU_H
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#define _ASM_X86_IOMMU_H
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extern const struct dma_map_ops nommu_dma_ops;
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extern int force_iommu, no_iommu;
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extern int iommu_detected;
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extern int iommu_pass_through;
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int x86_dma_supported(struct device *dev, u64 mask);
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/* 10 seconds */
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#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000)
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@ -57,7 +57,7 @@ obj-$(CONFIG_X86_ESPFIX64) += espfix_64.o
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obj-$(CONFIG_SYSFS) += ksysfs.o
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obj-y += bootflag.o e820.o
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obj-y += pci-dma.o quirks.o topology.o kdebugfs.o
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obj-y += alternative.o i8253.o pci-nommu.o hw_breakpoint.o
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obj-y += alternative.o i8253.o hw_breakpoint.o
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obj-y += tsc.o tsc_msr.o io_delay.o rtc.o
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obj-y += pci-iommu_table.o
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obj-y += resource.o
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@ -501,8 +501,7 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
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}
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__free_pages(page, get_order(size));
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} else
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return dma_generic_alloc_coherent(dev, size, dma_addr, flag,
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attrs);
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return dma_direct_alloc(dev, size, dma_addr, flag, attrs);
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return NULL;
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}
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@ -513,7 +512,7 @@ gart_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, 0);
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dma_generic_free_coherent(dev, size, vaddr, dma_addr, attrs);
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dma_direct_free(dev, size, vaddr, dma_addr, attrs);
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}
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static int gart_mapping_error(struct device *dev, dma_addr_t dma_addr)
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@ -705,7 +704,7 @@ static const struct dma_map_ops gart_dma_ops = {
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.alloc = gart_alloc_coherent,
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.free = gart_free_coherent,
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.mapping_error = gart_mapping_error,
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.dma_supported = x86_dma_supported,
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.dma_supported = dma_direct_supported,
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};
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static void gart_iommu_shutdown(void)
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@ -33,6 +33,7 @@
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#include <linux/string.h>
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#include <linux/crash_dump.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-direct.h>
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#include <linux/bitmap.h>
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#include <linux/pci_ids.h>
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#include <linux/pci.h>
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@ -493,7 +494,7 @@ static const struct dma_map_ops calgary_dma_ops = {
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.map_page = calgary_map_page,
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.unmap_page = calgary_unmap_page,
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.mapping_error = calgary_mapping_error,
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.dma_supported = x86_dma_supported,
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.dma_supported = dma_direct_supported,
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};
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static inline void __iomem * busno_to_bbar(unsigned char num)
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@ -18,7 +18,7 @@
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static int forbid_dac __read_mostly;
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const struct dma_map_ops *dma_ops = &nommu_dma_ops;
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const struct dma_map_ops *dma_ops = &dma_direct_ops;
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EXPORT_SYMBOL(dma_ops);
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static int iommu_sac_force __read_mostly;
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@ -76,60 +76,6 @@ void __init pci_iommu_alloc(void)
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}
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}
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}
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void *dma_generic_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_addr, gfp_t flag,
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unsigned long attrs)
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{
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struct page *page;
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unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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dma_addr_t addr;
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again:
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page = NULL;
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/* CMA can be used only in the context which permits sleeping */
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if (gfpflags_allow_blocking(flag)) {
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page = dma_alloc_from_contiguous(dev, count, get_order(size),
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flag);
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if (page) {
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addr = phys_to_dma(dev, page_to_phys(page));
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if (addr + size > dev->coherent_dma_mask) {
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dma_release_from_contiguous(dev, page, count);
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page = NULL;
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}
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}
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}
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/* fallback */
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if (!page)
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page = alloc_pages_node(dev_to_node(dev), flag, get_order(size));
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if (!page)
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return NULL;
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addr = phys_to_dma(dev, page_to_phys(page));
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if (addr + size > dev->coherent_dma_mask) {
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__free_pages(page, get_order(size));
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if (dev->coherent_dma_mask < DMA_BIT_MASK(32) &&
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!(flag & GFP_DMA)) {
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flag = (flag & ~GFP_DMA32) | GFP_DMA;
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goto again;
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}
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return NULL;
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}
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memset(page_address(page), 0, size);
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*dma_addr = addr;
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return page_address(page);
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}
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void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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struct page *page = virt_to_page(vaddr);
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if (!dma_release_from_contiguous(dev, page, count))
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free_pages((unsigned long)vaddr, get_order(size));
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}
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bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp)
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{
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}
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EXPORT_SYMBOL(arch_dma_supported);
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int x86_dma_supported(struct device *dev, u64 mask)
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{
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/* Copied from i386. Doesn't make much sense, because it will
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only work for pci_alloc_coherent.
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The caller just has to use GFP_DMA in this case. */
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if (mask < DMA_BIT_MASK(24))
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return 0;
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return 1;
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}
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static int __init pci_iommu_init(void)
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{
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struct iommu_table_entry *p;
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@ -30,8 +30,7 @@ void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
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*/
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flags |= __GFP_NOWARN;
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vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags,
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attrs);
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vaddr = dma_direct_alloc(hwdev, size, dma_handle, flags, attrs);
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if (vaddr)
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return vaddr;
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if (is_swiotlb_buffer(dma_to_phys(dev, dma_addr)))
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swiotlb_free_coherent(dev, size, vaddr, dma_addr);
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else
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dma_generic_free_coherent(dev, size, vaddr, dma_addr, attrs);
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dma_direct_free(dev, size, vaddr, dma_addr, attrs);
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}
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static const struct dma_map_ops x86_swiotlb_dma_ops = {
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@ -193,7 +193,7 @@ static const struct dma_map_ops sta2x11_dma_ops = {
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.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = swiotlb_sync_sg_for_device,
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.mapping_error = swiotlb_dma_mapping_error,
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.dma_supported = x86_dma_supported,
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.dma_supported = dma_direct_supported,
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};
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/* At setup time, we use our own ops if the device is a ConneXt one */
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@ -28,6 +28,7 @@
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#include <linux/debugfs.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-direct.h>
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#include <linux/iommu-helper.h>
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#include <linux/iommu.h>
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#include <linux/delay.h>
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dev_name(dev));
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iommu_ignore_device(dev);
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dev->dma_ops = &nommu_dma_ops;
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dev->dma_ops = &dma_direct_ops;
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goto out;
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}
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init_iommu_group(dev);
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*/
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static int amd_iommu_dma_supported(struct device *dev, u64 mask)
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{
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if (!x86_dma_supported(dev, mask))
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if (!dma_direct_supported(dev, mask))
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return 0;
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return check_device(dev);
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}
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* continue to be SWIOTLB.
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*/
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if (!swiotlb)
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dma_ops = &nommu_dma_ops;
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dma_ops = &dma_direct_ops;
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if (amd_iommu_unmap_flush)
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pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n");
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@ -45,6 +45,7 @@
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#include <linux/pci-ats.h>
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#include <linux/memblock.h>
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#include <linux/dma-contiguous.h>
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#include <linux/dma-direct.h>
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#include <linux/crash_dump.h>
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#include <asm/irq_remapping.h>
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#include <asm/cacheflush.h>
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.unmap_page = intel_unmap_page,
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.mapping_error = intel_mapping_error,
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#ifdef CONFIG_X86
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.dma_supported = x86_dma_supported,
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.dma_supported = dma_direct_supported,
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#endif
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};
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