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MIPS: AR71xx: Fix AR71XX_PCI_MEM_SIZE 

The base address of the PCI memory is 0x10000000 and the base address of the
PCI configuration space is 0x17000000 on the AR71xx SoCs.

The AR71XX_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that
overlaps with the configuration space.  This patch fixes the value of the
AR71XX_PCI_MEM_SIZE constant, in order to avoid this resource conflicts.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4873/
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Gabor Juhos 2013-01-29 08:27:04 +00:00 committed by Ralf Baechle
parent 4c960910e2
commit fe950df700
1 changed files with 1 additions and 1 deletions
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2
arch/mips/pci/pci-ar71xx.c
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@ -24,7 +24,7 @@
#include <asm/mach-ath79/pci.h>
#define AR71XX_PCI_MEM_BASE 0x10000000
#define AR71XX_PCI_MEM_SIZE 0x08000000
#define AR71XX_PCI_MEM_SIZE 0x07000000
#define AR71XX_PCI_WIN0_OFFS 0x10000000
#define AR71XX_PCI_WIN1_OFFS 0x11000000