thermal: exynos: add get_th_reg() helper
Factor out code for preparing threshold register value from exynos_tmu_initialize() into get_th_reg(). This is a preparation for introducing per-SoC type tmu_initialize method. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -158,6 +158,25 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info)
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EXYNOS_TMU_TEMP_MASK;
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EXYNOS_TMU_TEMP_MASK;
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}
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}
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static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool falling)
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{
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struct exynos_tmu_platform_data *pdata = data->pdata;
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int i;
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for (i = 0; i < pdata->non_hw_trigger_levels; i++) {
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u8 temp = pdata->trigger_levels[i];
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if (falling)
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temp -= pdata->threshold_falling;
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else
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threshold &= ~(0xff << 8 * i);
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threshold |= temp_to_code(data, temp) << 8 * i;
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}
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return threshold;
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}
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static int exynos_tmu_initialize(struct platform_device *pdev)
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static int exynos_tmu_initialize(struct platform_device *pdev)
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{
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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@ -221,8 +240,6 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
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}
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}
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sanitize_temp_error(data, trim_info);
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sanitize_temp_error(data, trim_info);
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rising_threshold = readl(data->base + reg->threshold_th0);
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if (data->soc == SOC_ARCH_EXYNOS4210) {
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if (data->soc == SOC_ARCH_EXYNOS4210) {
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/* Write temperature code for threshold */
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/* Write temperature code for threshold */
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threshold_code = temp_to_code(data, pdata->threshold);
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threshold_code = temp_to_code(data, pdata->threshold);
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@ -235,18 +252,10 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
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exynos_tmu_clear_irqs(data);
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exynos_tmu_clear_irqs(data);
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} else {
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} else {
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/* Write temperature code for rising and falling threshold */
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/* Write temperature code for rising and falling threshold */
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for (i = 0; i < pdata->non_hw_trigger_levels; i++) {
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rising_threshold = readl(data->base + reg->threshold_th0);
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threshold_code = temp_to_code(data,
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rising_threshold = get_th_reg(data, rising_threshold, false);
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pdata->trigger_levels[i]);
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if (data->soc != SOC_ARCH_EXYNOS5440)
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rising_threshold &= ~(0xff << 8 * i);
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falling_threshold = get_th_reg(data, 0, true);
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rising_threshold |= threshold_code << 8 * i;
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if (data->soc != SOC_ARCH_EXYNOS5440) {
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threshold_code = temp_to_code(data,
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pdata->trigger_levels[i] -
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pdata->threshold_falling);
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falling_threshold |= threshold_code << 8 * i;
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}
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}
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writel(rising_threshold,
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writel(rising_threshold,
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data->base + reg->threshold_th0);
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data->base + reg->threshold_th0);
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