TTY fixes for 3.6-rc6
Here are 2 tiny patches for a serial driver to resolve issues that people have reported with the 3.6-rc tree. Both of these have been in the linux-next tree for a while now. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iEYEABECAAYFAlBSGL4ACgkQMUfUDdst+ylrhQCgy0+bmNLtsxrEjJY20ahe9sVT Q3YAn0xmu8SJ+Bv1vJKKD6vIataVQ93a =iZmM -----END PGP SIGNATURE----- Merge tag 'tty-3.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull TTY fixes from Greg Kroah-Hartman: "Here are 2 tiny patches for a serial driver to resolve issues that people have reported with the 3.6-rc tree. Both of these have been in the linux-next tree for a while now. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" * tag 'tty-3.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: tty: serial: imx: don't reinit clock in imx_setup_ufcr() tty: serial: imx: console write routing is unsafe on SMP
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commit
fe59d297ea
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@ -132,6 +132,7 @@
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#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */
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#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */
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#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */
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#define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */
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#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */
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#define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
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#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */
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@ -667,22 +668,11 @@ static void imx_break_ctl(struct uart_port *port, int break_state)
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static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
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{
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unsigned int val;
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unsigned int ufcr_rfdiv;
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/* set receiver / transmitter trigger level.
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* RFDIV is set such way to satisfy requested uartclk value
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*/
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val = TXTL << 10 | RXTL;
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ufcr_rfdiv = (clk_get_rate(sport->clk_per) + sport->port.uartclk / 2)
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/ sport->port.uartclk;
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if(!ufcr_rfdiv)
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ufcr_rfdiv = 1;
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val |= UFCR_RFDIV_REG(ufcr_rfdiv);
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/* set receiver / transmitter trigger level */
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val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE);
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val |= TXTL << UFCR_TXTL_SHF | RXTL;
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writel(val, sport->port.membase + UFCR);
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return 0;
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}
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@ -754,6 +744,7 @@ static int imx_startup(struct uart_port *port)
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}
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}
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spin_lock_irqsave(&sport->port.lock, flags);
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/*
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* Finally, clear and enable interrupts
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*/
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@ -807,7 +798,6 @@ static int imx_startup(struct uart_port *port)
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/*
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* Enable modem status interrupts
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*/
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spin_lock_irqsave(&sport->port.lock,flags);
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imx_enable_ms(&sport->port);
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spin_unlock_irqrestore(&sport->port.lock,flags);
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@ -837,10 +827,13 @@ static void imx_shutdown(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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unsigned long temp;
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unsigned long flags;
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spin_lock_irqsave(&sport->port.lock, flags);
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temp = readl(sport->port.membase + UCR2);
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temp &= ~(UCR2_TXEN);
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writel(temp, sport->port.membase + UCR2);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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if (USE_IRDA(sport)) {
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struct imxuart_platform_data *pdata;
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@ -869,12 +862,14 @@ static void imx_shutdown(struct uart_port *port)
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* Disable all interrupts, port and break condition.
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*/
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spin_lock_irqsave(&sport->port.lock, flags);
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temp = readl(sport->port.membase + UCR1);
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temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
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if (USE_IRDA(sport))
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temp &= ~(UCR1_IREN);
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writel(temp, sport->port.membase + UCR1);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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static void
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@ -1217,6 +1212,9 @@ imx_console_write(struct console *co, const char *s, unsigned int count)
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struct imx_port *sport = imx_ports[co->index];
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struct imx_port_ucrs old_ucr;
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unsigned int ucr1;
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unsigned long flags;
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spin_lock_irqsave(&sport->port.lock, flags);
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/*
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* First, save UCR1/2/3 and then disable interrupts
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@ -1242,6 +1240,8 @@ imx_console_write(struct console *co, const char *s, unsigned int count)
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while (!(readl(sport->port.membase + USR2) & USR2_TXDC));
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imx_port_ucrs_restore(&sport->port, &old_ucr);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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/*
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