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drm/nouveau: ltc/gf100-: fix cbc issues on certain boards 

A mismatch between FB and LTC's idea of how big a large page is causes
issues such as black "holes" in rendering to occur on some boards
(those where LTC is configured for 64KiB large pages) when compression
is used.

Confirmed to fix at least the GK107 MBP.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Ben Skeggs 2014-09-20 17:39:00 +10:00 committed by Dave Airlie
parent 92a32a4722
commit fe3d9c4b87
5 changed files with 7 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c
View File

@ -200,7 +200,6 @@ nvc0_bar_init(struct nouveau_object *object)
nv_mask(priv, 0x000200, 0x00000100, 0x00000000); nv_mask(priv, 0x000200, 0x00000100, 0x00000000);
nv_mask(priv, 0x000200, 0x00000100, 0x00000100); nv_mask(priv, 0x000200, 0x00000100, 0x00000100);
nv_mask(priv, 0x100c80, 0x00000001, 0x00000000);
nv_wr32(priv, 0x001704, 0x80000000 | priv->bar[1].mem->addr >> 12); nv_wr32(priv, 0x001704, 0x80000000 | priv->bar[1].mem->addr >> 12);
if (priv->bar[0].mem) if (priv->bar[0].mem)

1
drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c
View File

@ -60,6 +60,7 @@ nvc0_fb_init(struct nouveau_object *object)
if (priv->r100c10_page) if (priv->r100c10_page)
nv_wr32(priv, 0x100c10, priv->r100c10 >> 8); nv_wr32(priv, 0x100c10, priv->r100c10 >> 8);
nv_mask(priv, 0x100c80, 0x00000001, 0x00000000); /* 128KiB lpg */
return 0; return 0;
} }

2
drivers/gpu/drm/nouveau/core/subdev/ltc/gf100.c
View File

@ -98,6 +98,7 @@ static int
gf100_ltc_init(struct nouveau_object *object) gf100_ltc_init(struct nouveau_object *object)
{ {
struct nvkm_ltc_priv *priv = (void *)object; struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
int ret; int ret;
ret = nvkm_ltc_init(priv); ret = nvkm_ltc_init(priv);
@ -107,6 +108,7 @@ gf100_ltc_init(struct nouveau_object *object)
nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */ nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
nv_wr32(priv, 0x17e8d8, priv->ltc_nr); nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
nv_wr32(priv, 0x17e8d4, priv->tag_base); nv_wr32(priv, 0x17e8d4, priv->tag_base);
nv_mask(priv, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
return 0; return 0;
} }

2
drivers/gpu/drm/nouveau/core/subdev/ltc/gk104.c
View File

@ -28,6 +28,7 @@ static int
gk104_ltc_init(struct nouveau_object *object) gk104_ltc_init(struct nouveau_object *object)
{ {
struct nvkm_ltc_priv *priv = (void *)object; struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
int ret; int ret;
ret = nvkm_ltc_init(priv); ret = nvkm_ltc_init(priv);
@ -37,6 +38,7 @@ gk104_ltc_init(struct nouveau_object *object)
nv_wr32(priv, 0x17e8d8, priv->ltc_nr); nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
nv_wr32(priv, 0x17e000, priv->ltc_nr); nv_wr32(priv, 0x17e000, priv->ltc_nr);
nv_wr32(priv, 0x17e8d4, priv->tag_base); nv_wr32(priv, 0x17e8d4, priv->tag_base);
nv_mask(priv, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
return 0; return 0;
} }

2
drivers/gpu/drm/nouveau/core/subdev/ltc/gm107.c
View File

@ -98,6 +98,7 @@ static int
gm107_ltc_init(struct nouveau_object *object) gm107_ltc_init(struct nouveau_object *object)
{ {
struct nvkm_ltc_priv *priv = (void *)object; struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
int ret; int ret;
ret = nvkm_ltc_init(priv); ret = nvkm_ltc_init(priv);
@ -106,6 +107,7 @@ gm107_ltc_init(struct nouveau_object *object)
nv_wr32(priv, 0x17e27c, priv->ltc_nr); nv_wr32(priv, 0x17e27c, priv->ltc_nr);
nv_wr32(priv, 0x17e278, priv->tag_base); nv_wr32(priv, 0x17e278, priv->tag_base);
nv_mask(priv, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
return 0; return 0;
} }