rtl8xxxu: Implement device specific power_off function
Implment 8723bu specific device power down, and make power_off() a fileops function. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@ -5240,6 +5240,64 @@ exit:
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return ret;
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return ret;
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}
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}
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static int rtl8723bu_active_to_emu(struct rtl8xxxu_priv *priv)
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{
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u8 val8;
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u16 val16;
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u32 val32;
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int count, ret;
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/* Turn off RF */
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rtl8xxxu_write8(priv, REG_RF_CTRL, 0);
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/* Enable rising edge triggering interrupt */
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val16 = rtl8xxxu_read16(priv, REG_GPIO_INTM);
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val16 &= ~GPIO_INTM_EDGE_TRIG_IRQ;
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rtl8xxxu_write16(priv, REG_GPIO_INTM, val16);
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/* Release WLON reset 0x04[16]= 1*/
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val32 = rtl8xxxu_read32(priv, REG_GPIO_INTM);
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val32 |= APS_FSMCO_WLON_RESET;
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rtl8xxxu_write32(priv, REG_GPIO_INTM, val32);
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/* 0x0005[1] = 1 turn off MAC by HW state machine*/
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val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
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val8 |= BIT(1);
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rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
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for (count = RTL8XXXU_MAX_REG_POLL; count; count--) {
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val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
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if ((val8 & BIT(1)) == 0)
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break;
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udelay(10);
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}
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if (!count) {
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dev_warn(&priv->udev->dev, "%s: Disabling MAC timed out\n",
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__func__);
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ret = -EBUSY;
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goto exit;
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}
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/* Enable BT control XTAL setting */
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val8 = rtl8xxxu_read8(priv, REG_AFE_MISC);
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val8 &= ~AFE_MISC_WL_XTAL_CTRL;
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rtl8xxxu_write8(priv, REG_AFE_MISC, val8);
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/* 0x0000[5] = 1 analog Ips to digital, 1:isolation */
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val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL);
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val8 |= SYS_ISO_ANALOG_IPS;
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rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8);
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/* 0x0020[0] = 0 disable LDOA12 MACRO block*/
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val8 = rtl8xxxu_read8(priv, REG_LDOA15_CTRL);
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val8 &= ~LDOA15_ENABLE;
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rtl8xxxu_write8(priv, REG_LDOA15_CTRL, val8);
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exit:
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return ret;
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}
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static int rtl8xxxu_active_to_lps(struct rtl8xxxu_priv *priv)
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static int rtl8xxxu_active_to_lps(struct rtl8xxxu_priv *priv)
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{
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{
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u8 val8;
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u8 val8;
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@ -5932,6 +5990,38 @@ static void rtl8xxxu_power_off(struct rtl8xxxu_priv *priv)
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rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0e);
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rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0e);
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}
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}
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static void rtl8723bu_power_off(struct rtl8xxxu_priv *priv)
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{
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u8 val8;
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u16 val16;
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/*
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* Disable TX report timer
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*/
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val8 = rtl8xxxu_read8(priv, REG_TX_REPORT_CTRL);
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val8 &= ~TX_REPORT_CTRL_TIMER_ENABLE;
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rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL, val8);
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rtl8xxxu_write16(priv, REG_CR, 0x0000);
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rtl8xxxu_active_to_lps(priv);
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/* Reset Firmware if running in RAM */
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if (rtl8xxxu_read8(priv, REG_MCU_FW_DL) & MCU_FW_RAM_SEL)
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rtl8xxxu_firmware_self_reset(priv);
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/* Reset MCU */
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val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
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val16 &= ~SYS_FUNC_CPU_ENABLE;
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rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
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/* Reset MCU ready status */
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rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00);
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rtl8723bu_active_to_emu(priv);
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rtl8xxxu_emu_to_disabled(priv);
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}
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#ifdef NEED_PS_TDMA
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#ifdef NEED_PS_TDMA
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static void rtl8723bu_set_ps_tdma(struct rtl8xxxu_priv *priv,
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static void rtl8723bu_set_ps_tdma(struct rtl8xxxu_priv *priv,
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u8 arg1, u8 arg2, u8 arg3, u8 arg4, u8 arg5)
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u8 arg1, u8 arg2, u8 arg3, u8 arg4, u8 arg5)
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@ -6152,7 +6242,7 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw)
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*/
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*/
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if (priv->rtlchip == 0x8723bu) {
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if (priv->rtlchip == 0x8723bu) {
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val8 = rtl8xxxu_read8(priv, REG_TX_REPORT_CTRL);
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val8 = rtl8xxxu_read8(priv, REG_TX_REPORT_CTRL);
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val8 |= BIT(1);
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val8 |= TX_REPORT_CTRL_TIMER_ENABLE;
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rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL, val8);
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rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL, val8);
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/* Set MAX RPT MACID */
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/* Set MAX RPT MACID */
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rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL + 1, 0x02);
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rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL + 1, 0x02);
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@ -6545,7 +6635,7 @@ static void rtl8xxxu_disable_device(struct ieee80211_hw *hw)
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{
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{
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struct rtl8xxxu_priv *priv = hw->priv;
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struct rtl8xxxu_priv *priv = hw->priv;
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rtl8xxxu_power_off(priv);
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priv->fops->power_off(priv);
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}
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}
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static void rtl8xxxu_cam_write(struct rtl8xxxu_priv *priv,
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static void rtl8xxxu_cam_write(struct rtl8xxxu_priv *priv,
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@ -8277,6 +8367,7 @@ static struct rtl8xxxu_fileops rtl8723au_fops = {
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.parse_efuse = rtl8723au_parse_efuse,
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.parse_efuse = rtl8723au_parse_efuse,
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.load_firmware = rtl8723au_load_firmware,
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.load_firmware = rtl8723au_load_firmware,
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.power_on = rtl8723au_power_on,
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.power_on = rtl8723au_power_on,
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.power_off = rtl8xxxu_power_off,
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.llt_init = rtl8xxxu_init_llt_table,
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.llt_init = rtl8xxxu_init_llt_table,
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.phy_iq_calibrate = rtl8723au_phy_iq_calibrate,
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.phy_iq_calibrate = rtl8723au_phy_iq_calibrate,
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.config_channel = rtl8723au_config_channel,
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.config_channel = rtl8723au_config_channel,
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@ -8300,6 +8391,7 @@ static struct rtl8xxxu_fileops rtl8723bu_fops = {
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.parse_efuse = rtl8723bu_parse_efuse,
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.parse_efuse = rtl8723bu_parse_efuse,
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.load_firmware = rtl8723bu_load_firmware,
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.load_firmware = rtl8723bu_load_firmware,
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.power_on = rtl8723bu_power_on,
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.power_on = rtl8723bu_power_on,
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.power_off = rtl8723bu_power_off,
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.llt_init = rtl8xxxu_auto_llt_table,
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.llt_init = rtl8xxxu_auto_llt_table,
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.phy_init_antenna_selection = rtl8723bu_phy_init_antenna_selection,
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.phy_init_antenna_selection = rtl8723bu_phy_init_antenna_selection,
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.phy_iq_calibrate = rtl8723bu_phy_iq_calibrate,
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.phy_iq_calibrate = rtl8723bu_phy_iq_calibrate,
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@ -8329,6 +8421,7 @@ static struct rtl8xxxu_fileops rtl8192cu_fops = {
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.parse_efuse = rtl8192cu_parse_efuse,
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.parse_efuse = rtl8192cu_parse_efuse,
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.load_firmware = rtl8192cu_load_firmware,
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.load_firmware = rtl8192cu_load_firmware,
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.power_on = rtl8192cu_power_on,
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.power_on = rtl8192cu_power_on,
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.power_off = rtl8xxxu_power_off,
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.llt_init = rtl8xxxu_init_llt_table,
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.llt_init = rtl8xxxu_init_llt_table,
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.phy_iq_calibrate = rtl8723au_phy_iq_calibrate,
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.phy_iq_calibrate = rtl8723au_phy_iq_calibrate,
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.config_channel = rtl8723au_config_channel,
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.config_channel = rtl8723au_config_channel,
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@ -8354,6 +8447,7 @@ static struct rtl8xxxu_fileops rtl8192eu_fops = {
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.parse_efuse = rtl8192eu_parse_efuse,
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.parse_efuse = rtl8192eu_parse_efuse,
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.load_firmware = rtl8192eu_load_firmware,
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.load_firmware = rtl8192eu_load_firmware,
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.power_on = rtl8192eu_power_on,
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.power_on = rtl8192eu_power_on,
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.power_off = rtl8xxxu_power_off,
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.llt_init = rtl8xxxu_auto_llt_table,
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.llt_init = rtl8xxxu_auto_llt_table,
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.phy_iq_calibrate = rtl8723bu_phy_iq_calibrate,
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.phy_iq_calibrate = rtl8723bu_phy_iq_calibrate,
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.config_channel = rtl8723bu_config_channel,
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.config_channel = rtl8723bu_config_channel,
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@ -1257,6 +1257,7 @@ struct rtl8xxxu_fileops {
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int (*parse_efuse) (struct rtl8xxxu_priv *priv);
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int (*parse_efuse) (struct rtl8xxxu_priv *priv);
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int (*load_firmware) (struct rtl8xxxu_priv *priv);
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int (*load_firmware) (struct rtl8xxxu_priv *priv);
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int (*power_on) (struct rtl8xxxu_priv *priv);
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int (*power_on) (struct rtl8xxxu_priv *priv);
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void (*power_off) (struct rtl8xxxu_priv *priv);
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int (*llt_init) (struct rtl8xxxu_priv *priv, u8 last_tx_page);
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int (*llt_init) (struct rtl8xxxu_priv *priv, u8 last_tx_page);
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void (*phy_init_antenna_selection) (struct rtl8xxxu_priv *priv);
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void (*phy_init_antenna_selection) (struct rtl8xxxu_priv *priv);
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void (*phy_iq_calibrate) (struct rtl8xxxu_priv *priv);
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void (*phy_iq_calibrate) (struct rtl8xxxu_priv *priv);
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@ -512,6 +512,8 @@
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#define REG_PKT_LOSE_RPT 0x04e1
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#define REG_PKT_LOSE_RPT 0x04e1
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#define REG_PTCL_ERR_STATUS 0x04e2
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#define REG_PTCL_ERR_STATUS 0x04e2
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#define REG_TX_REPORT_CTRL 0x04ec
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#define REG_TX_REPORT_CTRL 0x04ec
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#define TX_REPORT_CTRL_TIMER_ENABLE BIT(1)
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#define REG_TX_REPORT_TIME 0x04f0
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#define REG_TX_REPORT_TIME 0x04f0
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#define REG_DUMMY 0x04fc
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#define REG_DUMMY 0x04fc
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