hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

mtd: jedec_probe: fix LH28F640BF definition 

Zaurus 5500 contains 2 LH28F640BFHE-PTTL90 (64M 4Mx16) and
the LH28F640BFHE-PTTL90.pdf datasheet available on the net shows
the exact erasesize and the OTP support.
At the moment only jedec_probe can discover the chip and
the NOR is mounted read only probably because of wrong vpp.

Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Andrea Adami 2013-07-21 01:07:33 +02:00 committed by David Woodhouse
parent edc9cba495
commit fe2f4c8e0b
1 changed files with 7 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/mtd/chips/jedec_probe.c
View File

@ -120,7 +120,7 @@
#define PM49FL008 0x006A #define PM49FL008 0x006A
/* Sharp */ /* Sharp */
#define LH28F640BF 0x00b0 #define LH28F640BF 0x00B0
/* ST - www.st.com */ /* ST - www.st.com */
#define M29F800AB 0x0058 #define M29F800AB 0x0058
@ -1299,13 +1299,14 @@ static const struct amd_flash_info jedec_table[] = {
.mfr_id = CFI_MFR_SHARP, .mfr_id = CFI_MFR_SHARP,
.dev_id = LH28F640BF, .dev_id = LH28F640BF,
.name = "LH28F640BF", .name = "LH28F640BF",
.devtypes = CFI_DEVICETYPE_X8, .devtypes = CFI_DEVICETYPE_X16,
.uaddr = MTD_UADDR_UNNECESSARY, .uaddr = MTD_UADDR_UNNECESSARY,
.dev_size = SIZE_4MiB, .dev_size = SIZE_8MiB,
.cmd_set = P_ID_INTEL_STD, .cmd_set = P_ID_INTEL_EXT,
.nr_regions = 1, .nr_regions = 2,
.regions = { .regions = {
ERASEINFO(0x40000,16), ERASEINFO(0x10000, 127),
ERASEINFO(0x02000, 8),
} }
}, { }, {
.mfr_id = CFI_MFR_SST, .mfr_id = CFI_MFR_SST,