hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

sh: Support for SH-4A memory barriers. 

SH-4A supports 'synco' as a barrier, sprinkle it around
the cache ops as necessary..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2006-09-27 14:05:52 +09:00
parent 36efc35447
commit fdfc74f9fc
2 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/sh/mm/cache-sh4.c
View File

@ -184,6 +184,7 @@ void flush_cache_sigtramp(unsigned long addr)
i++, index += cpu_data->icache.way_incr) i++, index += cpu_data->icache.way_incr)
ctrl_outl(0, index); /* Clear out Valid-bit */ ctrl_outl(0, index); /* Clear out Valid-bit */
back_to_P1(); back_to_P1();
wmb();
local_irq_restore(flags); local_irq_restore(flags);
} }
@ -223,6 +224,8 @@ void flush_dcache_page(struct page *page)
flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x2000, phys); flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x2000, phys);
flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x3000, phys); flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x3000, phys);
} }
wmb();
} }
static inline void flush_icache_all(void) static inline void flush_icache_all(void)
@ -247,6 +250,7 @@ void flush_dcache_all(void)
__flush_dcache_all(); __flush_dcache_all();
else else
__flush_dcache_all_ex(); __flush_dcache_all_ex();
wmb();
} }
void flush_cache_all(void) void flush_cache_all(void)
@ -377,5 +381,6 @@ void flush_icache_user_range(struct vm_area_struct *vma,
struct page *page, unsigned long addr, int len) struct page *page, unsigned long addr, int len)
{ {
flush_cache_page(vma, addr, page_to_pfn(page)); flush_cache_page(vma, addr, page_to_pfn(page));
mb();
} }

7
include/asm-sh/system.h
View File

@ -84,10 +84,17 @@ static __inline__ unsigned long tas(volatile int *m)
extern void __xchg_called_with_bad_pointer(void); extern void __xchg_called_with_bad_pointer(void);
#ifdef CONFIG_CPU_SH4A
#define mb() __asm__ __volatile__ ("synco": : :"memory")
#define rmb() mb()
#define wmb() __asm__ __volatile__ ("synco": : :"memory")
#define read_barrier_depends() do { } while(0)
#else
#define mb() __asm__ __volatile__ ("": : :"memory") #define mb() __asm__ __volatile__ ("": : :"memory")
#define rmb() mb() #define rmb() mb()
#define wmb() __asm__ __volatile__ ("": : :"memory") #define wmb() __asm__ __volatile__ ("": : :"memory")
#define read_barrier_depends() do { } while(0) #define read_barrier_depends() do { } while(0)
#endif
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
#define smp_mb() mb() #define smp_mb() mb()